ISL28288_11

Dual and Quad Micropower Single Supply Rail-to-Rail Input and Output (RRIO) Op Amp ISL28288, ISL28488 The ISL28288 and ISL28488 are dual and quad channel micropower operational amplifiers optimized for single supply operation over the 2.4V to 5.5V range. They can be operated from one lithium cell or two Ni-Cd batteries. For equivalent performance in a single channel op amp, reference EL8188. These devices feature an Input Range Enhancement Circuit (IREC) which enables them to maintain CMRR performance for input voltages 10% above the positive supply rail and to 100mV below the negative supply. The output operation is rail-to-rail. The ISL28288 and ISL28488 draw minimal supply current while meeting excellent DC-accuracy, AC-performance, noise and output drive specifications. The ISL28288 (10 Ld MSOP only) contains a power-down enable pin that reduces the power supply current to typically less than 4µA in the disabled state. Features • Low power 60µA typical supply current per amplifier • 1.5mV max offset voltage • 30pA max input bias current • 250kHz typical gain-bandwidth product • 105dB typical PSRR • 100dB typical CMRR • Single supply operation down to 2.4V • Input is capable of swinging above V+ and below V- (ground sensing) • Rail-to-rail input and output (RRIO) • Enable Pin - ISL28288 10 Ld MSOP package option only • Pb-free (RoHS compliant) Applications • Battery- or solar-powered systems • 4mA to 25mA current loops • Handheld consumer products • Medical devices • Thermocouple amplifiers • Photodiode pre-amps • pH probe amplifiers Related Literature AN1344: ISL2828xEVAL1Z Evaluation Board User’s Guide VIN V+ + U1A 1/2 ISL28x88 V+ U1B+ 1/2 ISL28x88 VOUT R1 10k C1 0.1µF GAIN=425 R2 158Ω RF1 680k VREF 0.082µF C3 R3 12.4k R4 2.21k CF1 4.7µF BANDPASS AMPLIFIER (0.05Hz TO 159Hz) FIGURE 1. TYPICAL APPLICATION CIRCUIT July 26, 2011 FN6339.4 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2006-2008, 2011. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL28288, ISL28488 Pin Configurations ISL28288 (8 LD SOIC) TOP VIEW OUT_A 1 IN-_A 2 IN+_A 3 V- 4 -+ +8 V+ 7 OUT_B 6 IN-_B 5 IN+_B OUT_A 1 IN-_A 2 IN+_A 3 V+ 4 IN+_B 5 IN-_B 6 OUT_B 7 -+ +-+ +- ISL28488 (14 LD TSSOP) TOP VIEW 14 OUT_D 13 IN-_D 12 IN+_D 11 V10 IN+_C 9 IN-_C 8 OUT_C ISL28288 (10 LD MSOP) TOP VIEW IN+_A 1 EN_A 2 V- 3 EN_B 4 IN+_B 5 + + 10 IN-_A 9 OUT_A 8 V+ 7 OUT_B 6 IN-_B OUT_A 1 IN-_A 2 ISL28488 (16 LD QSOP) TOP VIEW 16 OUT_D 15 IN-_D + + IN+_A 3 V+ 4 IN+_B 5 IN-_B 6 OUT_B 7 NC 8 + + 14 IN+_D 13 V12 IN+_C 11 IN-_C 10 OUT_C 9 NC Ordering Information PART NUMBER (Notes 1, 2, 3) ISL28288FUZ ISL28288FBZ ISL28488FAZ (Note 4) ISL28488FVZ ISL28288EVAL1Z ISL28488EVAL1Z NOTES: 1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28288, ISL28488. For more information on MSL please see techbrief TB363 4. Not Recommended for New Designs. 8288Z 28288 FBZ 28488 FAZ 28488 FVZ Evaluation Board - 10 Ld MSOP Evaluation Board - 16 Ld QSOP PART MARKING 10 Ld MSOP 8 Ld SOIC 16 Ld QSOP 14 Ld TSSOP PACKAGE (Pb-Free) PKG. DWG. # M10.118A M8.15E MDP0040 M14.173 2 FN6339.4 July 26, 2011 ISL28288, ISL28488 Absolute Maximum Ratings (TA = +25°C) Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V- - 0.5V to V+ + 0.5V ESD Tolerance Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300V Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1200V Thermal Information Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 8 Ld SOIC Package (Note5) . . . . . . . . . . . . 125 N/A 10 Ld MSOP Package (Notes 5, 6) . . . . . . . 160 60 14 Ld TSSOP Package (Note 5) . . . . . . . . . 115 N/A 16 Ld QSOP Package (Note 5) . . . . . . . . . . 100 N/A Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Ambient Operating Temperature Range . . . . . . . . . . . . . .-40°C to +125°C Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . .+125°C Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . 2.4V (±1.2V) to 5.5V (±2.75V) CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 5. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 6. For θJC, the “case temp” location is taken at the package top center. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER DC SPECIFICATIONS VOS Δ V OS ----------------Δ Time Δ V OS ------------ΔT IOS IB CMIR CMRR PSRR AVOL Input Offset Voltage V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. DESCRIPTION CONDITIONS MIN (Note 7) TYP MAX (Note 7) UNIT -1.5 -2 ISL28288 ±0.05 1.5 2 mV µV/Mo µV/°C Long Term Input Offset Voltage Stability Input Offset Voltage vs Temperature Input Offset Current 1.2 0.9 -30 -80 -30 -80 0 80 75 85 80 103 102 100 105 109 95 3 130 6 30 175 225 ±5 -40°C to +85°C Input Bias Current -40°C to +85°C Common-Mode Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain Guaranteed by CMRR VCM = 0V to 5V V+ = 2.4V to 5.5V VO = 0.5V to 4.5V, RL = 100kΩ VO = 0.5V to 4.5V, RL = 1kΩ 30 80 30 80 5 pA pA V dB dB dB dB mV mV ±10 VOL Output Voltage Swing, Low VOUT - V- RL = 100kΩ RL = 1kΩ 3 FN6339.4 July 26, 2011 ISL28288, ISL28488 Electrical Specifications PARAMETER VOH V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued) DESCRIPTION Output Voltage Swing, High V+ - VOUT RL = 100kΩ RL = 1kΩ IS,ON Quiescent Supply Current, Enabled ISL28288 Per channel, all channels enabled. ISL28488 Per channel. IS,OFF IO+ IOVSUPPLY VENH VENL IENH IENL Quiescent Supply Current, Disabled (ISL28288 MSOP) Short Circuit Sourcing Capability Short Circuit Sinking Capability Supply Operating Range EN Pin High Level (ISL28288 10 ld. MSOP) EN Pin Low Level (ISL28288 10 ld. MSOP) EN Pin Input High Current (ISL28288 10 ld. MSOP) EN Pin Input Low Current (ISL28288 10 ld. MSOP) VEN = V+ VEN = V0.8 0 All channels disabled. RL = 10Ω RL = 10Ω V+ to V2.4 2 0.8 1 1.5 +0.1 24 20 CONDITIONS MIN (Note 7) TYP 4 120 60 60 4 31 -26 -24 -20 5.5 MAX (Note 7) 10 30 200 250 78 87.5 79 87.5 7 9 UNIT mV mV µA µA µA mA mA V V V µA µA AC SPECIFICATIONS GBW en Gain Bandwidth Product Input Noise Voltage Peak-to-Peak Input Noise Voltage Density in CMRR @ 60Hz PSRR+ @ 120Hz PSRR- @ 120Hz Input Noise Current Density Input Common Mode Rejection Ratio Power Supply Rejection Ratio (V+) Power Supply Rejection Ratio (V-) AV = 100, RF = 100kΩ, RG = 1kΩ, RL = 10kΩ to VCM f = 0.1Hz to 10Hz fO = 1kHz fO = 1kHz VCM = 1VP-P, RL = 10kΩ to VCM V+, V- = ±1.2V and ±2.5V, VSOURCE = 1VP-P, RL = 10kΩ to VCM V+, V- = ±1.2V and ±2.5V VSOURCE = 1VP-P, RL = 10kΩ to VCM 250 3 48 9 -70 -80 -60 kHz µVP-P nV/√Hz fA/√Hz dB dB dB TRANSIENT RESPONSE SR tEN Slew Rate Enable to Output Turn-on Delay Time, 10% VEN = 5V to 0V, AV = -1, EN to 10% Vout RG = RF = RL = 1k to VCM (ISL28288 10 ld. MSOP) Enable to Output Turn-off Delay Time, 10% VEN = 0V to 5V, AV = -1, EN to 10% Vout RG = RF = RL = 1k to VCM (ISL28288 10 ld. MSOP) NOTE: 7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. ±0.15 V/µs µs 2 0.1 µs 4 FN6339.4 July 26, 2011 ISL28288, ISL28488 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open +1 0 -1 -2 GAIN (dB) -3 -4 -5 VOUT = 50mVP-P AV = 1 -6 C = 3pF L RF = 0, RG = INF -7 8 1k 10k 100k FREQUENCY (Hz) 1M 5M V+, V- = ±2.5V RL = 10k V+, V-= ±2.5V RL = 1k V+, V- = ±1.2V RL = 1 k GAIN (dB) V+, V- = ±1.2V RL = 10k 45 40 35 30 25 20 AV = 100 15 RL = 10kΩ CL = 3pF 10 R = 100kΩ F RG = 1kΩ 5 0 100 1k V+, V- = ±2.5V V+, V- = ±1.2V V+, V- = ±1.0V 10k FREQUENCY (Hz) 100k 1M FIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE FIGURE 3. FREQUENCY RESPONSE vs SUPPLY VOLTAGE 120 80 GAIN (dB) 40 0 -40 -80 80 40 PHASE (°) GAIN (dB) 0 -40 -80 -120 10M 100 80 60 40 20 0 -20 10 GAIN PHASE 200 150 100 50 0 -50 -100 100 1k 10k 100k -150 1M PHASE (°) 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 4. AVOL vs FREQUENCY @ 100kΩ LOAD FIGURE 5. AVOL vs FREQUENCY @ 1kΩ LOAD 100 90 80 70 CMRR (dB) PSRR (dB) 10 PSRR+ 0 -10 -20 -30 -40 -50 -60 -70 PSRR-80 -90 1k 10k FREQUENCY (Hz) 100k 1M -100 10 100 1k 10k 100k 1M V+, V- = ±2.5VDC VSOURCE = 1VP-P RL = 10kΩ 60 50 40 VS = ±2.5V 20 AV = 1 10 CL = 27.9pF R = 10k 0 V L = 1V CM P-P -10 10 100 30 FREQUENCY (Hz) FIGURE 6. PSRR vs FREQUENCY FIGURE 7. CMRR vs FREQUENCY 5 FN6339.4 July 26, 2011 ISL28288, ISL28488 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 70 60 50 GAIN (dB) ACL = 1000 RF = 100kΩ, RG = 100 RF = 100kΩ, RG = 1k 140 130 120 CROSSTALK (dB) 110 100 90 80 70 60 50 40 30 RL_TRANSMIT = ∞ RL_RECEIVE = 10k VS = ±2.5V CL = 29.6pF VCM = 1VP-P 40 30 20 10 0 ACL = 100 VS = ±2.5V CL = 26.9pF RL = 10k VOUT = 10mVP-P ACL = 10 RF = 100kΩ, RG = 10k ACL = 1 RF = 0, RG = ∞ 100 1k 10k RL_TRANSMIT = 10k RL_RECEIVE = 10k -10 10 100k 1M 10M 10 100 FREQUENCY (Hz) 1k 10k FREQUENCY (Hz) 100k 1M FIGURE 8. FREQUENCY RESPONSE vs CLOSED LOOP GAIN FIGURE 9. CROSSTALK vs FREQUENCY 1000 INPUT NOISE VOLTAGE (nV/√Hz) INPUT NOISE CURRENT (fA/√Hz) VS = ±2.5V 10000 VS = ±2.5V 100 1000 10 100 1 0.1 1 10 100 1k FREQUENCY (Hz) 10k 100k 10 0.1 1 10 100 1k FREQUENCY (Hz) 10k 100k FIGURE 10. CURRENT NOISE vs FREQUENCY FIGURE 11. VOLTAGE NOISE vs FREQUENCY 5 INPUT NOISE VOLTAGE (µV) VS = ±2.5V 4 AV = 10k 3 2 1 0 -1 -2 -3 -4 -5 0 1 2 3 4 5 6 7 8 9 10 SMALL SIGNAL (V) 2.56 2.54 2.52 2.50 2.48 2.46 2.44 V + = 5V AV = 1 RL = 1 k Ω VOUT = 0.1VP-P 0 20 40 60 80 100 120 140 160 180 200 TIME (s) TIME (µs) FIGURE 12. 0.1Hz TO 10Hz INPUT VOLTAGE NOISE FIGURE 13. SMALL SIGNAL TRANSIENT RESPONSE 6 FN6339.4 July 26, 2011 ISL28288, ISL28488 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 5.0 4.5 4.0 LARGE SIGNAL (V) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 20 40 60 80 100 120 140 160 180 200 TIME (µs) 0.1V/DIV V + = 5V AV = -2 RL = 1kΩ VOUT = 4VP-P 1V/DIV EN INPUT AV = -1 VIN = 200mVP-P V + = 5V V- = 0V 0 VOUT 0 10µs/DIV FIGURE 14. LARGE SIGNAL TRANSIENT RESPONSE FIGURE 15. ENABLE TO OUTPUT DELAY TIME 1000 800 600 400 IBIAS (pA) V + = 5V RL = OPEN RF = 100k, RG = 100 AV = +1000 0 1 2 3 VCM (V) 4 5 6 VOS (µV) 200 0 -200 -400 -600 -800 -1000 -1 100 80 60 40 20 0 -20 -40 -60 -80 -100 -1 V+ = 5V RL = OPEN RF= 100k, RG = 100 AV = +1000 0 1 2 3 VCM (V) 4 5 6 FIGURE 16. INPUT OFFSET VOLTAGE vs COMMON MODE INPUT VOLTAGE FIGURE 17. INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE 350 330 310 CURRENT (µA) 290 270 250 230 210 190 170 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MIN MEDIAN CURRENT (µA) N = 1000 MAX 4.8 4.6 4.4 4.2 4.0 3.8 3.6 3.4 3.2 -40 n = 12 MAX MEDIAN MIN -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 18. ISL28488 SUPPLY CURRENT FOR ALL CHANNELS vs TEMPERATURE V+, V- = ±2.5V ENABLED, RL = INF FIGURE 19. ISL28288 SUPPLY CURRENT vs TEMPERATURE V+, V- = ±2.5V DISABLED, RL = INF 7 FN6339.4 July 26, 2011 ISL28288, ISL28488 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 2.0 1.5 1.0 N = 1000 2.0 MAX 1.5 1.0 N = 1000 MAX VOS (mV) VOS (mV) 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 20. VOS vs TEMPERATURE, VIN = 0V, V+, V- = ±2.5V FIGURE 21. VOS vs TEMPERATURE VIN = 0V, V+, V- = ±1.2V 500 n = 1000 0 -500 MAX -1000 -1500 -2000 MIN -2500 -40 -20 0 20 40 60 80 100 120 IBIAS- (pA) 200 0 -200 n = 1000 IBIAS+ (pA) -400 -600 -800 -1000 -1200 -1400 -40 -20 0 20 40 60 MAX MEDIAN MEDIAN MIN 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 22. IBIAS+ vs TEMPERATURE V+, V- = ±2.5V FIGURE 23. IBIAS- vs TEMPERATURE V+, V- = ±2.5V 500 0 -500 n = 1000 200 0 -200 MAX IBIAS- (pA) -400 -600 n = 1000 IBIAS+ (pA) MAX -1000 -1500 -2000 MIN -2500 -40 -20 0 20 40 60 80 100 120 MEDIAN MEDIAN -800 -1000 -1200 -40 -20 0 20 40 60 80 MIN 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 24. IBIAS+ vs TEMPERATURE V+, V- = ±1.2V FIGURE 25. IBIAS- vs TEMPERATURE V+, V- = ±-1.2V 8 FN6339.4 July 26, 2011 ISL28288, ISL28488 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 200 0 -200 IOS (pA) -400 -600 -800 -1000 -1200 -1400 -40 -20 0 20 40 60 80 MEDIAN AVOL (V/mV) MAX n = 1000 650 600 550 500 450 400 350 300 250 MIN 100 120 200 150 -40 -20 0 MIN 20 40 60 80 100 120 TEMPERATURE (°C) MEDIAN n = 1000 MAX TEMPERATURE (°C) FIGURE 26. IOS vs TEMPERATURE V+, V- = ±2.5V FIGURE 27. AVOL vs TEMPERATURE V+, V- = ±2.5V, RL = 100k 90 n = 1000 80 MAX AVOL (V/mV) MEDIAN 60 50 40 30 MIN CMRR (dB) 70 135 125 115 105 95 n = 1000 MAX MEDIAN MIN 85 75 -40 -40 -20 0 20 40 60 80 100 120 -20 0 TEMPERATURE (°C) 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 28. AVOL vs TEMPERATURE, V+, V- = ±2.5V, RL = 1k FIGURE 29. CMRR vs TEMPERATURE VCM = +2.5V TO -2.5V, V+, V- = ±2.5V 140 n = 1000 130 120 VOUT (V) 110 100 90 80 -40 MIN MEDIAN MAX 4.91 4.90 4.89 4.88 MEDIAN 4.87 4.86 4.85 60 80 100 120 4.84 -40 -20 0 20 40 60 80 100 120 MIN n = 1000 MAX PSRR (dB) -20 0 20 40 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 30. PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.75V FIGURE 31. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V, RL= 1k 9 FN6339.4 July 26, 2011 ISL28288, ISL28488 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 4.9984 4.9982 4.9980 4.9978 VOUT (V) 4.9976 4.9974 4.9972 4.9970 4.9968 4.9966 4.9964 -40 -20 0 20 40 60 80 100 120 MIN 110 100 -40 -20 0 20 40 60 80 100 120 MEDIAN n = 12 170 n = 1000 160 MAX VOUT (mV) 150 MAX 140 130 MIN 120 MEDIAN TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 32. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V, RL= 100k FIGURE 33. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V, RL= 1k n = 12 +OUTPUT SHORT CIRCUIT CURRENT (mA) 4.3 4.2 4.1 VOUT (mV) 4.0 3.9 3.8 3.7 3.6 3.5 3.4 -40 39 37 35 33 31 29 27 25 -40 n = 1000 MAX MAX MEDIAN MIN MEDIAN MIN -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 34. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V, RL= 100k FIGURE 35. +OUTPUT SHORT CIRCUIT CURRENT vs TEMPERATURE VIN = +2.5V, RL = 10, V+, V- = ±2.5V -OUTPUT SHORT CIRCUIT CURRENT (mA) -21 n = 1000 -23 -25 -27 MIN -29 -31 -33 -40 MEDIAN MAX -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 36. -OUTPUT SHORT CIRCUIT CURRENT vs TEMPERATURE V IN = -2.5V, RL = 10, V+, V- = ±2.5V 10 FN6339.4 July 26, 2011 ISL28288, ISL28488 Pin Descriptions ISL28288 (8 LD SOIC) 3 ISL28288 (10 LD MSOP) 1 2 ISL28488 (14 LD TSSOP) 3 ISL28488 (16 LD QSOP) 3 PIN NAME IN+_A EN_A EQUIVALENT CIRCUIT Circuit 1 Circuit 2 DESCRIPTION Amplifier A non-inverting input Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the enabled state. Negative power supply Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the enabled state. Amplifier B non-inverting input Amplifier B inverting input Amplifier B output Positive power supply Amplifier A output Amplifier A inverting input Amplifier C output Amplifier C inverting input Amplifier C non-inverting input Amplifier D non-inverting input Amplifier D inverting input Amplifier D output No internal connection V+ CAPACITIVELY COUPLED 4 - 3 4 11 - 13 - VEN_B Circuit 4 Circuit 2 5 6 7 8 1 2 - 5 6 7 8 9 10 V+ 5 6 7 4 1 2 8 9 10 12 13 14 - 5 6 7 4 1 2 10 11 12 14 15 16 8, 9 IN+_B IN-_B OUT_B V+ OUT_A IN-_A OUT_C IN-_C IN+_C IN+_D IN-_D OUT_D NC V+ Circuit 1 Circuit 1 Circuit 3 Circuit 4 Circuit 3 Circuit 1 Circuit 3 Circuit 1 Circuit 1 Circuit 1 Circuit 1 Circuit 3 - V+ OUT IN- IN+ V- EN VCIRCUIT 2 CIRCUIT 3 VVCIRCUIT 4 CIRCUIT 1 Applications Information Introduction The ISL28288 and ISL28488 are dual and quad CMOS rail-to-rail input, output (RRIO) micropower operational amplifiers. These devices are designed to operate from a single supply (2.4V to 5.5V) or dual supplies (±1.2V to ±2.75V) while drawing only 60µA of supply current per amplifier. This combination of low power and precision performance makes these devices suitable for solar and battery power applications. in input offset voltage and an undesired change in magnitude and polarity of input offset current. These amplifiers achieve rail-to-rail input operation without sacrificing important precision specifications and degrading distortion performance. The devices’ input offset voltage exhibits a smooth behavior throughout the entire common-mode input range. The input bias current vs the common-mode voltage range gives us an undistorted behavior from typically 100mV below the negative rail and 10% higher than the V+ rail (0.5V higher than V+ when V+ equals 5.5V). Rail-to-Rail Input Many rail-to-rail input stages use two differential input pairs, a long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties have to be paid for this circuit topology. As the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the other causing drastic changes 11 Input Protection All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. There is an additional pair of back-to-back diodes across the input terminals. For applications where the input differential voltage is expected to FN6339.4 July 26, 2011 ISL28288, ISL28488 exceed 0.5V, external series resistors must be used to ensure the input currents never exceed 5mA (as shown in Figure 37). V+ VIN RIN + moisture and provide a humidity barrier, reducing parasitic resistance on the board. Current Limiting VOUT RL The ISL28288 has no internal current-limiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. Power Dissipation It is possible to exceed the +150°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Equation 1: T JMAX = T MAX + ( θ JA xPD MAXTOTAL ) (EQ. 1) V- FIGURE 37. INPUT ESD DIODE CURRENT LIMITING - UNITY GAIN Rail-to-Rail Output A pair of complementary MOSFET devices are used to achieve the rail-to-rail output swing. The NMOS sinks current to swing the output in the negative direction. The PMOS sources current to swing the output in the positive direction. With a 100kΩ load they will swing to within 4mV of the positive supply rail and within 3mV of the negative supply rail. where: • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) • PDMAX for each amplifier is calculated in Equation 2: V OUTMAX PDMAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × -----------------------R L Enable/Disable Feature The ISL28288 (only MSOP package option), offers an EN pin that disables the device when pulled up to at least 2.0V. In the disabled state (output in a high impedance state), the part consumes typically 4µA. By disabling the part, multiple ISL28288 parts can be connected together as a MUX. In this configuration, the outputs are tied together in parallel and a channel can be selected by the EN pin. The loading effects of the feedback resistors of the disabled amplifier must be considered when multiple amplifier outputs are connected together. The EN pin also has an internal pull-down. If left open, the EN pin will pull to the negative rail and the device will be enabled by default. (EQ. 2) where: • TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation of 1 amplifier • VS = Supply voltage (Magnitude of V+ and V-) • IMAX = Maximum supply current of 1 amplifier • VOUTMAX = Maximum output voltage swing of the application • RL = Load resistance Using Only One Channel If the application only requires one channel, the user must configure the unused channel to prevent it from oscillating. The unused channel will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 38). ISL28288 + Application Circuits THERMOCOUPLE AMPLIFIER Thermocouples are the most popular temperature-sensing device because of their low cost, interchangeability, and ability to measure a wide range of temperatures. The ISL28x88 (see Figure 39) is used to convert the differential thermocouple voltage into single-ended signal with 10X gain. The amplifier’s rail-to-rail input characteristic allows the thermocouple to be biased at ground and the amplifier to run from a single 5V supply. FIGURE 38. PREVENTING OSCILLATIONS IN UNUSED CHANNELS Proper Layout Maximizes Performance To achieve the maximum performance of the high input impedance and low offset voltage, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board will reduce surface 12 FN6339.4 July 26, 2011 ISL28288, ISL28488 K TYPE THERMOCOUPLE R4 R3 10kΩ 10kΩ R2 COLD JUNCTION COMPENSATION R1 100kΩ 100kΩ + ISL28x88 VV+ 410µV/°C + 5V inverting input. Resistor divider pair, R3-R4 define the maximum input DC level that is cancelled, and is given by Equation 4: ⎛ R4 ⎞ V IN DC = V + × ⎜ ------------------- ⎟ ⎝ R 3 + R 4⎠ (EQ. 4) In the passband range, U1B’s gain is +1 and the total signal gain is defined by the divider ratios according to Equation 5: V OUT ⎛ R 1 + R 2⎞ ⎛ R 3 + R 4⎞ V OUT U1 GAIN = ------------ = ⎜ ------------------- ⎟ × ⎜ ------------------- ⎟ V IN ⎝ R2 ⎠ ⎝ R4 ⎠ (EQ. 5) FIGURE 39. THERMOCOUPLE AMPLIFIER At frequencies greater than the LPF corner, the R1-C1 and R3-C3 networks roll off U1A's gain to unity. Setting both R-C time constants to the same value simplifies to Equation 6: 1 f-LPF -3dB = ----------------------------------------2 × Pi × R 1 × C 1 (EQ. 6) ECG AMPLIFIER ECG amplifiers must extract millivolt low frequency AC signals from the skin of the patient while rejecting AC common mode interference and static DC potentials created at the electrode-toskin interface. In Figure 40, the ISL28288 (U1) forms one of the multiple high gain AC band-pass amplifiers using active feedback. Amplifier U1B and RC RF1, CF1 form a high gain LP filtered amplifier with the corner frequency given by Equation 3: 1 f-HPF -3dB = ------------------------------------------------2 × Pi × RF1 × CF1 (EQ. 3) Right leg drive and reference amplifiers U2A and U2B form a DC feedback loop that applies a correction voltage at the Right Leg electrode to cancel out DC and low frequency body interference. The voltage at the VCM sense electrode is maintained at the reference voltage set by RF1-RF2. With the values shown in Figure 40, the ECG circuit performance parameters are: 1. Supply Voltage Range = +2.4V to +5.5V 2. Total Supply Current Draw @ +5V = 500µA (typ) 3. Common-Mode Reference Voltage (VCM) = V+/2 4. Max DC Input Offset Voltage = VCM ±0.18V to ±0.41V 5. Passband Gain = 425V/V 6. Lower -3dB Frequency = 0.05Hz 7. Upper -3dB Frequency = 159Hz Inserting the low pass amplifier, U1B, in U1A’s feedback loop results in an overall high-pass frequency response. Voltage divider pairs R1-R2 and R3-R4 set the overall amplifier passband gain. The DC input offset is cancelled by U1B at U1A’s 13 FN6339.4 July 26, 2011 ISL28288, ISL28488 PATIENT LEAD CONNECTOR VIN+ R 10k V+ V+ + U1A 1/2 ISL28288 V+ U1B+ 1/2 ISL28288 VOUT(U1) R1 10k R 1k C1 0.1µF C 0.01µF V+ R2 158Ω RF1 680k RFA 10k 4.7µF RFB 10k 0.47 µF SUPPLY COMMON VOUT+ 0.082µF DC OFFSET C3 R3 12.4k VCM REFERENCE TO OTHER CHANNELS V+ R 10k R4 2.21k VOUT+2.4 TO 5.5V SUPPLY PATIENT ELECTRODE PADS CF1 4.7µF VCM SENSE V+ + U2A 1/2 ISL28288 R 5k VREF (V+/2) INPUT VCM RL DRIVE V+ R 10k PROTECTION CIRCUIT CA 1nF R 500k CB V+ 1nF U2B 1/2 ISL28288 + FIGURE 40. ECG AMPLIFIER For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 14 FN6339.4 July 26, 2011 ISL28288, ISL28488 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest revision. DATE 7/12/11 REVISION FN6339.4 CHANGE page 1 Features changed: "Low power 120uA…" to "Low power 60uA…" page 4 Electrical Spec table IS,ON changed conditions and values from: ISL28288, All channels enabled TYP 120, MAX 156, 175 ISL28488, All channels enabled TYP 240, MAX 315, 350 TO: ISL28288, Per channel, all channels enabled TYP 60, MAX 78, 87.5 ISL28488, Per channel TYP 60, MAX 79, 87.5 page 4 Electrical Spec table IS,OFF updated description by adding MSOP to ISL28288 page 11 First paragraph second sentence of the Applications Information Introduction section changed "…while drawing only 120uA of supply current." To "…while drawing only 60uA of supply current per amplifier." Features on page 1 changed gain bw from 300 to 250kHz Added Related Literature Added Typ App Circuit Updated PKG DWG Number to Ordering Information on page 2 for: ISL28288FBZ from MDP0027 TO M8.15E, matching Intrepid ISL28288FUZ from MDP0043 TO M10.118A Added Note "Not Recommended for New Designs" for ISL28488FAZ (At Prenotification) Removed "Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs" from Abs Max on page 3 Added "Supply Voltage under Operating Conditions. . . . . . . . . . . . . . . . . . 2.4V (±1.2V) to 5.5V (±2.75V)" AVol room temp on page 3 min changed from 200V/mV to 103dB; over temp min changed from 190V/mV to 102dB; typ changed from 300V/mV to 109dB. For Rl = 1kohm, changed typ from 60V/mV to 95dB Vout split into 2 parameters; Vol and Voh beginning onpage 3. For Output Voltage Swing, High, removed min specs, changed typs from 4.996V & 4.880V to 4 & 120mV; added max specs Added Tjc Note on page 3 Changed GBW typ from 300kHz to 250kHz page 4 Removed min/max limits for SR page 4. Changed typ from +/-0.14V/us to +/-0.15V/us Changed Note in Electrical Spec Table page 4 from: Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested. To: Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design Revised FIGURE 6. PSRR vs FREQUENCY on page 5 Added Figures 8-11 frequency curves beginning on page 6 Updated Proper Layout Maximizes Performance sectionpage 12 by removing last part of paragraph and Figure Replaced MDP0027 POD with updated M8.15E to meet new standard Replaced M14.173 POD with updated version - Updated drawing to remove table and added land pattern Replaced MDP0043 POD with M10.118A to meet new standard FN6339.3 FN6339.2 Removed "coming soon" in ordering information, updated pb-free lead finish note to latest revision. 1. Added 8ld. SO, 14 ld TSSOP package, pinout, and pin description. 2. Changed Io+, Io- specs 3. Updated Abs MAX supply voltage, Theta JAs, added CDM ESD spec 4. Changed spec. table noise current TYP from 0.1pA to 9fA 5. Updated noise plots (Fig.7, 8, 9) 6. Updated transient response plots (Fig 10, 11) 7. Added ECG circuit to applications section Applied all Intersil Standards. Added New Part to datasheet. Changed Caution Statement per Legal's suggested verbiage. Ordering Information updated - added tape and reel note. Added note 1 to spec table for min and max. Updated POD's. 6/25/07 Following edits completed: 1) Datasheet description 3rd paragraph, last sentence. Changed "less than 10µA max" to "typically 4µA" 2) Datasheet description 3rd paragraph, last sentence. Change "the reduces the power" to "that reduces the power". 3) features change "60µA to 120µA typ supply current" remove per amplifier. 4) change to "30pA max". 5) change to 105 typical PSRR. 6) add 100 typical CMRR. 7) Page 2, Iio ± 80pA max limit for hot/cold temp Initial Release 6/16/11 5-22-08 3-17-08 6-28-07 FN6339.1 9-20-06 FN6339.0 15 FN6339.4 July 26, 2011 ISL28288, ISL28488 Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. *For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL28288, ISL28488 To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff FITs are available from our website at: http://rel.intersil.com/reports/search.php 16 FN6339.4 July 26, 2011 ISL28288, ISL28488 Quarter Size Outline Plastic Packages Family (QSOP) A D N (N/2)+1 MDP0040 QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY INCHES SYMBOL PIN #1 I.D. MARK QSOP16 0.068 0.006 0.056 0.010 0.008 0.193 0.236 0.154 0.025 0.025 0.041 16 QSOP24 0.068 0.006 0.056 0.010 0.008 0.341 0.236 0.154 0.025 0.025 0.041 24 QSOP28 0.068 0.006 0.056 0.010 0.008 0.390 0.236 0.154 0.025 0.025 0.041 28 TOLERANCE Max. ±0.002 ±0.004 ±0.002 ±0.001 ±0.004 ±0.008 ±0.004 Basic ±0.009 Basic Reference NOTES 1, 3 2, 3 - A A1 A2 b E E1 1 B 0.010 CAB e C SEATING PLANE 0.004 C 0.007 CAB (N/2) c D E H E1 e L b L1 N Rev. F 2/07 L1 A c SEE DETAIL "X" NOTES: 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 0.010 A2 GAUGE PLANE L 4°±4° DETAIL X A1 17 FN6339.4 July 26, 2011 ISL28288, ISL28488 Package Outline Drawing M8.15E 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09 4 4.90 ± 0.10 A DETAIL "A" 0.22 ± 0.03 B 6.0 ± 0.20 3.90 ± 0.10 4 PIN NO.1 ID MARK 5 (0.35) x 45° 1.27 0.43 ± 0.076 0.25 M C A B 4° ± 4° SIDE VIEW “B” TOP VIEW 1.75 MAX 1.45 ± 0.1 0.25 0.175 ± 0.075 GAUGE PLANE C SEATING PLANE 0.10 C SIDE VIEW “A 0.63 ±0.23 DETAIL "A" (1.27) (0.60) NOTES: (1.50) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. Unless otherwise specified, tolerance : Decimal ± 0.05 Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. 5. 6. The pin #1 identifier may be either a mold or mark feature. Reference to JEDEC MS-012. 2. (5.40) 3. 4. TYPICAL RECOMMENDED LAND PATTERN 18 FN6339.4 July 26, 2011 ISL28288, ISL28488 Package Outline Drawing M14.173 14 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) Rev 3, 10/09 A 1 5.00 ±0.10 14 8 SEE DETAIL "X" 3 6.40 4.40 ±0.10 2 3 PIN #1 I.D. MARK 0.20 C B A 1 0.65 TOP VIEW 7 B 0.09-0.20 END VIEW 1.00 REF H C SEATING PLANE 0.25 +0.05/-0.06 0.10 C 0.10 SIDE VIEW CBA 1.20 MAX 0.05 0.90 +0.15/-0.10 GAUGE PLANE 0.05 MIN 0.15 MAX DETAIL "X" 0°-8° 0.60 ±0.15 0.25 5 (1.45) NOTES: 1. Dimension does not include mold flash, protrusions or gate burrs. (5.65) Mold flash, protrusions or gate burrs shall not exceed 0.15 per side. 2. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25 per side. 3. Dimensions are measured at datum plane H. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Dimension does not include dambar protrusion. Allowable protrusion shall be 0.80mm total in excess of dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm. (0.65 TYP) (0.35 TYP) 6. Dimension in ( ) are for reference only. 7. Conforms to JEDEC MO-153, variation AB-1. TYPICAL RECOMMENDED LAND PATTERN 19 FN6339.4 July 26, 2011 ISL28288, ISL28488 Package Outline Drawing M10.118A (JEDEC MO-187-BA) 10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP) Rev 0, 9/09 3.0 ± 0.1 10 A DETAIL "X" 0.25 CAB 1.10 Max PIN# 1 ID 1 2 0.5 BSC TOP VIEW B 4.9 ± 0.15 SIDE VIEW 2 0.18 ± 0.05 3.0 ± 0.1 0.95 BSC Gauge H 0.86 ± 0.09 C SEATING PLANE 0.23 +0.07/ -0.08 0.08 C A B SIDE VIEW 1 0.10 ± 0.05 0.10 C DETAIL "X" 3°±3° 0.55 ± 0.15 Plane 0.25 5.80 4.40 3.00 NOTES: 1. 2. 0.50 0.30 1.40 TYPICAL RECOMMENDED LAND PATTERN 3. 4. 5. 6. Dimensions are in millimeters. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. Plastic or metal protrusions of 0.15mm max per side are not included. Plastic interlead protrusions of 0.25mm max per side are not included. Dimensions “D” and “E1” are measured at Datum Plane “H”. This replaces existing drawing # MDP0043 MSOP10L. 20 FN6339.4 July 26, 2011