ISL8117DEMO3Z

USER’S MANUAL ISL8117DEMO3Z UG058 Rev 0.00 November 24, 2015 Demonstration Board User Guide Description Key Features The ISL8117DEMO3Z demonstration board (shown in Figure 4) features the ISL8117. The ISL8117 is a 60V high voltage synchronous buck controller that offers external soft-start, independent enable functions and integrates UV/OV/OC/OT protection. Its current mode control architecture and internal compensation network keep peripheral component count minimal. Programmable switching frequency ranging from 100kHz to 2MHz helps to optimize inductor size while the strong gate driver delivers up to 30A for the buck output. • Small, compact design Specifications • PGOOD indicator • Wide input range: 4.5V to 60V • High light-load efficiency in pulse skipping DEM operation • Programmable soft-start • Optional DEM/CCM operation • Supports prebias output with SR soft-start • External frequency sync • OCP, OVP, OTP, UVP protection The ISL8117DEMO3Z demonstration board is designed for high current applications. The current rating of the ISL8117DEMO3Z is limited by the FETs and inductor selected. The electrical ratings of ISL8117DEMO3Z are shown in Table 1. References • ISL8117 datasheet TABLE 1. ELECTRICAL RATINGS PARAMETER Input Voltage Ordering Information RATING 4.5V to 60V PART NUMBER Switching Frequency 300kHz ISL8117DEMO3Z Output Voltage 3.3V Output Current 6A OCP Set Point Minimum 8A at ambient room temperature VIN DESCRIPTION High voltage PWM step-down synchronous buck controller VOUT UGATE LGATE/OCS ISL8117 EN DISABLE MOD/SYNC CCM VCC5C DEM FIGURE 1. ISL8117DEMO3Z BLOCK DIAGRAM UG058 Rev 0.00 November 24, 2015 Page 1 of 10 ISL8117DEMO3Z Recommended Testing Equipment The following materials are recommended to perform testing: • 0V to 60V power supply with at least 10A source current capability • Electronic loads capable of sinking current up to 10A • Digital Multimeters (DMMs) • 100MHz quad-trace oscilloscope Quick Test Guide 1. Ensure that the circuit is correctly connected to the supply and electronic loads prior to applying any power. Please refer to Figure 3, on page 3 for proper setup. Evaluating the Other Output Voltages The ISL8117DEMO3Z output is preset to 3.3V, however, the output can be adjusted from 1.8V to 5V. The output voltage programming resistor, R2 , will depend on the desired output voltage of the regulator and the value of the feedback resistor R1, as shown in Equation 1. 0.6 R 2 = R 1  ------------------------------ V  OUT – 0.6 Table 2 shows the component selection that should be used for the respective VOUT of 1.8V, 3.3V and 5V. TABLE 2. EXTERNAL COMPONENT SELECTION VOUT (V) R2 (kΩ) 1.8 24.9 3.3 11 5 6.8 2. Turn on the power supply. 3. Adjust input voltage VIN within the specified range and observe output voltage. The output voltage variation should be within 3%. 4. Adjust load current within the specified range and observe output voltage. The output voltage variation should be within 3%. 5. Use an oscilloscope to observe output voltage ripple and phase node ringing. For accurate measurement, please refer to Figure 2 for proper test setup. OUTPUT CAP OUTPUT OUTPUT CAP CAP OR ORMOSFET MOSFET FIGURE 2. PROPER PROBE SETUP TO MEASURE OUTPUT RIPPLE AND PHASE NODE RINGING Functional Description The ISL8117DEMO3Z is a compact design with high efficiency and high power density. As shown in Figure 3 on page 3, 4.5V to 60V VIN is supplied to J1 (+) and J2 (-). The regulated 3.3V output on J3 (+) and J5 (-) can supply up to 6A to the load. Operating Range The input voltage range is from 4.5V to 60V for an output voltage of 3.3V. The rated load current is 6A with the OCP point set at a minimum 8A at room temperature ambient conditions. (EQ. 1) PCB Layout Guidelines Careful attention to layout requirements is necessary for successful implementation of an ISL8117 based DC/DC converter. The ISL8117 switches at a very high frequency and therefore the switching times are very short. At these switching frequencies, even the shortest trace has significant impedance. Also, the peak gate drive current rises significantly in an extremely short time. Transition speed of the current from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit elements. These voltage spikes can degrade efficiency, generate EMI and increase device overvoltage stress and ringing. Careful component selection and proper PC board layout minimizes the magnitude of these voltage spikes. There are three sets of critical components in a DC/DC converter using the ISL8117: • The controller • The switching power components • The small signal components The switching power components are the most critical from a layout point of view because they switch a large amount of energy, which tends to generate a large amount of noise. The critical small signal components are those connected to sensitive nodes or those supplying critical bias currents. A multilayer printed circuit board is recommended. The ISL8117 has an operating temperature range of -40°C to +125°C. Please note that airflow is needed. UG058 Rev 0.00 November 24, 2015 Page 2 of 10 ISL8117DEMO3Z 1. The input capacitors, upper FET, lower FET, inductor and output capacitor should be placed first. Isolate these power components on dedicated areas of the board with their ground terminals adjacent to one another. Place the input high frequency decoupling ceramic capacitors very close to the MOSFETs. 2. If signal components and the IC are placed in a separate area to the power train, it is recommended to use full ground planes in the internal layers with shared SGND and PGND to simplify the layout design. Otherwise, use separate ground planes for power ground and small signal ground. Connect the SGND and PGND together close to the IC. DO NOT connect them together anywhere else. 3. The loop formed by the input capacitor, the top FET and the bottom FET must be kept as small as possible. 4. Ensure the current paths from the input capacitor to the MOSFET, to the output inductor and the output capacitor are as short as possible with maximum allowable trace widths. 5. Place the PWM controller IC close to the lower FET. The LGATE connection should be short and wide. The IC can be best placed over a quiet ground area. Avoid switching ground loop currents in this area. 6. Place VCC5V bypass capacitor very close to the VCC5V pin of the IC and connect its ground to the PGND plane. 7. Place the gate drive components (optional BOOT diode and BOOT capacitors)- together near the controller IC. 8. The output capacitors should be placed as close to the load as possible. Use short wide copper regions to connect output capacitors to load to avoid inductance and resistances. 9. Use copper filled polygons or wide but short trace to connect the junction of the upper FET, lower FET and output inductor. Also keep the PHASE node connection to the IC short. DO NOT unnecessarily oversize the copper islands for the PHASE node. Since the phase nodes are subjected to very high dv/dt voltages, the stray capacitor formed between these islands and the surrounding circuitry will tend to couple switching noise. 10. Route all high speed switching nodes away from the control circuitry. 11. Create a separate small analog ground plane near the IC. Connect the SGND pin to this plane. All small signal grounding paths including feedback resistors, current limit setting resistor, soft-starting capacitor and EN pull-down resistor should be connected to this SGND plane. 12. Separate the current sensing trace from the PHASE node connection. 13. Ensure the feedback connection to the output capacitor is short and direct. - + VO A + + VIN - LOAD Layout Considerations V + - A - FIGURE 3. PROPER TEST SETUP UG058 Rev 0.00 November 24, 2015 Page 3 of 10 ISL8117DEMO3Z ISL8117DEMO3Z Demonstration Board FIGURE 4. ISL8117DEMO3Z TOP SIDE FIGURE 5. ISL8117DEMO3Z BOTTOM SIDE UG058 Rev 0.00 November 24, 2015 Page 4 of 10 8* 02'6