ISL91127IINZ-T

DATASHEET ISL91127 FN8418 Rev 5.01 Aug 26, 2022 High Efficiency Buck-Boost Regulator with 4.5A Switches The ISL91127 is a high-current, buck-boost switching regulator for systems using new battery chemistries. It uses the Renesas proprietary buck-boost algorithm to maintain voltage regulation while providing excellent efficiency and very low output voltage ripple when the input voltage is close to the output voltage. Features The ISL91127 can deliver at least 2.1A continuous output current (VOUT = 3.3V) across a battery voltage range of 2.5V to 4.35V. This maximizes the energy utilization of advanced, single-cell Li-ion battery chemistries that have significant capacity left at voltages below the system voltage. Its fully synchronous low ON-resistance 4-switch architecture and a low quiescent current of only 30µA optimize efficiency under all load conditions. • Input voltage range: 1.8V to 5.5V The ISL91127 supports stand-alone applications with a fixed 3.3V or 3.5V output voltage or adjustable output voltage with an external resistor divider. Output voltages as low as 1V or as high as 5.2V are supported. • Fully protected for short-circuit, over-temperature, and undervoltage The ISL91127 is available in a 20 bump, 0.4mm pitch WLCSP (2.15mmx1.74mm) with a 2.5MHz switching frequency, which further reduces the size of external components. Applications • Accepts input voltages above or below regulated output voltage • Automatic and seamless transitions between Buck and Boost modes • Continuous output current: up to 2.1A (PVIN = 2.5V, VOUT = 3.3V) • High efficiency: up to 96% • 30µA quiescent current maximizes light-load efficiency • 2.5MHz switching frequency minimizes external component size • Small 2.15mmx1.74mm WLCSP • Brownout-free system voltage for smartphones and tablet PCs • Wireless communication devices • 2G/3G/4G RF power amplifiers 100 VIN = 3.6V C1 10µF LX1 PVIN L1 1µH LX2 VIN VOUT EN MODE FB VOUT = 3.3V C2 2x22µF EFFICIENCY (%) ISL91127IINZ VIN = 1.8V TO 5.5V VIN = 4V 95 90 85 VIN = 3.3V VIN = 3V VIN = 2.5V 80 SGND PGND 75 1 10 100 100 0 LOAD CURREN T (mA) FIGURE 1. TYPICAL APPLICATION: VOUT = 3.3V FN8418 Rev 5.01 Aug 26, 2022 FIGURE 2. EFFICIENCY: VOUT = 3.3V Page 1 of 12 © 2016-2022 Renesas Electronics ISL91127 Block Diagram LX1 LX2 B1 B2 B3 D1 D2 D3 E1 A1 PVIN A2 E2 VOUT A3 SOFT DISCHARGE REVERSE CURRENT GATE DRIVERS AND ANTISHOOT THRU EN EN C1 EN VIN A4 E3 C2 PGND VREF PVIN MONITOR THERMAL SHUTDOWN MODE C3 VOUT CLAMP PWM CONTROL CURRENT DETECT EN EN B4 VOUT MONITOR EN E4 FB EN SGND D4 OSC REF ERROR AMP C4 VOLTAGE PROG. FIGURE 3. BLOCK DIAGRAM Pin Configuration ISL91127 (20 BALL WLCSP, 0.4mm PITCH) TOP VIEW, BUMPS DOWN 1 A PVIN 2 PVIN 3 PVIN VIN LX1 LX1 LX1 EN C PGND PGND MODE SGND E LX2 VOUT FN8418 Rev 5.01 Aug 26, 2022 LX2 VOUT LX2 VOUT PIN # PIN NAMES A1, A2, A3 PVIN Power input. Range: 1.8V to 5.5V. Connect 2x10μF capacitors to PGND. B1, B2, B3 LX1 Inductor connection, input side C1, C2 PGND D1, D2, D3 LX2 E1, E2, E3 VOUT Buck-boost regulator output. Connect 2x22μF capacitors to PGND. C3 MODE Logic input, HIGH for auto PFM mode. LOW for forced PWM operation. A4 VIN Supply input. Range: 1.8V to 5.5V. B4 EN Logic input, drive HIGH to enable device. C4, D4 SGND E4 FB 4 B D Pin Descriptions SGND FB DESCRIPTION Power ground for high switching current Inductor connection, output side Analog ground pin Voltage feedback pin Page 2 of 12 ISL91127 Ordering Information PART NUMBER (Notes 2, 3) ISL91127IINZ-T PART MARKING OUTPUT VOLTAGE PACKAGE (V) (RoHS COMPLIANT) GAXU 3.3 20 Ball WLCSP PKG. DWG. # CARRIER TYPE (Note 1) TEMP. RANGE W4x5.20M Reel, 3k -40 to +85°C ISL91127IINZ-T7A ISL91127II2AZ-T Reel, 250 GAXV 3.5 Reel, 3k ISL91127II2AZ-T7A ISL91127IIAZ-T Reel, 250 GAXT ADJ Reel, 3k ISL91127IIAZ-T7A Reel, 250 ISL91127IIN-EVZ Evaluation Board for ISL91127IINZ ISL91127II2A-EVZ Evaluation Board for ISL91127II2AZ ISL91127IIA-EVZ Evaluation Board for ISL91127IIAZ NOTES: 1. Refer to TB347 for details about reel specifications. 2. These Pb-free WLCSP packaged products employ special Pb-free material sets; molding compounds/die attach materials and SnAgCu - e1 solder ball terminals, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free WLCSP packaged products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), see the ISL91127 product information page. For more information about MSL, see TB363. TABLE 1. KEY DIFFERENCES BETWEEN FAMILY OF PARTS BUCK-BOOST REGULATION BYPASS DYNAMIC VOLTAGE SCALING I2C PACKAGE ISL91127 Yes No No No WLCSP ISL91127IR Yes No No No QFN ISL91128 Yes Yes Yes Yes WLCSP PART NUMBER NOTE: For the full family of ISL911xx buck-boost regulators, please visit our website. FN8418 Rev 5.01 Aug 26, 2022 Page 3 of 12 ISL91127 Absolute Maximum Ratings Thermal Information PVIN, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V LX1, LX2. . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5VDC, -2V to 7V for 10ns FB (Adjustable Version) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.7V FB (Fixed VOUT Versions) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V GND, PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V ESD Rating Human Body Model (Tested per JS-001-2010). . . . . . . . . . . . . . . . .2.5kV Machine Model (Tested per JESD22-A115C) . . . . . . . . . . . . . . . . . 250V Charged Device Model (Tested per JS-002-2014) . . . . . . . . . . . . . . . 1kV Latch-Up (Tested per JESD-78D; Class 2, Level A) . . . . . . . . . . . . . . 100mA Thermal Resistance (Typical) JA (°C/W) JB (°C/W) 20 Ball WLCSP Package (Notes 4, 5) . . . . 72 16 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . .+125°C Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 Recommended Operating Conditions Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8V to 5.5V Maximum Load Current VIN = 2.5V VOUT = 3.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1ADC CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. JA is measured in free air with the component mounted on a high-effective thermal conductivity test board with “direct attach” features. See TB379. 5. For JB, the board temp is taken on the board near the edge of the package, on a trace at the middle of one side. See TB379. Analog Specifications VIN = VPVIN = VEN = 3.6V, VOUT = 3.3V, L1 = 1µH, C1 = 2x10µF, C2 = 2x22µF, TA = +25°C. Boldface limits apply across the operating temperature range, -40°C to +85°C and input voltage range (1.8V to 5.5V) unless specified otherwise. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX (Note 6) (Note 7) (Note 6) UNIT POWER SUPPLY Input Voltage Range VIN Undervoltage Lockout Threshold 1.8 5.5 V 1.795 V 30 55 µA 0.05 1.00 µA 1.00 5.20 V VIN = 3.7V, VOUT = 3.3V, IOUT = 0mA, PWM mode -2 +2 % VIN = 3.7V, VOUT = 3.3V, IOUT = 1mA, PFM mode -3 +4 % VIN VUVLO Rising Falling VIN Supply Current IVIN PFM mode, 1.8V ≤ VIN ≤ 5V, no external load on VOUT (Note 8) VIN Supply Current, Shutdown ISD EN = GND, VIN = 3.6V 1.725 1.550 1.650 V OUTPUT VOLTAGE REGULATION Output Voltage Range VOUT Output Voltage Accuracy ISL91127IIAZ, IOUT = 100mA, VIN = 3.6V FB Pin Voltage Regulation VFB For adjustable output version, VIN = 3.6V FB Pin Bias Current IFB For adjustable output version 0.783 0.800 0.813 V 20 nA Line Regulation, PWM Mode VOUT/ VIN IOUT = 500mA, VIN steps from 2.8V to 5.5V 2.2 mV/V Line Regulation, PFM Mode VOUT/ VI IOUT = 100mA, VIN steps from 2.8V to 5.5V 2.7 mV/V Load Regulation VOUT/ IOUT VIN = 3.7V, IOUT steps from 0A to 1A 0.021 mV/mA Output Voltage Clamp VCLAMP Rising 5.25 Output Voltage Clamp Hysteresis 5.95 400 V mV DC/DC SWITCHING SPECIFICATIONS Oscillator Frequency 2.10 fSW 2.50 2.90 MHz 80 ns Minimum On-Time tON(MIN) LX1 Pin Leakage Current IPFETLEAK VIN = 3.6V -1 1 µA LX2 Pin Leakage Current INFETLEAK VIN = 3.6V -1 1 µA FN8418 Rev 5.01 Aug 26, 2022 Page 4 of 12 ISL91127 Analog Specifications VIN = VPVIN = VEN = 3.6V, VOUT = 3.3V, L1 = 1µH, C1 = 2x10µF, C2 = 2x22µF, TA = +25°C. Boldface limits apply across the operating temperature range, -40°C to +85°C and input voltage range (1.8V to 5.5V) unless specified otherwise. (Continued) PARAMETER MIN TYP MAX (Note 6) (Note 7) (Note 6) UNIT Time from when EN signal asserts to when output voltage ramp starts. 1 ms Time from when output voltage ramp starts to when output voltage reaches 95% of its nominal value with device operating in Buck mode. VIN = 4V, VOUT = 3.3V, IO = 200mA 2 ms Time from when output voltage ramp starts to when output voltage reaches 95% of its nominal value with device operating in Boost mode. VIN = 2V, VOUT = 3.3V, IO = 200mA 2 ms 120 Ω SYMBOL TEST CONDITIONS tSS SOFT-START AND SOFT DISCHARGE Soft-Start Time VOUT Soft Discharge ON-Resistance rDISCHG EN < VIL POWER MOSFET P-Channel MOSFET ON-Resistance rDS(ON)_P VIN = 3.6V, IO = 200mA 28 mΩ N-Channel MOSFET ON-Resistance rDS(ON)_N VIN = 3.6V, IO = 200mA 26 mΩ P-Channel MOSFET Peak Current Limit IPK_LMT VIN = 3.6V 3.8 4.3 5.0 A PFM/PWM TRANSITION Load Current Threshold, PFM to PWM VIN = 3.6V, VOUT = 3.3V 360 mA Load Current Threshold, PWM to PFM VIN = 3.6V, VOUT = 3.3V 160 mA Thermal Shutdown 150 °C Thermal Shutdown Hysteresis 30 °C LOGIC INPUTS ILEAK VIN = 3.6V Input HIGH Voltage VIH VIN = 3.6V Input LOW Voltage VIL VIN = 3.6V Input Leakage 0.05 1 µA 0.4 V 1.4 V NOTES: 6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 7. Typical values are for TA = +25°C and VIN = 3.6V. 8. Quiescent current measurements are taken when the output is not switching. FN8418 Rev 5.01 Aug 26, 2022 Page 5 of 12 ISL91127 Typical Performance Curves Unless otherwise noted, operating conditions are: TA = +25°C, VIN = EN = 3.6V, L1 = 1µH, C1 = 2x10µF, C2 = 2x22µF, VOUT = 3.3V, IOUT = 0A to 3A. 100 3.294 LOAD = 100mA 98 3.29 OUTPUT VOLTAGE (V) EFFICIENCY (%) 96 94 92 90 LOAD = 10mA 88 86 84 LOAD = 1000mA 3.288 3.286 3.28 3.278 VIN = 3.6V 3.276 3.274 3.272 3.27 3 VIN = 3.3V 3.282 80 2.5 VIN = 3V 3.284 82 2 VIN = 4V 3.292 LOAD = 500mA 3.5 4 4.5 VI N = 2.5V 1 5 10 100 100 0 LOAD CURRENT (mA) VIN (V ) FIGURE 5. OUTPUT VOLTAGE vs LOAD CURRENT FIGURE 4. EFFICIENCY vs INPUT VOLTAGE 80 TA = +25oC 2.45 TA = +85oC SWITCHING FREQUENCY (MHz) QUIESCENT CURRENT (µA) 70 60 50 40 30 TA = -40oC 20 10 2.4 2.35 2.3 2.25 2.2 2.15 0 1.5 2 2.5 3 3.5 4 VIN (V) 4.5 5 5.5 6 FIGURE 6. QUIESCENT CURRENT vs INPUT VOLTAGE (VOUT = 3.3V, MODE = HIGH) 1 .5 2.5 3.5 VIN (V) 4.5 5.5 FIGURE 7. SWITCHING FREQUENCY vs INPUT VOLTAGE LX1 (2V/DIV) LX2 (2V/DIV) LX2 (2V/DIV) LX1 (2V/DIV) VOUT (AC, 50mV/DIV) IL (500mA/DIV) 400ns/DIV FIGURE 8. STEADY-STATE OPERATION IN PFM (VIN = 4V, VOUT = 3.3V, NO LOAD) FN8418 Rev 5.01 Aug 26, 2022 VOUT (AC, 10mV/DIV) IL (200mA/DIV) 400ns/DIV FIGURE 9. STEADY-STATE OPERATION IN PWM (VIN = 3.3V, VOUT = 3.3V, NO LOAD) Page 6 of 12 ISL91127 Typical Performance Curves Unless otherwise noted, operating conditions are: TA = +25°C, VIN = EN = 3.6V, L1 = 1µH, C1 = 2x10µF, C2 = 2x22µF, VOUT = 3.3V, IOUT = 0A to 3A. (Continued) VOUT (1V/DIV) VOUT (1V/DIV) EN (2V/DIV) EN (2V/DIV) IL (500mA/DIV) IL (500mA/DIV) 400µs/DIV FIGURE 10. SOFT-START (VIN = 3.6V, VOUT = 3.3V, NO LOAD) 400µs/DIV FIGURE 11. SOFT-START (VIN = 3.6V, VOUT = 3.3V, 1A LOAD) IL (1A/DIV) LX1 (2V/DIV) VOUT (AC, 100mV/DIV) LX2 (2V/DIV) IL (1A/DIV) VOUT (AC, 100mV/DIV) 100µs/DIV 400ns/DIV FIGURE 12. STEADY-STATE OPERATION (VIN = 2.5V, VOUT = 3.3V, 2A LOAD) FIGURE 13. 0A TO 2A LOAD TRANSIENT (VIN = 3.6V, VOUT = 3.3V) VOUT (AC, 100mV/DIV) VOUT (AC, 100mV/DIV) IL (500mA/DIV) IL (500mA/DIV) 100µs/DIV 100µs/DIV FIGURE 14. 0.5A TO 1.5A LOAD TRANSIENT (VIN = 3.6V, VOUT = 3.3V) FIGURE 15. 0A TO 1A LOAD TRANSIENT (VIN = 3.6V, VOUT = 3.3V) FN8418 Rev 5.01 Aug 26, 2022 Page 7 of 12 ISL91127 Typical Performance Curves Unless otherwise noted, operating conditions are: TA = +25°C, VIN = EN = 3.6V, L1 = 1µH, C1 = 2x10µF, C2 = 2x22µF, VOUT = 3.3V, IOUT = 0A to 3A. (Continued) VIN (1V/DIV) LX1 (2V/DIV) LX2 (2V/DIV) VOUT (2V/DIV) VOUT (AC, 100mV/DIV) IL (2A/DIV) 100µs/DIV 20ms/DIV FIGURE 17. 4V TO 3.2V LINE TRANSIENT (VOUT = 3.3V, LOAD = 1A) FIGURE 16. OUTPUT SHORT-CIRCUIT BEHAVIOR (VIN = 3.6V, VOUT = 3.3V) MAXIMUM OUTPUT CURRENT (A) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 2.5 3 3.5 4 4.5 5 5.5 INPUT VOLTAGE (V) FIGURE 18. OUTPUT CURRENT CAPABILITY: VOUT = 3.3V, TA = +25°C Functional Description Enable Input Functional Overview Enable the device by asserting the EN pin HIGH. Driving EN LOW invokes a power-down mode, in which most internal device functions are disabled. The ISL91127 implements a complete buck-boost switching regulator with PWM controller, internal switches, references, protection circuitry, and control inputs. Refer to the “Block Diagram” on page 2 The PWM controller automatically switches between Buck and Boost modes as necessary to maintain a steady output voltage with changing input voltages and dynamic external loads. Internal Supply and References Referring to the “Block Diagram”, the ISL91127 provides three PVIN power input pins. The PVIN pins supply input power to the DC/DC converter. An additional VIN pin provides an operating voltage source required for stable VREF generation. Separate ground pins (PGND and SGND) are provided to avoid problems caused by ground shift due to the high switching currents. FN8418 Rev 5.01 Aug 26, 2022 Soft Discharge When the device is disabled by driving EN LOW, an internal resistor between VOUT and GND is activated to slowly discharge the output capacitor. This internal resistor has a typical 120Ω resistance. POR Sequence and Soft-Start Asserting the EN pin HIGH allows the device to power up. The following events occur during the start-up sequence: The internal voltage reference powers up and stabilizes. The device then starts operating. There is a typical 1ms delay between assertion of the EN pin and the start of the switching regulator soft-start ramp. The soft-start feature minimizes output voltage overshoot and input inrush currents. During soft-start, the reference voltage is ramped to provide a ramping VOUT voltage. While the output voltage is lower than approximately 20% of the target output Page 8 of 12 ISL91127 voltage, switching frequency is reduced to a fraction of the normal switching frequency to aid in producing low duty cycles necessary to avoid input inrush current spikes. When the output voltage exceeds 20% of the target voltage, the switching frequency is increased to its nominal value. When the target output voltage is higher than the input voltage, the device transitions from Buck mode to Boost mode during the soft-start sequence. At the time of this transition, the ramp rate of the reference voltage is decreased, such that the output voltage slew rate is decreased. This provides a slower output voltage slew rate. The VOUT ramp time is not constant for all operating conditions. Soft-start into Boost mode takes longer than soft-start into Buck mode. The total soft-start time into Buck operating mode is typically 2ms, whereas the typical soft-start time into Boost operating mode is typically 3ms. Increasing the load current increases these typical soft-start times. Short-Circuit Protection The ISL91127 provides short-circuit protection by monitoring the feedback voltage. When feedback voltage is sensed to be lower than a certain threshold, the PWM oscillator frequency is reduced in order to protect the device from damage. The P-channel MOSFET peak current limit remains active during this state. Thermal Shutdown A built-in thermal protection feature protects the ISL91127 if the die temperature reaches +155°C (typical). At this die temperature, the regulator is completely shut down. The die temperature continues to be monitored in this thermal shutdown mode. When the die temperature falls to +125°C (typical), the device will resume normal operation. When exiting thermal shutdown, the ISL91127 will execute its soft-start sequence. Buck-Boost Conversion Topology The ISL91127 operates in either Buck or Boost mode. When operating in conditions where PVIN is close to VOUT, the ISL91127 alternates between Buck and Boost modes as necessary to provide a regulated output voltage. L1 LX1 SWITCH A PWM Operation During PWM operation in Buck mode, Switch D is continuously closed and Switch C is continuously open. Switches A and B operate as a synchronous buck converter when in this mode. During PWM operation in Boost mode, Switch A remains closed and Switch B remains open. Switches C and D operate as a synchronous boost converter when in this mode. PFM Operation During PFM operation in Buck mode, Switch D is continuously closed and Switch C is continuously open. Switches A and B operate in discontinuous mode during PFM operation. During PFM operation in Boost mode, the ISL91127 closes Switch A and Switch C to ramp up the current in the inductor. When the inductor current reaches a certain threshold, the device turns off Switches A and C, then turns on Switches B and D. With Switches B and D closed, output voltage increases as the inductor current ramps down. In most operating conditions, there will be multiple PFM pulses to charge up the output capacitor. These pulses continue until VOUT has achieved the upper threshold of the PFM hysteretic controller. Switching then stops, and remains stopped until VOUT decays to the lower threshold of the hysteretic PFM controller. Operation with VIN Close to VOUT When the output voltage is close to the input voltage, the ISL91127 rapidly and smoothly switches from Boost to Buck mode as needed to maintain the regulated output voltage. This behavior provides excellent efficiency and very low output voltage ripple. Output Voltage Programming The ISL91127 is available in fixed and adjustable output voltage versions. To use the fixed output version, the VOUT pin must be connected directly to FB. In the adjustable output voltage version (ISL91127IIAZ), an external resistor divider is required to program the output voltage. The FB pin has very low input leakage current, so it is possible to use large value resistors (for example, R1 = 1MΩ and R2 = 324kΩ for VOUT = 3.3V) in the resistor divider connected to the FB input. LX2 SWITCH D PVIN VOUT SWITCH B SWITCH C FIGURE 19. BUCK-BOOST TOPOLOGY Figure 19 shows a simplified diagram of the internal switches and external inductor. FN8418 Rev 5.01 Aug 26, 2022 Page 9 of 12 ISL91127 Applications Information Feed-Forward Capacitor Selection A small capacitor (C3 in Figure 19) in parallel with resistor R1 is required to provide the specified load and line regulation. The suggested value of this capacitor is 56pF for R1 = 1MΩ. An NPO type capacitor is recommended. Component Selection The fixed-output version of the ISL91127 requires only three external power components to implement the buck-boost converter: an inductor, an input capacitor, and an output capacitor. Inductor Selection The adjustable output version of the ISL91127 requires three additional components to program the output voltage, as shown in Figure 19. Two external resistors program the output voltage and a small capacitor is added to improve stability and response. . ISL91127IIAZ VIN = 1.8V TO 5.5V C1 10µF PVIN LX1 L1 1µH LX2 VIN VOUT = 1V TO VOUT EN R1 PGND SGND MODE C3 C2 2x22µF FB R2 Use an inductor with high frequency core material (for example, ferrite core) to minimize core losses and provide good efficiency. The inductor must be able to handle the peak switching currents without saturating. A 1µH inductor with ≥4A saturation current rating is recommended. Select an inductor with low DCR to provide good efficiency. In applications where radiated noise must be minimized, a toroidal or shielded inductor can be used (refer to Table 3). PVIN and VOUT Capacitor Selection The input and output capacitors should be ceramic X5R type with low ESL and ESR. The recommended input capacitor value is 10µF. The recommended VOUT capacitor value is 2x22µF. TABLE 2. CAPACITOR VENDOR INFORMATION FIGURE 20. ADJUSTABLE OUTPUT APPLICATION MANUFACTURER Output Voltage Programming, Adjustable Version Select the external resistor values to set and control the output voltage of the ISL91127IIAZ (adjustable output version). DESCRIPTION Murata GRM188R61A226ME15D 22µF, 0603, 10V, X5R TDK C1608X5R1A226M080AC 22µF, 0603, 10V, X5R Recommended PCB Layout Equation 1 can be used to derive the R1 and R2 resistor values: R   V OUT = 0.8V   1 + ------1- R  2 PN (EQ. 1) When designing a PCB, include a GND guard band around the feedback resistor network to reduce noise and improve accuracy and stability. Position resistors R1 and R2 close to the FB pin. Correct PCB layout is critical for proper operation of the ISL91127. Place the input and output capacitors as close to the IC as possible. The ground connections of the input and output capacitors should be kept as short as possible and should be on the component layer to avoid problems that are caused by high switching currents flowing through PCB vias. TABLE 3. INDUCTOR VENDOR INFORMATION MANUFACTURER Toko Coilcraft MANUFACTURER PART NUMBER DESCRIPTION DIMENSION (mm) WEBSITE 1277AS-H-1R0M 1µH, 20%, DCR = 34mΩtypicalISAT = 4.6A (typical) 3.2x2.5x1.2 www.toko.com FDSD0312-H-1R0M 1µH, 20%, DCR = 43mΩtypicalISAT = 4.5A (typical) 3.2x3.0x1.2 XFL4020-102ME 1µH, 20%, DCR = 11mΩtypicalISAT = 5.1A (typical) 4.0x4.0x2.1 www.coilcraft.com FN8418 Rev 5.01 Aug 26, 2022 Page 10 of 12 ISL91127 Revision History The revision history provided is for informational purposes only and is believed to be accurate, however, not warranted. Please visit to web to make sure you have the latest revision. DATE REVISION Aug 26, 2022 5.01 Updated Ordering Information table formatting. Updated first sentence in the Output Voltage Programming, Adjustable Version section. Jan 28, 2022 5.00 Updated Figure 3: Removed the resistive connection between EN and SGND. Removed Related Literature. May 24, 2018 4.00 Removed About Intersil section. Updated Disclaimer and moved to page 13. Jan 5, 2017 3.00 Updated Related Literature section on page 1. Updated Table 1 on page 3. - changed “VSEL” column to “Dynamic Voltage Scaling” and made ISL91128 parameter “Yes”. - removed “and DVS” from I2C column. Aug 9, 2016 2.00 Removed burst current features bullet on page 1. Updated Table 1 on page 3. Removed “VIN = 3.0V VOUT = 3.3V, tON = 600µs, t = 4.6ms...3A” from the “Recommended Operating Conditions” on page 4. Jul 15, 2016 1.00 Updated 2 feature bullets to clarify statement. Updated Table 1 on page 3. Updated test conditions for VIN supply current page 4 from “PFM mode, no external load on VOUT” to “PFM mode, 1.8V ≤ VIN ≤ 5V, no external load on”. Updated “P-Channel MOSFET ON-Resistance” typical from 35 to 28 and “N-Channel MOSFET ON-Resistance” typical from 24 to 26 typical. Added Figure 18, “OUTPUT CURRENT CAPABILITY” to typical Performance Curves” on page 8. Apr 5, 2016 0.00 Initial Release FN8418 Rev 5.01 Aug 26, 2022 CHANGE Page 11 of 12 ISL91127 Package Outline Drawing For the most recent package outline drawing, see W4x5.20M. W4x5.20M 20 BALL WAFER LEVEL CHIP SCALE PACKAGE (WLCSP 0.4mm PITCH) Rev 0, 01/15 X Y 0.400 1.74 ±0.030 20x 0.265 ±0.035 E D C 2.15 ±0.030 B A (4X) 0.10 PIN 1 (A1 CORNER) TOP VIEW 0.275 1 2 3 4 0.200 0.270 BOTTOM VIEW 0.240 Z PACKAGE OUTLINE 0.05 Z SEATING PLANE 3 0.400 0.290 2 0.265 ±0.035 x20 0.10 0.05 ZXY Z 4 0.200 ±0.030 6 NSMD RECOMMENDED LAND PATTERN 0.500 ±0.050 SIDE VIEW NOTES: 9. Dimensions and tolerance per ASMEY 14.5 - 1994. 10. Dimension is measured at the maximum bump diameter parallel to primary datum Z. 11. Primary datum Z and seating plane are defined by the spherical crowns of the bump. 12. Bump position designation per JESD 95-1, SPP-010. 13. All dimensions are in millimeters. 14. NSMD refers to non-solder mask defined pad design per Intersil Techbrief TB451. FN8418 Rev 5.01 Aug 26, 2022 Page 12 of 12 IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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