LP3995

LP3995 Micropower 150mA CMOS Voltage Regulator with Active Shutdown January 4, 2008 LP3995 Micropower 150mA CMOS Voltage Regulator with Active Shutdown General Description The LP3995 linear regulator is designed to meet the requirements of portable battery-powered applications and will provide an accurate output voltage with low noise and low quiescent current. Ideally suited for powering RF/Analog devices, this device will also be used to meet more general circuit needs in which a fast turn-off is essential. For battery powered applications the low dropout and low ground current provided by the device allows the lifetime of the battery to be maximized. The Enable(/Disable) control allows the system to further extend the battery lifetime by reducing the power consumption to virtually zero. The Enable(/Disable) function on the device incorporates an active discharge circuit on the output for faster device shutdown. Where the fast turn-off is not required the LP3999 linear regulator is recommended. The LP3995 also features internal protection against shortcircuit currents and over-temperature conditions. The LP3995 is designed to be stable with small 1.0 µF ceramic capacitors. The small outline of the LP3995 micro SMD package with the required ceramic capacitors can realize a system application within minimal board area. Performance is specified for a −40°C to +125°C temperature range. The device is available in micro SMD package and LLP package. For other package options contact your local NSC sales office. The device is available in fixed output voltages in the ranges 1.5V to 3.3V. For availability, please contact your local NSC sales office. Key Specifications ■ ■ ■ ■ ■ ■ ■ ■ ■ 2.5V to 6.0V Input Range Accurate Output Voltage; ±75mV / 2% 60 mV Typical Dropout with 150 mA Load Virtually Zero Quiescent Current when Disabled Low Output Voltage Noise Stable with a 1 µF Output Capacitor Guaranteed 150 mA Output Current Fast Turn-on; 30 µs (Typ.) Fast Turn-off; 175 µs (Typ.) Features ■ ■ ■ ■ ■ ■ ■ ■ 5 pin micro SMD Package 6 pin LLP Package Stable with Ceramic Capacitor Logic Controlled Enable Fast Turn-on Active Disable for Fast Turn-off. Thermal-overload and Short-circuit Protection −40 to +125°C Junction Temperature Range for Operation Applications ■ ■ ■ ■ ■ GSM Portable Phones CDMA Cellular Handsets Wideband CDMA Cellular Handsets Bluetooth Devices Portable Information Appliances Typical Application Circuit 20034901 © 2008 National Semiconductor Corporation 200349 www.national.com LP3995 Block Diagram 20034902 Pin Descriptions 5 Pin micro SMD and LLP - 6 Pin No. micro SMD A1 B2 C1 C3 A3 LLP 3 2 6 1 4 5 Pad VEN GND VOUT VIN CBYPASS N/C GND Enable Input; Disables the Regulator when ≤ 0.4V. Enables the regulator when ≥ 0.9V Common Ground Voltage output. Connect this output to the load circuit. Voltage Supply Input Bypass Capacitor connection. Connect a 0.01 µF capacitor for noise reduction. No internal connection. There should not be any board connection to this pin. Ground connection. Connect to ground plane for best thermal conduction. Symbol Name and Function Connection Diagrams micro SMD, 5 Bump Package 20034903 Top View See NS Package Number TLA05 www.national.com 2 LP3995 LLP- 6 Package (SOT23 Footprint) 20034904 Top View See NS Package Number LDE06A 3 www.national.com LP3995 Ordering Information For micro SMD Package Output Voltage (V) 1.5 (Note 2) 1.6 (Note 2) 1.8 (Note 2) 1.9 (Note 2) 2.1 (Note 2) 2.5 (Note 2) 2.8 (Note 2) 2.85 (Note 2) 3.0 (Note 2) Grade LP3995 Supplied as 250 Units, Tape and Reel LP3995ITL-1.5 LP3995ITL-1.6 LP3995ITL-1.8 LP3995ITL-1.9 LP3995ITL-2.1 LP3995ITL-2.5 LP3995ITL-2.8 LP3995ITL-2.85 LP3995ITL-3.0 For micro SMD Package (Lead Free) Output Voltage (V) 1.5 1.6 1.8 1.9 2.1 2.5 2.7 2.8 2.85 3.0 Grade LP3995 Supplied as 250 Units, Tape and Reel LP3995ITL-1.5/NOPB LP3995ITL-1.6/NOPB LP3995ITL-1.8/NOPB LP3995ITL-1.9/NOPB LP3995ITL-2.1/NOPB LP3995ITL-2.5/NOPB LP3995ITL-2.7/NOPB LP3995ITL-2.8/NOPB LP3995ITL-2.85/NOPB LP3995ITL-3.0/NOPB For LLP- 6 Package Output Voltage (V) 1.5 1.6 1.8 2.8 3.0 Grade LP3995 Supplied as 1000 Units, Tape and Reel LP3995ILD-1.5 LP3995ILD-1.6 LP3995ILD-1.8 LP3995ILD-2.8 LP3995ILD-3.0 LP3995 Supplied as 4500 Units, Tape and Reel LP3995ILDX-1.5 LP3995ILDX-1.6 LP3995ILDX-1.8 LP3995ILDX-2.8 LP3995ILDX-3.0 Package Marking LO20B LO21B LO22B LO26B LO30B LP3995 Supplied as 3000 Units, Tape and Reel LP3995ITLX-1.5/NOPB LP3995ITLX-1.6/NOPB LP3995ITLX-1.8/NOPB LP3995ITLX-1.9/NOPB LP3995ITLX-2.1/NOPB LP3995ITLX-2.5/NOPB LP3995ITLX-2.7/NOPB LP3995ITLX-2.8/NOPB LP3995ITLX-2.85/NOPB LP3995ITLX-3.0/NOPB Package Marking XV I9 XV I9 XV I9 XV I9 XV I9 XV I9 XV I9 XV I9 XV I9 XV I9 LP3995 Supplied as 3000 Units, Tape and Reel LP3995ITLX-1.5 LP3995ITLX-1.6 LP3995ITLX-1.8 LP3995ITLX-1.9 LP3995ITLX-2.1 LP3995ITLX-2.5 LP3995ITLX-2.8 LP3995ITLX-2.85 LP3995ITLX-3.0 Package Marking XV I9 XV I9 XV I9 XV I9 XV I9 XV I9 XV I9 XV I9 XV I9 STD STD STD STD STD STD STD STD STD STD STD STD STD STD STD STD STD STD STD STD STD STD STD STD Note 1: Available in sample quantities only Note 2: For availability contact your local sales office www.national.com 4 LP3995 Absolute Maximum Ratings (Notes 3, 4) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Input Voltage (VIN) Output Voltage −0.3 to 6.5V −0.3 to (VIN + 0.3V) to 6.5V (max) −0.3 to 6.5V 150°C Operating Ratings Input Voltage (VIN) Enable Input Voltage Junction Temperature Ambient Temperature Range (Note 7) (Note 3) 2.5 to 6.0V 0 to 6.0V −40 to +125°C -40 to 85°C Thermal Properties Junction to Ambient Thermal Resistance θJA (LLP pkg.) θJA (micro SMD pkg.) (Note 8) Enable Input Voltage Junction Temperature Lead/Pad Temperature (Note 5) micro SMD 260°C LLP 235°C Storage Temperature −65 to +150°C Continuous Power Dissipation Internally Limited (Note 7) ESD (Note 9) Human Body Model 2 kV Machine Model 200V 88°C/W 255°C/W Electrical Characteristics Unless otherwise noted, VEN = 1.5, VIN = VOUT + 1.0V, CIN = 1 µF, IOUT = 1 mA, COUT = 1 µF, cBP = 0.01 µF. Typical values and limits appearing in normal type apply for TJ = 25°C. Limits appearing in boldface type apply over the full temperature range for operation, −40 to +125°C. (Notes 14, 15) Symbol VIN ΔVOUT Parameter Input Voltage Conditions Typical Limit Min 2.5 Max 6.0 Units V DEVICE OUTPUT: 1.5 ≤ VOUT < 1.8V Output Voltage Tolerance Line Regulation Error micro SMD Load Regulation Error LLP Load Regulation Error PSRR Power Supply Rejection Ratio (Note 11) IOUT = 1 mA VIN = (VOUT(NOM)+1.0V) to 6.0V, IOUT = 1 mA IOUT = 1 mA to 150 mA IOUT = 1 mA to 150 mA f = 1 kHz, IOUT = 1 mA f = 10 kHz, IOUT = 1 mA IOUT = 1 mA VIN = (VOUT(NOM)+1.0V) to 6.0V, IOUT = 1 mA VIN = (VOUT(NOM)+1.0V) to 6.0V, IOUT = 1 mA IOUT = 1 mA to 150 mA IOUT = 1 mA to 150 mA f = 1 kHz, IOUT = 1 mA f = 10 kHz, IOUT = 1 mA 10 80 55 50 10 70 55 53 -50 -75 -3.5 50 75 3.5 75 125 mV mV/V µV/mA µV/mA dB DEVICE OUTPUT: 1.8 ≤ VOUT < 2.5V ΔVOUT Output Voltage Tolerance microSMDLine Regulation Error LLP Line Regulation Error micro SMD Load Regulation Error LLP Load Regulation Error PSRR Power Supply Rejection Ratio (Note 11) -50 −75 −2.5 −3.5 50 75 2.5 3.5 75 125 mV mV/V mV/V µV/mA µV/mA dB 5 www.national.com LP3995 Symbol Parameter Conditions Typical Limit Min -2 −3 Max 2 3 0.1 0.002 0.005 2 100 Units DEVICE OUTPUT: 2.5 ≤ VOUT ≤ 3.3V ΔVOUT Output Voltage Tolerance Line Regulation Error micro SMD Load Regulation Error LLP Load Regulation Error Dropout Voltage PSRR Power Supply Rejection Ratio (Note 11) IOUT = 1 mA VIN = (VOUT(NOM)+1.0V) to 6.0V, IOUT = 1 mA IOUT = 1 mA to 150 mA IOUT = 1 mA to 150 mA IOUT = 1 mA IOUT = 150 mA f = 1 kHz, IOUT = 1 mA f = 10 kHz, IOUT = 1 mA (Notes 10, 11) VEN = 1.5V, IOUT = 0 mA VEN = 1.5V, IOUT = 150 mA VEN = 0.4V ISC EN TSHUTDOWN Short Circuit Current Limit Output Noise Voltage ((Note 11)) Thermal Shutdown BW = 10 Hz to 100 kHz, VIN = 4.2V, IOUT = 1mA Temperature Hysteresis ENABLE CONTROL CHARACTERISTICS IEN VIL VIH TON TOFF Maximum Input Current at VEN Input Low Input Threshold High Input Threshold Turn On Time (Note 11) Turn Off Time (Note 11) To 95% Level (Note 12) To 5% Level (Note 13) 30 175 0.9 VEN = 0.0V and VIN = 6.0V 0.001 0.4 µA V V µs µs 85 140 0.003 450 25 160 20 0.0004 0.002 0.4 60 60 50 0 150 200 1.5 mA µVrms °C µA % of VOUT (NOM) −0.1 %/V %/mA %/mA mV dB FULL VOUT RANGE ILOAD IQ Load Current Quiescent Current µA TIMING CHARACTERISTICS Note 3: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 4: All voltages are with respect to the potential at the GND pin. Note 5: For information regarding micro SMD and LLP packages please refer to the following application notes; AN-1112 Micro SMD Package Wafer Level Chip Scale Package, AN-1187. Leadless Leadframe Package. Note 6: Internal Thermal shutdown circuitry protects the device from permanent damage. Note 7: In applications where high power dissipation and/or poor thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA(max)) is dependant on the maximum operating junction temperature (TJ(max-op)), the maximum power dissipation (PD(max)), and the junction to ambient thermal resistance in the application (θJA). This relationship is given by :- TA(max) = TJ(max-op) − (PD(max) × θJA) Note 8: Junction to ambient thermal resistance is highly dependant on the application and board layout. In applications where high thermal dissipation is possible, special care must be paid to thermal issues in the board design. Note 9: The human body model is an 100 pF discharge through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. Note 10: The device maintains a stable, regulated output voltage without load. Note 11: This electrical specification is guaranteed by design. Note 12: Time from VEN = 0.9V to VOUT = 95% (VOUT(NOM)) Note 13: Time from VEN = 0.4V to VOUT = 5% (VOUT(NOM)) www.national.com 6 LP3995 Note 14: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production at TJ = 25°C or correlated using Statistical Quality Control methods. Operation over the temperature specification is guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control. Note 15: VOUT(NOM) is the stated output voltage option for the device. Recommended Output Capacitor Symbol COUT Parameter Output Capacitor Conditions Capacitance (Note 16) ESR VALUE 1.0 Limit Min 0.70 5 500 Max Units µF mΩ Note 16: The capacitor tolerance should be ±30% or better over the temperature range. The recommended capacitor type is X7R however, dependant on the application X5R, Y5V, and Z5U can also be used. Input Test Signals 20034906 FIGURE 1. Line Transient Response Input Test Signal 20034907 FIGURE 2. PSRR Input Test Signal 7 www.national.com LP3995 Typical Performance Characteristics VOUT + 1.0V, TA = 25°C, Enable pin is tied to VIN. Output Voltage Change vs Temperature Unless otherwise specified, CIN = COUT = 1.0 µF Ceramic, VIN = Ground Current vs Load Current (1.8V VOUT) 20034910 20034911 Ground Current vs Load Current (2.8V VOUT) Ground Current vs VIN @ 25°C 20034912 20034913 Ground Current vs VIN @ 125°C Dropout vs Load Current 20034914 20034915 www.national.com 8 LP3995 Short Circuit Current Line Transient Response (VOUT = 2.8V) 20034916 20034917 Ripple Rejection (VOUT = 1.8V) Ripple Rejection (VOUT = 2.8V) 20034918 20034919 Enable Start-Up Time (VOUT = 2.8V) Enable Start-Up Time (VOUT = 2.8V) 20034920 20034921 9 www.national.com LP3995 Enable Start-Up Time (VOUT = 1.8V) Enable Start-Up Time (VOUT = 1.8V) 20034922 20034923 Turn-Off Time (VOUT = 2.8V) Turn-Off Time (VOUT = 1.8V) 20034924 20034925 Load Transient Response (VOUT = 2.8V) Load Transient Response (VOUT = 1.8V) 20034926 20034927 www.national.com 10 LP3995 Application Hints POWER DISSIPATION AND DEVICE OPERATION The permissible power dissipation for any package is a measure of the capability of the device to pass heat from the power source, the junctions of the IC, to the ultimate heat sink, the ambient environment. Thus the power dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces between the die and ambient air. The Thermal Resistance figure Re-stating the equation in (Note 7) in the electrical specification section, the allowable power dissipation for the device in a given package can be calculated: types Z5U, Y5V or X7R) in the 1.0 [to 10 µF] range, and with ESR between 5 mΩ to 500 mΩ, is suitable in the LP3995 application circuit. For this device the output capacitor should be connected between the VOUT pin and ground. It may also be possible to use tantalum or film capacitors at the device output, VOUT, but these are not as attractive for reasons of size and cost (see the section Capacitor Characteristics). The output capacitor must meet the requirement for the minimum value of capacitance and also have an ESR value that is within the range 5 mΩ to 500 mΩ for stability. NO-LOAD STABILITY The LP3995 will remain stable and in regulation with no external load. This is an important consideration in some circuits, for example CMOS RAM keep-alive applications. CAPACITOR CHARACTERISTICS The LP3995 is designed to work with ceramic capacitors on the output to take advantage of the benefits they offer. For capacitance values in the range of 1 µF to 4.7 µF, ceramic capacitors are the smallest, least expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise. The ESR of a typical 1 µF ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which easily meets the ESR requirement for stability for the LP3995. The temperature performance of ceramic capacitors varies by type. Most large value ceramic capacitors ( ≥ 2.2 µF) are manufactured with Z5U or Y5V temperature characteristics, which results in the capacitance dropping by more than 50% as the temperature goes from 25°C to 85°C. A better choice for temperature coefficient in a ceramic capacitor is X7R. This type of capacitor is the most stable and holds the capacitance within ±15% over the temperature range. Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance and voltage ratings in the 1 µF to 4.7 µF range. Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about 2:1 as the temperature goes from 25°C down to −40°C, so some guard band must be allowed. NOISE BYPASS CAPACITOR A bypass capacitor should be connected between the CBP pin and ground to significantly reduce the noise at the regulator output. This device pin connects directly to a high impedance node within the bandgap reference circuitry. Any significant loading on this node will cause a change on the regulated output voltage. For this reason, DC leakage current through this pin must be kept as low as possible for best output voltage accuracy. The use of a 0.01uF bypass capacitor is strongly recommended to prevent overshoot on the output during start-up. The types of capacitors best suited for the noise bypass capacitor are ceramic and film. High quality ceramic capacitors with NPO or COG dielectric typically have very low leakage. Polypropolene and polycarbonate film capacitors are available in small surface-mount packages and typically have extremely low leakage current. 11 www.national.com With a θJA = 255°C/W, the device in the micro SMD package returns a value of 392 mW with a maximum junction temperature of 125°C. With a θJA = 88°C/W, the device in the LLP package returns a value of 1.136 mW with a maximum junction temperature of 125°C. The actual power dissipation across the device can be represented by the following equation: PD = (VIN − VOUT) x IOUT. This establishes the relationship between the power dissipation allowed due to thermal consideration, the voltage drop across the device, and the continuous current capability of the device. These two equations should be used to determine the optimum operating conditions for the device in the application. EXTERNAL CAPACITORS In common with most regulators, the LP3995 requires external capacitors to ensure stable operation. The LP3995 is specifically designed for portable applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance. INPUT CAPACITOR An input capacitor is required for stability. It is recommended that a 1.0 µF capacitor be connected between the LP3995 input pin and ground (this capacitance value may be increased without limit). This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean analogue ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input. Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a lowimpedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input, it must be guaranteed by the manufacturer to have a surge current rating sufficient for the application. There are no requirements for the ESR (Equivalent Series Resistance) on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will remain ≅ 1.0 µF over the entire operating temperature range. OUTPUT CAPACITOR The LP3995 is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor (dielectric LP3995 Unlike many other LDO’s, the addition of a noise reduction capacitor does not effect the transient response of the device. ENABLE OPERATION The LP3995 may be switched ON or OFF by a logic input at the ENABLE pin, VEN. A high voltage at this pin will turn the device on. When the enable pin is low, the regulator output is off and the device typically consumes 3 nA. If the application does not require the shutdown feature, the VEN pin should be tied to VIN to keep the regulator output permanently on. To ensure proper operation, the signal source used to drive the VEN input must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under VIL and VIH. FAST TURN OFF AND ON The controlled switch-off feature of the device provides a fast turn off by discharging the output capacitor via an internal FET device. This discharge is current limited by the RDSon of this switch. Fast turn-on is guaranteed by control circuitry within the reference block allowing a very fast ramp of the output voltage to reach the target voltage. micro SMD MOUNTING The micro SMD package requires specific mounting techniques which are detailed in National Semiconductor Application Note AN-1112. Referring to the section Surface Mount Technology (SMT) Assembly Considerations, it should be noted that the pad style which must be used with the 5 pin package is NSMD (non-solder mask defined) type. For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the micro SMD device. micro SMD LIGHT SENSITIVITY Exposing the micro SMD device to direct sunlight will cause incorrect operation of the device. Light sources such as halogen lamps can affect electrical performance if they are situated in proximity to the device. Light with wavelengths in the red and infra-red part of the spectrum have the most detrimental effect thus the fluorescent lighting used inside most buildings has very little effect on performance. Tests carried out on a micro SMD test board showed a negligible effect on the regulated output voltage when brought within 1 cm of a fluorescent lamp. A deviation of less than 0.1% from nominal output voltage was observed. www.national.com 12 LP3995 Physical Dimensions inches (millimeters) unless otherwise noted micro SMD, 5 Bump, Package (TLA05) NS Package Number TLA05ADA The dimensions for X1, X2 and X3 are given as: X1 = 1.006 +/− 0.03mm X2 = 1.438 +/− 0.03mm X3 = 0.600 +/− 0.075mm 13 www.national.com LP3995 LLP, 6 Lead, Package (SOT23 Land) NS Package Number LDE06A www.national.com 14 LP3995 Notes 15 www.national.com LP3995 Micropower 150mA CMOS Voltage Regulator with Active Shutdown Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers Audio Clock Conditioners Data Converters Displays Ethernet Interface LVDS Power Management Switching Regulators LDOs LED Lighting PowerWise Serial Digital Interface (SDI) Temperature Sensors Wireless (PLL/VCO) www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/displays www.national.com/ethernet www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/powerwise www.national.com/sdi www.national.com/tempsensors www.national.com/wireless WEBENCH Analog University App Notes Distributors Green Compliance Packaging Design Support www.national.com/webench www.national.com/AU www.national.com/appnotes www.national.com/contacts www.national.com/quality/green www.national.com/packaging www.national.com/quality www.national.com/refdesigns www.national.com/feedback Quality and Reliability Reference Designs Feedback THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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