LPV7215MFX

LPV7215 Micropower, CMOS Input, RRIO, 1.8V Push-Pull Output Comparator December 13, 2007 LPV7215 Micropower, CMOS Input, RRIO, 1.8V, Push-Pull Output Comparator General Description The LPV7215 is an ultra low-power comparator with a typical power supply current of 580 nA. It has the best-in-class power supply current versus propagation delay performance available among National's low-power comparators. The propagation delay is as low as 4.5 microseconds with 100 mV overdrive at 1.8V supply. Designed to operate over a wide range of supply voltages, from 1.8V to 5.5V, with guaranteed operation at 1.8V, 2.7V and 5.0V, the LPV7215 is ideal for use in a variety of batterypowered applications. With rail-to-rail common mode voltage range, the LPV7215 is well suited for single-supply operation. Featuring a push-pull output stage, the LPV7215 allows for operation with absolute minimum power consumption when driving any capacitive or resistive load. Available in a choice of space-saving packages, the LPV7215 is ideal for use in handheld electronics and mobile phone applications. The LPV7215 is manufactured with National's advanced VIP50 process. Features (For V+ = 1.8V, typical unless otherwise noted) 580 nA ■ Ultra low power consumption 1.8V to 5.5V ■ Wide supply voltage range 4.5 µs ■ Propagation delay 19 mA ■ Push-Pull output current drive @ 5V −40°C to 85°C ■ Temperature range ■ Rail-to-Rail input ■ Tiny 5-Pin SOT23 and SC70 packages Applications ■ ■ ■ ■ ■ RC timers Window detectors IR receiver Multivibrators Alarm and monitoring circuits Typical Application 20123605 Supply Current vs. Supply Voltage 20123602 Propagation Delay vs. Overdrive © 2007 National Semiconductor Corporation 201236 www.national.com LPV7215 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Soldering Information  Infrared or Convection (20 sec)  Wave Soldering Lead Temp. (10 sec) 235°C 260°C  Human Body Model  Machine Model VIN Differential Supply Voltage (V+ - V−) Voltage at Input/Output pins Storage Temperature Range Junction Temperature (Note 3) 2000V 200V ±2.5V 6V V+ +0.3V, V− −0.3V −65°C to +150°C +150°C (Note 8) Operating Ratings Temperature Range (Note 3) Supply Voltage (V+ – V−) (Note 1) −40°C to 85°C 1.8V to 5.5V 456°C/W 234°C/W Package Thermal Resistance (θJA (Note 3)) 5-Pin SC70 5-Pin SOT23 1.8V Electrical Characteristics Symbol IS Supply Current Parameter Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 1.8V, V− = 0V, and VCM = V+/2, VO= V−. Boldface limits apply at the temperature extremes. Conditions VCM = 0.3V VCM = 1.5V VOS Input Offset Voltage SC70 Package VCM = 0V VCM = 1.8V SOT23 Package VCM = 0V VCM = 1.8V TCVOS IB IOS CMRR Input Offset Average Drift Input Bias Current (Note 6) Input Offset Current Common Mode Rejection Ratio VCM Stepped from 0V to 0.7V VCM Stepped from 1.2V to 1.8V VCM Stepped from 0V to 1.8V PSRR CMVR AV VO Power Supply Rejection Ratio Input Common-Mode Voltage Range Voltage Gain Output Swing High IO = 500 µA IO = 1 mA Output Swing Low IO = −500 µA IO = −1 mA 1.63 1.60 1.46 1.40 V+ = 1.8V to 5.5V, VCM = 0V CMRR ≥ 55 dB 66 65 68 65 56 55 66 63 −0.1 120 1.69 1.60 88 180 180 210 310 370 V (Note 7) VCM = 1.6V ±1 −40 10 88 87 77 82 1.9 dB V dB Min (Note 5) Typ (Note 4) 580 790 ±0.3 ±0.4 Max (Note 5) 750 825 980 1050 ±2.8 ±3.5 ±2.2 ±2.9 ±3.2 ±3.9 ±2.5 ±3.2 μV/C fA fA Units nA mV dB mV www.national.com 2 LPV7215 Symbol IOUT Output Current Parameter Source VO = V+/2 Sink VO = V+/2 Propagation Delay (High to Low) Propagation Delay (Low to High) Conditions Min (Note 5) 1.75 1.5 2.35 1.75 Typ (Note 4) 2.26 3.1 13 4.5 12.5 6.6 80 75 70 65 Max (Note 5) Units mA Overdrive = 10 mV Overdrive = 100 mV Overdrive = 10 mV Overdrive = 100 mV Overdrive = 10 mV CL = 30 pF, RL = 1 MΩ Overdrive = 100 mV CL = 30 pF, RL = 1 MΩ 6.5 8 9 10.5 μs μs trise Rise Time ns tfall Fall Time Overdrive = 10 mV CL = 30 pF, RL = 1 MΩ Overdrive = 100 mV CL = 30 pF, RL = 1 MΩ ns 2.7V Electrical Characteristics Symbol IS Supply Current Parameter (Note 8) Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 2.7V, V− = 0V, and VCM = V+/2, VO= V−. Boldface limits apply at the temperature extremes. Conditions VCM = 0.3V VCM = 2.4V VOS Input Offset Voltage SC70 Package VCM = 0V VCM = 2.7V SOT23 Package VCM = 0V VCM = 2.7V TCVOS IB IOS CMRR Input Offset Average Drift Input Bias Current (Note 6) Input Offset Current Common Mode Rejection Ratio VCM Stepped from 0V to 1.6V VCM Stepped from 2.1V to 2.7V VCM Stepped from 0V to 2.7V PSRR CMVR AV Power Supply Rejection Ratio Input Common-Mode Voltage Range Voltage Gain V+ = 1.8V to 5.5V, VCM = 0V CMRR ≥ 55 dB 72 69 71 66 59 58 66 63 −0.1 120 (Note 7) VCM = 1.8V ±1 −40 20 90 94 80 82 2.8 Min (Note 5) Typ (Note 4) 605 815 ±0.3 ±0.3 Max (Note 5) 780 860 1010 1090 ±2.8 ±3.5 ±2.2 ±2.9 ±3.2 ±3.9 ±2.5 ±3.2 μV/C fA fA Units nA mV dB dB V dB 3 www.national.com LPV7215 Symbol VO Parameter Output Swing High IO = 500 μA IO = 1 mA Output Swing Low Conditions Min (Note 5) 2.57 2.55 2.47 2.43 Typ (Note 4) 2.62 2.53 60 120 Max (Note 5) Units V IO = −500 μA IO = −1 mA 130 160 250 300 mV IOUT Output Current Source VO = V+/2 Sink VO = V+/2 4.5 3.8 5.6 4 5.7 7.5 14.5 5.8 15 7.5 90 85 85 75 ns ns 10 11 8.5 9.5 mA Propagation Delay (High to Low) Propagation Delay (Low to High) trise Rise Time Overdrive = 10 mV Overdrive = 100 mV Overdrive = 10 mV Overdrive = 100 mV Overdrive = 10 mV CL = 30 pF, RL = 1 MΩ Overdrive = 100 mV CL = 30 pF, RL = 1 MΩ μs tfall Fall Time Overdrive = 10 mV CL = 30 pF, RL = 1 MΩ Overdrive = 100 mV CL = 30 pF, RL = 1 MΩ 5V Electrical Characteristics Symbol IS Supply Current Parameter (Note 8) Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = 0V, and VCM = V+/2, VO= V−. Boldface limits apply at the temperature extremes. Conditions VCM = 0.3V VCM = 4.7V VOS Input Offset Voltage SC70 Package VCM = 0V VCM = 5V SOT23 Package VCM = 0V VCM = 5V TCVOS IB IOS Input Offset Average Drift Input Bias Current (Note 6) Input Offset Current (Note 7) VCM = 4.5V ±1 −400 20 Min (Note 5) Typ (Note 4) 612 825 ±0.3 Max (Note 5) 790 970 1030 1230 ±3 ±3.7 ±2.3 ±3.0 ±3.4 ±4.1 ±2.6 ±3.3 μV/C fA fA Units nA mV www.national.com 4 LPV7215 Symbol CMRR Parameter Common Mode Rejection Ratio Conditions VCM Stepped from 0V to 3.9V VCM Stepped from 4.4V to 5V VCM Stepped from 0V to 5V Min (Note 5) 72 69 73 70 64 63 66 63 −0.1 Typ (Note 4) 98 92 82 82 Max (Note 5) Units dB PSRR CMVR AV VO Power Supply Rejection Ratio Input Common-Mode Voltage Range Voltage Gain Output Swing High V+ = 1.8V to 5.5V, VCM = 0V CMRR ≥ 55 dB IO = 500 µA IO = 1 mA dB 5.1 V dB 120 4.9 4.88 4.82 4.79 4.94 4.89 43 88 13.0 9.0 14.5 10.5 17 19 18 7.7 30 12 100 100 115 95 15 17.5 13.5 15 90 110 170 200 V Output Swing Low IO = −500 µA IO = −1 mA mV IOUT Output Current Source VO = V+/2 Sink VO = V+/2 mA Propagation Delay (High to Low) Propagation Delay (Low to High) trise Rise Time Overdrive = 10 mV Overdrive = 100 mV Overdrive = 10 mV Overdrive = 100 mV Overdrive = 10 mV CL = 30 pF, RL = 1 MΩ Overdrive = 100 mV CL = 30 pF, RL = 1 MΩ μs μs ns tfall Fall Time Overdrive = 10 mV CL = 30 pF, RL = 1 MΩ Overdrive = 100 mV CL = 30 pF, RL = 1 MΩ ns Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables. Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. Note 4: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 5: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using statistical quality control (SQC) method. Note 6: Positive current corresponds to current flowing into the device. Note 7: Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change. Note 8: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device. 5 www.national.com LPV7215 Connection Diagram SC70/SOT23 20123698 Top View Ordering Information Package 5-Pin SOT-23 5-Pin SC70 Part Number LPV7215MF LPV7215MFX LPV7215MG LPV7215MGX Package Marking C30A C37 Transport Media 1k Units Tape and Reel 3k Units Tape and Reel 1k Units Tape and Reel 3k Units Tape and Reel NSC Drawing MF05A MAA05A Simplified Schematic Diagram 20123633 www.national.com 6 LPV7215 Typical Performance Characteristics Supply Current vs. Supply Voltage At TJ = 25°C unless otherwise specified. Supply Current vs. Common Mode Input 20123605 20123606 Supply Current vs. Common Mode Input Supply Current vs. Common Mode Input 20123607 20123608 Short Circuit Sinking Current vs. Supply Voltage Short Circuit Sourcing Current vs. Supply Voltage 20123609 20123610 7 www.national.com LPV7215 Output Voltage Low vs. Sink Current Output Voltage Low vs. Sink Current 20123650 20123651 Output Voltage High vs. Source Current Output Voltage High vs. Source Current 20123652 20123653 Propagation Delay vs. Supply Voltage Propagation Delay vs. Supply Voltage 20123611 20123612 www.national.com 8 LPV7215 Propagation Delay vs. Overdrive Propagation Delay vs. Overdrive 20123602 20123613 Propagation Delay vs. Overdrive Propagation Delay vs. Overdrive 20123614 20123622 Propagation Delay vs. Overdrive Propagation Delay vs. Overdrive 20123603 20123615 9 www.national.com LPV7215 Propagation Delay vs. Overdrive Propagation Delay vs. Resistive Load 20123623 20123616 IBIAS vs. VCM IBIAS vs. VCM 20123620 20123618 IBIAS vs. VCM Propagation Delay vs. Common Mode Input 20123619 20123624 www.national.com 10 LPV7215 Propagation Delay vs. Common Mode Input Propagation Delay vs. Common Mode Input 20123625 20123617 Propagation Delay vs. Common Mode Input Offset Voltage vs. Common Mode Input 20123626 20123644 11 www.national.com LPV7215 Application Information Low supply current and fast propagation delay distinguish the LPV7215 from other low power comparators. INPUT STAGE The LPV7215 has rail-to-rail input common mode voltage range. It can operate at any differential input voltage within this limit as long as the differential voltage is greater than zero. A differential input of zero volts may result in oscillation. The differential input stage of the comparator is a pair of PMOS and NMOS transistors, therefore, no current flows into the device. The input bias current measured is the leakage current in the MOS transistors and input protection diodes. This low bias current allows the comparator to interface with a variety of circuitry and devices with minimal concern about matching the input resistances. The input to the comparator is protected from excessive voltage by internal ESD diodes connected to both supply rails. This protects the circuit from both ESD events, as well as signals that significantly exceed the supply voltages. When this occurs the ESD protection diodes will become forward biased and will draw current into these structures, resulting in no input current to the terminals of the comparator. Until this occurs, there is essentially no input current to the diodes. As a result, placing a large resistor in series with an input that may be exposed to large voltages, will limit the input current but have no other noticeable effect. OUTPUT STAGE The LPV7215 has a MOS push-pull rail-to-rail output stage. The push-pull transistor configuration of the output keeps the total system power consumption to a minimum. The only current consumed by the LPV7215 is the less than 1 µA supply current and the current going directly into the load. No power is wasted through the pull-up resistor when the output is low. The output stage is specifically designed with deadtime between the time when one transistor is turned off and the other is turned on (break-before-make) in order to minimize shoot through currents. The internal logic controls the break-beforemake timing of the output transistors. The break-before-make delay varies with temperature and power condition. OUTPUT CURRENT Even though the LPV7215 uses less than 1 µA supply current, the outputs are able to drive very large currents. The LPV7215 can source up to 17 mA and can sink up to 19 mA, when operated at 5V supply. This large current handling capability allows driving heavy loads directly. RESPONSE TIME Depending upon the amount of overdrive, the propagation delay will be typically 6 to 30 µs. The curves showing propagation delay vs. overdrive in the “Typical Characteristics” section shows the delay time when the input is preset with 100 mV across the inputs and then is driven the other way by 10 mV to 500 mV. The output signal can show a step during switching depending on the load. A fast RC time constant due to both small capacitive and resistive loads will show a significant step in the output signal. A slow RC time constant due to either a large resistive or capacitive load will have a clipped corner on the output signal. The step is observed more prominently during a falling transition from high to low. The plot in Figure 1 shows the output for single 5V supply with a 100 kΩ resistor. The step is at 1.3V. 20123627 FIGURE 1. Output Signal without Capacitive Load The plot in Figure 2 shows the output signal when a 20 pF capacitor is added as a load. The step is at about 2.5V. 20123628 FIGURE 2. Output Signal with 20 pF Load www.national.com 12 LPV7215 CAPACITIVE AND RESISTIVE LOADS The propagation delay is not affected by capacitive loads at the output of the LPV7215. However, resistive loads slightly affect the propagation delay on the falling edge by a reduction of almost 2 µs depending on the load resistance value. NOISE Most comparators have rather low gain. This allows the output to spend time between high and low when the input signal changes slowly. The result is that the output may oscillate between high and low when the differential input is near zero. The exceptionally high gain of this comparator, 120 dB, eliminates this problem. Less than 1 µV of change on the input will drive the output from one rail to the other rail. If the input signal is noisy, the output cannot ignore the noise unless some hysteresis is provided by positive feedback. (See section on adding hysteresis.) LAYOUT/BYPASS CAPACITORS Proper grounding and the use of a ground plane will help to ensure the specified performance of the LPV7215. Minimizing trace lengths, reducing unwanted parasitic capacitance and using surface-mount components will also help. Comparators are very sensitive to input noise. To minimize supply noise, power supplies should be capacitively decoupled by a 0.01 µF ceramic capacitor in parallel with a 10 µF electrolytic capacitor. HYSTERESIS In order to improve propagation delay when low overdrive is needed hysteresis can be added. INVERTING COMPARATOR WITH HYSTERESIS The inverting comparator with hysteresis requires a three resistor network that is referenced to the supply voltage V+ of the comparator as shown in Figure 3. When VIN at the inverting input is less than VA, the voltage at the non-inverting node of the comparator (VIN < VA), the output voltage is high (for simplicity assume VO switches as high as V+). The three network resistors can be represented as R1//R3 in series with R2. The lower input trip voltage VA1 is defined as VA1 = VCCR2 / ((R1//R3) + R2) When VIN is greater than VA, the output voltage is low or very close to ground. In this case the three network resistors can be presented as R2//R3 in series with R1. The upper trip voltage VA2 is defined as VA2 = VCC (R2//R3) / ((R1+ (R2//R3) The total hysteresis provided by the network is defined as ΔVA = VA1 - VA2 20123634 FIGURE 3. Inverting Comparator with Hysteresis 13 www.national.com LPV7215 NON-INVERTING COMPARATOR WITH HYSTERESIS A non-inverting comparator with hysteresis requires a two resistor network, and a voltage reference (VREF) at the inverting input. When V IN is low, the output is also low. For the output to switch from low to high, VIN must rise up to VIN1 where VIN1 is calculated by. ZERO CROSSING DETECTOR In a zero crossing detector circuit, the inverting input is connected to ground and the non-inverting input is connected to a 100 mVPP AC signal. As the signal at the non-inverting input crosses 0V, the comparator’s output changes state. As soon as VO switches to VCC, VA will step to a value greater than VREF, which is given by 20123649 FIGURE 5. Zero Crossing Detector To improve switching times and to center the input threshold to ground a small amount of positive feedback is added to the circuit. The voltage divider, R4 and R5, establishes a reference voltage, V1, at the positive input. By making the series resistance, R1 plus R2 equal to R5, the switching condition, V1 = V2, will be satisfied when VIN = 0. The positive feedback resistor, R6, is made very large with respect to R5 (R6 = 2000 R5). The resultant hysteresis established by this network is very small (ΔV1 < 10 mV) but it is sufficient to insure rapid output voltage transitions. Diode D1 is used to insure that the inverting input terminal of the comparator never goes below approximately −100 mV. As the input terminal goes negative, D1 will forward bias, clamping the node between R1 and R2 to approximately −700 mV. This sets up a voltage divider with R2 and R3 preventing V2 from going below ground. The maximum negative input overdrive is limited by the current handling ability of D1. To make the comparator switch back to it’s low state, VIN must equal VREF before VA will again equal VREF. VIN2 can be calculated by The hysteresis of this circuit is the difference between VIN1 and VIN2. ΔVIN = VCCR1/R2 20123642 20123629 20123635 FIGURE 4. Non-Inverting Comparator with Hysteresis FIGURE 6. Zero Crossing Detector with Positive Feedback www.national.com 14 LPV7215 THRESHOLD DETECTOR Instead of tying the inverting input to 0V, the inverting input can be tied to a reference voltage. As the input on the noninverting input passes the VREF threshold, the comparator’s output changes state. It is important to use a stable reference voltage to ensure a consistent switching point. 20123632 FIGURE 9. IR Receiver 20123630 FIGURE 7. Threshold Detector CRYSTAL OSCILLATOR A simple crystal oscillator using the LPV7215 is shown in Figure 8. Resistors R1 and R2 set the bias point at the comparator’s non-inverting input. Resistors, R3 and R4 and capacitor C1 set the inverting input node at an appropriate DC average level based on the output. The crystal’s path provides resonant positive feedback and stable oscillation occurs. The output duty cycle for this circuit is roughly 50%, but it is affected by resistor tolerances and to a lesser extent by the comparator offset. SQUARE WAVE GENERATOR A typical application for a comparator is as a square wave oscillator. The circuit in Figure 10 generates a square wave whose period is set by the RC time constant of the capacitor C1 and resistor R4. The maximum frequency is limited by the large signal propagation delay of the comparator and by the capacitive loading at the output, which limits the output slew rate. 20123638 20123631 FIGURE 8. Crystal Oscillator IR RECEIVER The LPV7215 can also be used as an infrared receiver. The infrared photo diode creates a current relative to the amount of infrared light present. The current creates a voltage across RD. When this voltage level crosses the voltage applied by the voltage divider to the inverting input, the output transitions. FIGURE 10. Square Wave Oscillator 20123639 15 www.national.com LPV7215 Consider the output of Figure 10 to be high to analyze the circuit. That implies that the inverted input (VC) is lower than the non-inverting input (VA). This causes the C1 to be charged through R4, and the voltage VC increases until it is equal to the non-inverting input. The value of VA at this point is If R1 = R2 = R3 then VA1 = 2VCC/3 At this point the comparator switches pulling down the output to the negative rail. The value of VA at this point is If R1 = R2 = R3 then VA2 = VCC/3 The capacitor C1 now discharges through R4, and the voltage VC decreases until it is equal to VA2, at which point the comparator switches again, bringing it back to the initial stage. The time period is equal to twice the time it takes to discharge C1 from 2VCC/3 to VCC/3, which is given by R4C1·ln2. Hence the formula for the frequency is: F = 1/(2·R4·C1·ln2) WINDOW DETECTOR A window detector monitors the input signal to determine if it falls between two voltage levels. The comparator outputs A and B are high only when VREF1 < VIN < VREF2 “or within the window.” where these are defined as VREF1 = R3/(R1+R2+R3) * V+ VREF2 = (R2+R3)/(R1+R2+R3) * V+ Others names for window detectors are: threshold detector, level detectors, and amplitude trigger or detector. 20123647 FIGURE 11. Window Detector 20123648 FIGURE 12. Window Detector Output Signal www.national.com 16 LPV7215 Physical Dimensions inches (millimeters) unless otherwise noted 5-Pin SC70 NS Package Number MAA05A 5-Pin SOT23 NS Package Number MF05A 17 www.national.com LPV7215 Micropower, CMOS Input, RRIO, 1.8V Push-Pull Output Comparator Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers Audio Clock Conditioners Data Converters Displays Ethernet Interface LVDS Power Management Switching Regulators LDOs LED Lighting PowerWise Serial Digital Interface (SDI) Temperature Sensors Wireless (PLL/VCO) www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/displays www.national.com/ethernet www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/powerwise www.national.com/sdi www.national.com/tempsensors www.national.com/wireless WEBENCH Analog University App Notes Distributors Green Compliance Packaging Design Support www.national.com/webench www.national.com/AU www.national.com/appnotes www.national.com/contacts www.national.com/quality/green www.national.com/packaging www.national.com/quality www.national.com/refdesigns www.national.com/feedback Quality and Reliability Reference Designs Feedback THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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