Techwell™
9D1 H.264 CODEC with 8-Channel A/V Decoder
TW5866
TW5866 is a H.264 CODEC solution with integrated
8-channel analog A/V decoders. TW5866 supports up to 9D1
of H.264 video encoding, 8D1 of H.264 video decoding, or
4D1 H.264 full duplex codec. In addition, TW5866 supports
motion JPEG encoding and video preview through BT.656
interfaces and PCI interfaces. TW5866 can be used in low
cost H.264 hardware compression PCI card to support either
8-channel with a single chip, or 16-channel with two chips. It
can also work with two external TW2866 to support 16-CIF
H.264 compression. TW5866 can also be used in embedded
DVR applications as an AV front-end chip working with
display mux capable SOCs.
TW5866 integrates 8 A/V decoders. It takes 8 CVBS analog
inputs fed into eight internal high quality NTSC/PAL video
decoders. In addition, it has 2 digital BT.656 / 1120
interfaces, running up to 108/148.5 MHz, capable of
receiving up to 8 D1, 2 720P / 1080i / 1080p HD video
sources. When used as D1 input, the digital interface takes
multi-channel video signal from external video decoders,
such as TW2866 / TW2867. This allows the TW5866 to
support a total of 16 D1 video channels. All the SD / HD
video streams are fed into H.264 encoder, MJPEG encoder
for compression, and to PCI interface and digital 656 output
interface for preview purposes. The H.264 decoded stream
from the on-chip video decoder is fed through two BT.656 /
1120 playback interfaces to drive the external display
processors. The BT.656 playback interfaces runs up to 108
MHz and is capable of delivering multi-channel byteinterleaving or field/frame interleaving format for total of 8
D1 playback channels.
TW5866 supports functions per channel, such as motion
detection, night detection, and blind detection engine for
channel alarm notification. It features triple scalers per
channel for each of the H.264 encode, MJPEG, and PCI
preview paths. Each of these scalers is independently
configurable. TW5866 also features per channel OSDs and
motion adaptive de-interlacer. TW5866 supports 8-channel
of motion adaptive 2D de-interlacers and 2D noise reduction.
TW5866 integrates a H.264 baseline level 3 compliant
encoder capable of performing up to either 9 D1 equivalent
video encoding (225 fps for PAL and 270 fps for NTSC), 8 D1
decoding, 17 channel G.726 ADPCM hardware audio encoder
with one channel for two way audio communication, and one
channel ADPCM audio decoding. The H.264 video encoder
supports dual-bitstream compression for both local storage
and network streams. It also features a motion JPEG encoder
for up to 25 frames per second shared among all video
channels.
1
FN8319.0
February 27, 2013
TW5866 provides PCI interface for external CPU control and
bitstream upload. The PCI interface runs at 33 or 66 MHz The
external CPU can access the internal meta-data associated
with each H.264 channel for video analytic purposes.
Analog Video Decoder
8 CVBS analog inputs fed into 8 sets of video decoder
accept all NTSC(M/N/4.43) / PAL
(B/D/G/H/I/K/L/M/N/60) standards with auto detection
Integrated video analog anti-aliasing filters and 10-bit
CMOS ADCs for each video decoder
High performance adaptive 4H comb filters for all
NTSC/PAL standards
IF compensation filter for improvement of color
demodulation
Color Transient Improvement (CTI)
Automatic white peak control
Programmable hue, saturation, contrast, brightness and
sharpness
Proprietary fast video locking system for non-real-time
application
Noise Reduction to remove impulse noise
Digital Input Ports
BT.656
Two BT.656 ports at up to 108 MHz interfaced with 2
external TW2866s
Byte-interleaving supports 4 channels multiplexing with
each channel of interlaced D1 at 60/50 fps
BT.1120
Two BT.1120 ports to support external HD video sources
of 720P / 1080i / 1080p format at 74.25 / 148.5 MHz
One cascade input supporting cascade of multiple
TW5866 chips. This is pin shared with one playback port
Pre-processing
Per channel triple high performance down scalers of each
channel scale independently for H.264, JPEG and preview
output
Per channel motion detector with 16 X 12 cells
Per channel night / blind detections
Per channel noise reduction and de-interlacing to convert
Interlaced video into progressive before compression
Per channel OSD for information overlay
Single Box
1-bit per pixel text
2-bit per pixel text or mask
12-bit per pixel bitmap
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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TW5866
Digital Preview Ports
Two BT.656 ports provides preview raw video output to
external display processors
Byte-Interleaving interlaced D1 for each port at 27 / 54 /
108 MHz
Digital Playback Ports
Playback video for external display chips
Two BT.656 ports for multi-channel 8 D1 playback
BT.656 Byte-Interleaving at 27 / 54 / 108 MHz
BT.656 Frame / Field Interleaving w/ D1 / Quad CIF
resolution at 27 / 54 / 108 MHz
Two BT.1120 port for single channel 1440x960 /
1440x1152 / 720p / 1080i playback
H.264 Video Encoder
H.264 baseline profile @ level 3 encoding
Motion JPEG Encoder
Maximum of 25 fps, shared among all channels
Support picture sizes of D1, CIF, and half-D1
Analog Audio CODEC
Integrated five audio ADCs and one audio DAC providing
multi-channel audio mixed analog output
Supports a standard I2S interface for multi-channel audio
mux output to external audio playback processor, such as
TW2880
PCM 8/16-bit and u-Law/A-Law 8 -bit for audio word length
Programmable audio sample rate that covers popular
frequencies of 8/16/32/44.1/48kHz
Digital Audio CODEC
Hardware G.726 ADPCM encoder / decoder
Bit rate from 64 kbps up to 10 Mbps each channel
Encodes maximum of 17 channels, with 1 channel for two
way communication
Maximum 225 fps (PAL) or 270 fps (NTSC) H.264 encoding
Decodes 1 channel of audio for playback
Full duplex codec with real-time 4 D1 / 16 CIF or non-realtime 8 D1 main stream encoding
RTC for AV sync
Real-time 4 CIF / 16 QCIF or non-real-time 16 CIF
secondary stream encoding
VBR / CBR controllable
Configurable GOP interval
Motion vector granularity at full pel, ½ pel, and ¼ pel
Motion vector ranges [-256, +255.75]
DDR2 Interface
One 16-bit or two 8-bit external DDR2 SDRAM memories
running at up to 333 MHz
Total 256 MB up to 2 GB
Auto refresh
Host Interface
Configurable 32-bit asynchronous host interface / PCI
interface
In-loop de-blocking filter
CAVLC entropy coding
H.264 Video Decoder
H.264 baseline decoder for decoding the bit-stream
generated by TW5866 / TW5864 encoders
Bit rate from 64 kbps up to 10 Mbps each channel
Maximum 200 fps (PAL) or 240 fps (NTSC)
Full duplex codec with Real-time 4 D1 or non-real-time 8 D1
stream decoding
Playback control with normal play, fast forward, slow
forward and fast reverse.
Video Analytic Interface
PCI Interface runs as both initiator and target at 33/66MHz
Preview video through PCI (33 MHz) supporting resolution
such as:
2 D1
1 D1 + 4 CIF
9 CIF
16 QCIF
1 D1 + 15 QCIF
I2C Interface for external Video Decoder chips configuration
IRQs and GPIOs
System Clock
Per MB type / motion meta-data information
Single 27 MHz external crystal clock input
16x12 cells motion detection information
3 built-in PLLs for internal clock generation
Accessible through PCI / Async Host Interface
Package
416 BG
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in the quality certifications found at www.intersil.com/design/quality
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time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is
believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its
subsidiaries.
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