X9258_11

X9258_11

  • 厂商:

    INTERSIL(Intersil)

  • 封装:

  • 描述:

    X9258_11 - Quad Digital Controlled Potentiometers(XDCP™) - Intersil Corporation

  • 详情介绍
  • 数据手册
  • 价格&库存
X9258_11 数据手册
X9258 Low Noise/Low Power/2-Wire Bus/256 Taps Data Sheet April 14, 2011 FN8168.5 Quad Digital Controlled Potentiometers (XDCP™) The X9258 integrates 4 digitally controlled potentiometers (XDCP™) on a monolithic CMOS integrated circuit. The digitally controlled potentiometer is implemented using 255 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches. The position of the wiper on the array is controlled by the user through the 2-wire bus interface. Each potentiometer has associated with it a volatile Wiper Counter Register (WCR) and 4 non-volatile Data Registers (DR0:DR3) that can be directly written to and read by the user. The contents of the WCR controls the position of the wiper on the resistor array though the switches. Power-up recalls the contents of DR0 to the WCR. The XDCP™ can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing. Features • Four potentiometers in one package • 256 resistor taps/potentiometer................. 0.4% resolution • 2-wire serial interface • Wiper resistance, 40Ω typical @ V+ = 5V, V- = -5V • Four nonvolatile data registers for each potentiometer • Nonvolatile storage of wiper position • Standby current > R2 FIGURE 17. INVERTING AMPLIFIER FIGURE 18. EQUIVALENT L-R CIRCUIT C – + } RA } RB R2 R1 – + FREQUENCY ∝ R1, R2, C AMPLITUDE ∝ RA, RB FIGURE 19. FUNCTION GENERATOR 18 FN8168.5 April 14, 2011 X9258 Thin Shrink Small Outline Package Family (TSSOP) 0.25 M C A B D N (N/2)+1 A MDP0044 THIN SHRINK SMALL OUTLINE PACKAGE FAMILY MILLIMETERS SYMBOL 14 LD 16 LD 20 LD 24 LD 28 LD TOLERANCE PIN #1 I.D. A A1 A2 b c D E E1 e L L1 1.20 0.10 0.90 0.25 0.15 5.00 6.40 4.40 0.65 0.60 1.00 1.20 0.10 0.90 0.25 0.15 5.00 6.40 4.40 0.65 0.60 1.00 1.20 0.10 0.90 0.25 0.15 6.50 6.40 4.40 0.65 0.60 1.00 1.20 0.10 0.90 0.25 0.15 7.80 6.40 4.40 0.65 0.60 1.00 1.20 0.10 0.90 0.25 0.15 9.70 6.40 4.40 0.65 0.60 1.00 Max ±0.05 ±0.05 +0.05/-0.06 +0.05/-0.06 ±0.10 Basic ±0.10 Basic ±0.15 Reference Rev. F 2/07 E E1 1 B TOP VIEW (N/2) 0.20 C B A 2X N/2 LEAD TIPS C SEATING PLANE e 0.05 H b 0.10 C N LEADS SIDE VIEW 0.10 M C A B NOTES: 1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side. 2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm per side. 3. Dimensions “D” and “E1” are measured at dAtum Plane H. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. SEE DETAIL “X” c END VIEW L1 A2 GAUGE PLANE 0.25 A1 DETAIL X L 0° - 8° A 19 FN8168.5 April 14, 2011 X9258 Small Outline Plastic Packages (SOIC) N INDEX AREA H E -B1 2 3 SEATING PLANE -AD -CA h x 45° 0.25(0.010) M BM M24.3 (JEDEC MS-013-AD ISSUE C) 24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A L MILLIMETERS MIN 2.35 0.10 0.33 0.23 15.20 7.40 10.00 0.25 0.40 24 8° 0° 8° MAX 2.65 0.30 0.51 0.32 15.60 7.60 10.65 0.75 1.27 NOTES 9 3 4 5 6 7 Rev. 1 4/06 MIN 0.0926 0.0040 0.013 0.0091 0.5985 0.2914 0.394 0.010 0.016 24 0° MAX 0.1043 0.0118 0.020 0.0125 0.6141 0.2992 0.419 0.029 0.050 A1 B C D E e H C α A1 0.10(0.004) 0.05 BSC 1.27 BSC e B 0.25(0.010) M C AM BS h L N NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. α All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 20 FN8168.5 April 14, 2011
X9258_11
物料型号: - X9258US24, X9258US24Z, X9258US24I, X9258UV24, X9258UV24I, X9258UV24IZ, X9258TS24, X9258TS24Z, X9258TS24I, X9258TS24IZ-2.7, X9258TV24-2.7, X9258TV24I-2.7, X9258TV24IZ-2.7, X9258TV24Z-2.7

器件简介: - X9258是一款集成了四个数字控制电位器的单片CMOS集成电路,每个电位器提供256个电阻抽头,分辨率为0.4%。具有2线串行接口,支持非易失性存储抽头位置。

引脚分配: - VLO/RLO至VL3/RL3:电位器引脚(终端等效) - VWO/RWO至VW3/RW3:电位器引脚(电刷等效) - WP:硬件写保护 - V+,V-:模拟电源 - Vcc:系统供电电压 - Vss:系统地 - NC:无连接(允许)

参数特性: - 每个电位器有256个抽头,分辨率为0.4%。 - 2线串行接口。 - 电刷电阻典型值为40Ω(V+ = 5V, V- = -5V)。 - 每个电位器有4个非易失性数据寄存器。 - 待机电流小于5µA(整个封装)。

功能详解: - X9258通过2线串行接口控制电刷在电阻阵列上的位置,支持非易失性存储电刷位置。每个电位器有4个非易失性数据寄存器和1个易失性Wiper Counter寄存器,用于控制电刷位置。

应用信息: - 基本配置包括三终端电位器、可变分压器、两终端可变电阻、可变电流源、非反相放大器、电压调节器、偏移电压调整、比较器带滞后、衰减器、滤波器、反相放大器等。

封装信息: - 提供24引脚SOIC(300 mil)和24引脚TSSOP(4.4mm)封装,部分封装提供无铅版本。
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