74ABT534AD

INTEGRATED CIRCUITS 74ABT534A Octal D-type flip-flop, inverting (3-State) Product specification IC23 Data Handbook 1997 Feb 03 Philips Semiconductors Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A FEATURES • 8-bit positive edge triggered register • 3-State output buffers • Output capability: +64mA/–32mA • Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model DESCRIPTION The 74ABT534A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT534A is an 8-bit, edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the clock (CP) and Output Enable (OE) control gates. The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s output. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the clock operation. When OE is Low, the stored data appears at the outputs. When OE is High, the outputs are in the High-impedance “OFF” state, which means they will neither drive nor load the bus. • Power-up 3-State QUICK REFERENCE DATA SYMBOL tPLH tPHL CIN COUT ICCZ PARAMETER Propagation delay CP to Qn Input capacitance Output capacitance Total supply current CONDITIONS Tamb = 25°C; GND = 0V CL = 50pF; VCC = 5V VI = 0V or VCC Outputs disabled; VO = 0V or VCC Outputs disabled; VCC =5.5V TYPICAL 3.3 3.6 3.5 6.5 100 UNIT ns pF pF µA ORDERING INFORMATION PACKAGES 20-Pin Plastic DIP 20-Pin plastic SO 20-Pin Plastic SSOP Type II 20-Pin Plastic TSSOP Type I TEMPERATURE RANGE –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C OUTSIDE NORTH AMERICA 74ABT534A N 74ABT534A D 74ABT534A DB 74ABT534A PW NORTH AMERICA 74ABT534A N 74ABT534A D 74ABT534A DB 74ABT534APW DH DWG NUMBER SOT146-1 SOT163-1 SOT339-1 SOT360-1 PIN CONFIGURATION PIN DESCRIPTION PIN NUMBER SYMBOL OE D0-D7 Q0-Q7 CP GND VCC FUNCTION Output enable input (active-Low) Data inputs Inverting 3-State outputs Clock pulse input (active rising edge) Ground (0V) Positive supply voltage 1 3, 4, 7, 8, 13, 14, 17, 18 2, 5, 6, 9, 12, 15, 16, 19 11 10 20 OE Q0 1 2 20 VCC 19 Q7 18 D7 17 D6 16 Q6 15 Q5 14 D5 13 D4 12 Q4 11 CP D0 3 D1 4 Q1 Q2 5 6 D2 7 D3 8 Q3 9 GND 10 SA00161 1997 Feb 03 2 853-1910 17722 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) 1 EN C1 3 4 7 8 13 14 17 18 11 D0 11 CP D1 D2 D3 D4 D5 D6 D7 3 4 7 1D 2 5 6 9 12 15 16 19 1 OE 8 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 13 2 5 6 9 12 15 16 19 14 17 SA00162 18 SA00163 FUNCTION TABLE INPUTS OE L L L H H CP ↑ ↑ ↑ ↑ ↑ Dn l h X X Dn INTERNAL REGISTER L H NC NC Dn OUTPUTS Q0 – Q7 H L NC Z Z Latch and read register Hold Disable outputs OPERATING MODE H = High voltage level h = High voltage level one set-up time prior to the Low-to-High clock transition L = Low voltage level l = Low voltage level one set-up time prior to the Low-to-High clock transition NC= No change X = Don’t care Z = High impedance “off” state ↑ = Low-to-High clock transition ↑ = not a Low-to-High clock transition LOGIC DIAGRAM D0 3 D1 4 D2 7 D3 8 D4 13 D5 14 D6 17 D7 18 D D D D D D D D CP Q CP Q CP Q CP Q CP Q CP Q CP Q CP Q 11 CP 1 OE 2 Q0 5 Q1 6 Q2 9 Q3 12 Q4 15 Q5 16 Q6 19 Q7 SA00164 1997 Feb 03 3 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC IIK VI IOK VOUT IOUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 output in Off or High state output in Low state VI < 0 CONDITIONS RATING –0.5 to +7.0 –18 –1.2 to +7.0 –50 –0.5 to +5.5 128 –65 to 150 UNIT V mA V mA V mA °C DC output diode current DC output voltage3 DC output current Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC VI VIH VIL IOH IOL ∆t/∆v Tamb DC supply voltage Input voltage High-level input voltage Low-level Input voltage High-level output current Low-level output current Input transition rise or fall rate Operating free-air temperature range 0 –40 PARAMETER Min 4.5 0 2.0 0.8 –32 64 5 +85 Max 5.5 VCC V V V V mA mA ns/V °C UNIT 1997 Feb 03 4 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25°C Min VIK Input clamp voltage VCC = 4.5V; IIK = –18mA VCC = 4.5V; IOH = –3mA; VI = VIL or VIH VOH High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or VIH VCC = 4.5V; IOH = –32mA; VI = VIL or VIH VOL II IOFF IPU/IPD IOZH IOZL ICEX IO ICCH ICCL ICCZ ∆ICC Additional supply current per input pin2 Quiescent supply current Low-level output voltage Input leakage current Power-off leakage current Power-up/down 3-State output current3 3-State output High current 3-State output Low current Output High leakage current Output current1 VCC = 4.5V; IOL = 64mA; VI = VIL or VIH VCC = 5.5V; VI = GND or 5.5V VCC = 0.0V; VI or VO ≤ 4.5V VCC = 2.0V; VO = 0.5V; VI = GND or VCC; VOE = VCC VCC = 5.5V; VO = 2.7V; VI = VIL or VIH VCC = 5.5V; VO = 0.5V; VI = VIL or VIH VCC = 5.5V; VO = 5.5V; VI = GND or VCC VCC = 5.5V; VO = 2.5V VCC = 5.5V; Outputs High, VI = GND or VCC VCC = 5.5V; Outputs Low, VI = GND or VCC VCC = 5.5V; Outputs 3-State; VI = GND or VCC VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND –50 2.5 3.0 2.0 Typ –0.9 2.9 3.4 2.4 0.42 ±0.01 ±5.0 ±5.0 0.1 –0.1 0.1 –100 100 24 100 0.5 0.55 ±1.0 ±100 ±50 10 –10 50 –180 250 30 250 1.5 –50 Max –1.2 2.5 3.0 2.0 0.55 ±1.0 ±100 ±50 10 –10 50 –180 250 30 250 1.5 Tamb = –40°C to +85°C Min Max –1.2 V V V V V µA µA µA µA µA µA mA µA mA µA mA UNIT NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3 This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. For VCC = 2.1V to VCC = 5V " 10%, a transition time of up to 100µsec is permitted. AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM Min fMAX tPLH tPHL tPZH tPZL Maximum clock frequency Propagation delay CP to Qn Output enable time to High and Low level 1 1 3 4 3 4 125 2.0 1 2.4 1 1.0 2.6 1.8 1 1.6 1 Tamb = +25oC VCC = +5.0V Typ 350 3.3 3.6 3.1 3.9 3.3 2.8 4.2 1 4.7 1 4.2 4.9 1 4.3 1 3.6 1 Max Tamb = -40 to +85oC VCC = +5.0V ±0.5V Min 125 2.0 2.4 1.0 2.6 1.8 1 1.6 1 5.0 1 5.1 1 5.0 5.5 1 4.6 1 4.1 1 Max ns ns ns ns UNIT tPHZ Output disable time tPLZ from High and Low level NOTE: 1. This datasheet limit may vary among suppliers. 1997 Feb 03 5 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25oC VCC = +5.0V Min ts(H) ts(L) th(H) th(L) Setup time, High or Low Dn to CP Hold time, High or Low Dn to CP 2 2 1 1.0 1 1.0 1 0.5 0.5 1.5 1 2.0 1 Typ 0.4 0.3 –0.3 –0.4 0.8 1.0 Tamb = -40 to +85oC VCC = +5.0V ±0.5V Min 1.0 1 1.0 1 0.5 0.5 1.5 1 2.0 1 ns ns ns UNIT tw(H) CP pulse width tw(L) High or Low NOTE: 1. This datasheet limit may vary among suppliers. AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V 1/fMAX Dn CP VM tw(H) tPLH VM tw(L) tPHL VM VM VM CP Qn SA00165 NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency OE VM tPZH VM tPHZ VOH –0.3V 0V OE Qn VM Qn SA00166 Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 1997 Feb 03 6 ÉÉÉÉÉÉÉÉÉ ÉÉÉ É ÉÉÉÉÉÉÉÉÉ ÉÉÉ É ÉÉÉÉÉÉÉÉÉ ÉÉÉ É VM VM VM VM ts(H) th(H) ts(L) th(L) VM VM SA00107 Waveform 2. Data Setup and Hold Times VM tPZL VM tPLZ VM VOL +0.3V SA00167 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A TEST CIRCUIT AND WAVEFORM VCC 7.0V RL 90% NEGATIVE PULSE VM 10% tTHL (tF) CL RL POSITIVE PULSE 10% tW tTLH (tR) 90% 90% VM 10% 0V 10% 0V tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V) PULSE GENERATOR VIN D.U.T. RT VOUT Test Circuit for 3-State Outputs VM SWITCH POSITION TEST tPLZ tPZL All other SWITCH closed closed open VM = 1.5V Input Pulse Definition DEFINITIONS RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. INPUT PULSE REQUIREMENTS FAMILY Amplitude 74ABT 3.0V Rep. Rate 1MHz tW 500ns tR 2.5ns tF 2.5ns SA00012 1997 Feb 03 7 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1 1997 Feb 03 8 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 1997 Feb 03 9 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 1997 Feb 03 10 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 1997 Feb 03 11 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A DEFINITIONS Data Sheet Identification Objective Specification Product Status Formative or in Design Definition This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Preliminary Specification Preproduction Product Product Specification Full Production Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. 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Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 © Copyright Philips Electronics North America Corporation 1997 All rights reserved. Printed in U.S.A. Philips Semiconductors 1997 Feb 03 12