AUIRF1324S-7P

AUTOMOTIVE GRADE PD - 96296 AUIRF1324S-7P Features l l l l l l l HEXFET® Power MOSFET D Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * V(BR)DSS RDS(on) typ. max. 24V 0.8mΩ 429A c 240A 1.0mΩ G S S (Pin 2, 3, 5, 6, 7) G (Pin 1) ID (Silicon Limited) ID (Package Limited) Description Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. D S G S S S S D 2Pak 7 Pin G D S Absolute Maximum Ratings Gate Drain Source Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified. Parameter ID @ TC = 25°C ID @ TC = 100°C ID @ TC = 25°C IDM PD @TC = 25°C VGS EAS (Thermally limited) IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Max. d Ãd e Peak Diode Recovery Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds f d 429 303 240 1640 300 2.0 ± 20 230 See Fig. 14, 15, 22a, 22b, 1.6 -55 to + 175 300 (1.6mm from case) ™ ™ Units A W W/°C V mJ A mJ V/ns °C Thermal Resistance RθJC RθJA Junction-to-Case Junction-to-Ambient (PCB Mount) , D2Pak k Parameter Typ. Max. 0.50 40 Units °C/W j ––– ––– HEXFET® is a registered trademark of International Rectifier. *Qualification standards can be found at http://www.irf.com/ www.irf.com 1 03/25/10 AUIRF1324S-7P Static Characteristics @ TJ = 25°C (unless otherwise stated) Parameter V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) gfs RG IDSS IGSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Internal Gate Resistance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units 24 ––– ––– 2.0 270 ––– ––– ––– ––– ––– ––– ––– 0.023 ––– 0.80 1.0 ––– 4.0 ––– ––– 3.0 ––– ––– 20 ––– 250 ––– 200 ––– -200 Conditions V VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 5mA mΩ VGS = 10V, ID = 160A V VDS = VGS, ID = 250µA S VDS = 50V, ID = 160A Ω VDS = 24V, VGS = 0V µA VDS = 19V, VGS = 0V, TJ = 125°C VGS = 20V nA VGS = -20V g g Dynamic Characteristics @ TJ = 25°C (unless otherwise stated) Parameter Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. Typ. Max. Units 180 47 58 122 19 240 86 93 7700 3380 1930 4780 4970 252 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– nC Conditions ID = 75A VDS =12V VGS = 10V ID = 75A, VDS =0V, VGS = 10V VDD = 16V ID = 160A RG =2.7Ω VGS = 10V VGS = 0V VDS = 19V ƒ = 1.0MHz, See Fig.5 VGS = 0V, VDS = 0V to 19V , See Fig.11 VGS = 0V, VDS = 0V to 19V ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Effective Output Capacitance (Energy Related) ––– ––– Effective Output Capacitance (Time Related) g g ns g pF i hà Diode Characteristics Parameter IS ISM VSD trr Qrr IRRM ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Min. Typ. Max. Units ––– ––– ––– 429 ––– ™ Conditions MOSFET symbol showing the integral reverse D Ãd 1636 A G S Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 160A, VGS = 0V VR = 20V, TJ = 25°C ––– 71 107 ns IF = 160A TJ = 125°C ––– 74 110 di/dt = 100A/µs TJ = 25°C ––– 83 120 nC TJ = 125°C ––– 92 140 ––– 2.0 ––– A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) g g Notes:  Calculated continuous current based on maximum allowable junction „ ISD ≤ 160A, di/dt ≤ 600A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. temperature. Package limitation current is 240A. Note that current … Pulse width ≤ 400µs; duty cycle ≤ 2%. limitations arising from heating of the device leads may occur with † Coss eff. (TR) is a fixed capacitance that gives the same charging time some lead mounting arrangements.(Refer to AN-1140 as Coss while VDS is rising from 0 to 80% VDSS . ‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as http://www.irf.com/technical-info/appnotes/an-1140.pdf Coss while VDS is rising from 0 to 80% VDSS. ‚ Repetitive rating; pulse width limited by max. junction ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom temperature. mended footprint and soldering techniques refer to application note #AN-994. ƒ Limited by TJmax, starting TJ = 25°C, L = 0.018mH ‰ Rθ is measured at TJ approximately 90°C RG = 25Ω, IAS = 160A, VGS =10V. Part not recommended for use above this value. 2 www.irf.com AUIRF1324S-7P Qualification Information† Automotive (per AEC-Q101) Qualification Level †† Comments: This part number(s) passed Automotive qualification. IR’s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. D2 PAK 7 Pin Class M4 AEC-Q101-002 Class H3A AEC-Q101-001 Class C5 AEC-Q101-005 Yes MSL1 Moisture Sensitivity Level Machine Model Human Body Model Charged Device Model RoHS Compliant ESD † Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/ †† Exceptions to AEC-Q101 requirements are noted in the qualification report. www.irf.com 3 AUIRF1324S-7P 1000 TOP VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V 1000 TOP VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) BOTTOM BOTTOM 100 100 4.5V 4.5V 10 0.1 1 ≤60µs PULSE WIDTH Tj = 25°C ≤60µs PULSE WIDTH Tj = 175°C 10 100 0.1 1 10 100 V DS, Drain-to-Source Voltage (V) 10 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 1000 RDS(on) , Drain-to-Source On Resistance (Normalized) Fig 2. Typical Output Characteristics 1.8 ID = 160A 1.6 1.4 1.2 1.0 0.8 0.6 VGS = 10V ID, Drain-to-Source Current (A) 100 T J = 175°C 10 TJ = 25°C 1 VDS = 15V ≤60µs PULSE WIDTH 0.1 2 3 4 5 6 7 8 9 -60 -40 -20 0 20 40 60 80 100 120140160 180 T J , Junction Temperature (°C) VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 100000 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd Fig 4. Normalized On-Resistance vs. Temperature 12.0 ID= 75A VGS, Gate-to-Source Voltage (V) 10.0 8.0 6.0 4.0 2.0 0.0 C, Capacitance (pF) VDS= 19V VDS= 12V 10000 Ciss Coss Crss 1000 1 10 VDS, Drain-to-Source Voltage (V) 100 0 50 100 150 200 QG, Total Gate Charge (nC) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 4 www.irf.com AUIRF1324S-7P 1000 10000 OPERATION IN THIS AREA LIMITED BY R DS(on) ISD, Reverse Drain Current (A) T J = 175°C 100 ID, Drain-to-Source Current (A) 1000 1msec 100µsec 100 10msec T J = 25°C 10 10 Tc = 25°C Tj = 175°C Single Pulse 1 0 1 DC VGS = 0V 1.0 0.0 0.5 1.0 1.5 2.0 2.5 VSD, Source-to-Drain Voltage (V) 10 100 Fig 7. Typical Source-Drain Diode Forward Voltage V(BR)DSS , Drain-to-Source Breakdown Voltage (V) Fig 8. Maximum Safe Operating Area 32 Id = 5mA 31 30 29 28 27 26 25 24 -60 -40 -20 0 20 40 60 80 100 120140 160180 T J , Temperature ( °C ) VDS, Drain-to-Source Voltage (V) 450 400 350 ID, Drain Current (A) Limited By Package 300 250 200 150 100 50 0 25 50 75 100 125 150 175 T C , Case Temperature (°C) Fig 9. Maximum Drain Current vs. Case Temperature EAS , Single Pulse Avalanche Energy (mJ) Fig 10. Drain-to-Source Breakdown Voltage 1000 900 800 700 600 500 400 300 200 100 0 25 50 75 100 125 150 175 ID TOP 45A 80A BOTTOM 160A 1.4 1.2 1.0 Energy (µJ) 0.8 0.6 0.4 0.2 0.0 -5 0 5 10 15 20 25 Fig 11. Typical COSS Stored Energy VDS, Drain-to-Source Voltage (V) Starting T J , Junction Temperature (°C) Fig 12. Maximum Avalanche Energy vs. DrainCurrent www.irf.com 5 AUIRF1324S-7P 1 Thermal Response ( Z thJC ) °C/W D = 0.50 0.1 0.20 0.10 0.05 0.01 0.02 0.01 τJ τJ τ1 R1 R1 τ2 R2 R2 R3 R3 τ3 R4 R4 τC τ τ1 τ2 τ3 τ4 τ4 Ri (°C/W) 0.02070 0.08624 0.24491 0.15005 τi (sec) 0.000010 0.000070 0.001406 0.009080 Ci= τi/Ri Ci i/Ri SINGLE PULSE ( THERMAL RESPONSE ) 1E-005 0.0001 0.001 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.01 0.1 0.001 1E-006 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Duty Cycle = Single Pulse Avalanche Current (A) 100 0.05 0.10 10 0.01 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆ Tj = 150°C and Tstart =25°C (Single Pulse) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and Tstart = 150°C. 1 1.0E-06 1.0E-05 1.0E-04 tav (sec) 1.0E-03 1.0E-02 1.0E-01 Fig 14. Typical Avalanche Current vs.Pulsewidth 6 www.irf.com AUIRF1324S-7P 250 TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 160A EAR , Avalanche Energy (mJ) 200 150 100 50 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figure 22a, 22b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav ) = Transient thermal resistance, see Figures 13) 175 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 15. Maximum Avalanche Energy vs. Temperature 4.5 VGS(th) , Gate threshold Voltage (V) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( °C ) ID = 250µA ID = 1.0mA ID = 1.0A Fig 16. Threshold Voltage Vs. Temperature www.irf.com 7 AUIRF1324S-7P D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt ‚ - - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD VDD + - Re-Applied Voltage Body Diode Forward Drop Inductor Curent Inductor Current Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V tp DRIVER VDS L RG 20V D.U.T IAS tp + V - DD A 0.01Ω I AS Fig 22a. Unclamped Inductive Test Circuit LD VDS Fig 22b. Unclamped Inductive Waveforms VGS + VDD - 90% D.U.T VGS Second Pulse Width < 1µs Duty Factor < 0.1% 10% VDS td(off) tf td(on) tr Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms Id Vds Vgs L 0 DUT 1K 20K S VCC Vgs(th) Qgodr Qgd Qgs2 Qgs1 8 Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform www.irf.com AUIRF1324S-7P D2Pak - 7 Pin Package Outline Dimensions are shown in millimeters (inches) D2Pak - 7 Pin Part Marking Information Part Number AUIRF1324S-7 IR Logo YWWA XX or XX Date Code Y= Year WW= Work Week A= Automotive, Lead Free Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 9 AUIRF1324S-7P D2Pak - 7 Pin Tape and Reel 10 www.irf.com AUIRF1324S-7P Ordering Information Base part number AUIRF1324S-7P Package Type D2Pak Standard Pack Form Tube Tape and Reel Left Tape and Reel Right Complete Part Number Quantity 50 800 800 AUIRF1324S-7P AUIRF1324S-7PTRL AUIRF1324S-7PTRR www.irf.com 11 AUIRF1324S-7P IMPORTANT NOTICE Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or services without notice. 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Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, IR will not be responsible for any failure to meet such requirements For technical support, please contact IR’s Technical Assistance Center http://www.irf.com/technical-info/ WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 12 www.irf.com