AUIRS2003S

September 21, 2009 Automotive Grade AUIRS2003S HALF-BRIDGE DRIVER Features • • • • • • • • • • • • • Product Summary General Driver ≤ 200V 10V – 20V 290mA & 600mA 680ns & 150ns 520ns Floating channel designed for bootstrap operation Topology Fully operational to +200V Tolerant to negative transient voltage, dV/dt immune VOFFSET Gate drive supply range from 10V to 20V VOUT Undervoltage lockout 3.3V, 5V, and 15V logic compatible Io+ & I o- (typical) Cross-conduction prevention logic ton & toff (typical) Matched propagation delay for both channels Internal set deadtime Deadtime (typical) High-side output in phase with HIN input Low-side output out of phase with LIN input Package Options Leadfree, RoHS compliant Automotive qualified* Typical Applications • • • Pre-charge Switch Drives Stepper / Motor Drives DC-DC Converters 8 - Lead SOIC AUIRS2003S Diagram for DC-DC converter application Vcc FROM SWITCHING CONTROL CIRCUIT AUIRS2003 VB HO TO LOAD HIN LIN COM VS LO * Qualification standards can be found on IR’s web site www.irf.com © 2008 International Rectifier AUIRS2003S Table of Contents Typical Connection Diagram Description/Feature Comparison Qualification Information Absolute Maximum Ratings Recommended Operating Conditions Static Electrical Characteristics Dynamic Electrical Characteristics Functional Block Diagram Input/Output Pin Equivalent Circuit Diagram Lead Definitions Lead Assignments Application Information and Additional Details Package Details: SOIC8N Package Details: SOIC8N, Tape and Reel Part Marking Information Ordering Information Page 1 3 4 5 5 6 6 7 8 9 9 10 11 12 13 14 www.irf.com © 2008 International Rectifier 2 AUIRS2003S Description The AUIRS2003S is a high voltage, high speed power MOSFET and IGBT driver with dependent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 200V. Typical Connection Diagram www.irf.com © 2008 International Rectifier 3 AUIRS2003S Qualification Information† Qualification Level Automotive (per AEC-Q100††) Comments: This family of ICs has passed an Automotive qualification. IR’s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. MSL3††† 260°C SOIC8N (per IPC/JEDEC J-STD-020) Class M2 (per AEC-Q100-003) Class H2 (per AEC-Q100-002) Class C5 (per AEC-Q100-011) Class II, Level B (per AEC-Q100-004) Yes Moisture Sensitivity Level Machine Model ESD Human Body Model Charged Device Model IC Latch-Up Test RoHS Compliant † Qualification standards can be found at International Rectifier’s web site http://www.irf.com/ †† Exceptions to AEC-Q100 requirements are noted in the qualification report. ††† Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information. www.irf.com © 2008 International Rectifier 4 AUIRS2003S Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol VB VS VHO VCC VLO VIN dVS/dt PD RthJA TJ TS TL Definition High side floating absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage (HIN & LIN) Allowable offset supply voltage transient Package power dissipation @ TA ≤ 25°C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) Min. -0.3 V B - 25 VS - 0.3 -0.3 -0.3 -0.3 — — — — -55 — Max. 225 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 50 0.625 200 150 150 300 Units V V/ns W °C/W °C Recommended Operating Conditions The input/output logic timing diagram is shown in Fig 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential. Symbol VB VS VHO VCC VLO VIN TA Definition High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage Ambient temperature Min. V S + 10 † VS 10 0 0 -40 Max. VS + 20 200 VB 20 VCC VCC 125 Units V °C † Logic operational for VS of -5V to +200V. Logic state held for VS of -5V to –VBS. (Please refer to the Design Tip DR97-3 for more details). www.irf.com © 2008 International Rectifier 5 AUIRS2003S Dynamic Electrical Characteristics VCC = VBS = 15V, CL = 1000pF, TA = 25°C unless otherwise specified. Symbol ton toff tr tf DT MT Definition Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time Deadtime, LO turn-off to HO turn-on & HO turn-on to LO turn-off Delay matching , HO & LO turn-on/off Min — — — — 400 — Typ 680 150 70 35 520 — Max 820 220 170 90 650 60 Units Test Conditions VS = 0 V VS = 200V ns Static Electrical Characteristics VCC = VBS = 15V and TA = 25°C unless otherwise specified. The VIN and IIN parameters are referenced to COM and are applicaple to the input leads: HIN and LIN. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol VIH VIL VOH VOL ILK IQBS IQCC IIN+ IINVCCUV+ VBSUV+ VCCUVVBSUVIO+ IODefinition Logic “1” input voltage Logic “0” input voltage High level output voltage, VCC or VBS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic “1” input bias current Logic “0” input bias current VCC and VBS supply undervoltage positive going threshold VCC and VBS supply undervoltage negative going threshold Output high short circuit pulsed current Output low short circuit pulsed current Min 2.5 — — — — — — — — 8.0 7.4 130 270 Typ — — 0.05 0.02 — 30 150 3 — 8.9 8.2 290 600 Max — 0.8 0.2 0.1 50 55 270 10 5 9.8 V 9.0 — mA — VO = 0V, VIN = VIH PW ≤ 10 µs VO = 15V, VIN = VIL PW ≤ 10 µs Units V IO = 2mA VB = VS = 200V µA VIN = 0V or 5V VIN = 5V VIN = 0V Test Conditions VCC = 10V to 20V www.irf.com © 2008 International Rectifier 6 AUIRS2003S Functional Block Diagram www.irf.com © 2008 International Rectifier 7 AUIRS2003S Input/Output Pin Equivalent Circuit Diagrams www.irf.com © 2008 International Rectifier 8 AUIRS2003S Lead Definitions PIN 1 2 3 4 5 6 7 8 Symbol VCC HIN Low side and logic fixed supply Logic input for high side gate driver output (HO), in phase Logic input for low side driver output (LO), out of phase Low side return Low side gate drive output High side floating supply return High side gate drive output High side floating supply Description LIN COM LO VS HO VB Lead Assignments www.irf.com © 2008 International Rectifier 9 AUIRS2003S Application Information and Additional Details LIN 50% HIN 50% ton LIN tr 90% toff 90% tf LO HO 10% 10% LO 50% HIN ton tr 90% 50% toff 90% 10% tf Figure 1: Input/Output Timing Diagram HO 10% Figure 2: Switching Time Waveform Definition Figure 3: Delay Matching Waveform Definitions www.irf.com © 2008 International Rectifier 10 AUIRS2003S Package Details: SOIC8N www.irf.com © 2008 International Rectifier 11 AUIRS2003S Package Details: SOIC8N, Tape and Reel LOADED TAPE FEED DIRECTION B A H D F C NOTE : CONTROLLING DIMENSION IN MM E G CARRIER TAPE DIMENSION FOR 8SOICN Metric Imperial Code Min Max Min Max A 7.90 8.10 0.311 0.318 B 3.90 4.10 0.153 0.161 C 11.70 12.30 0.46 0.484 D 5.45 5.55 0.214 0.218 E 6.30 6.50 0.248 0.255 F 5.10 5.30 0.200 0.208 G 1.50 n/a 0.059 n/a H 1.50 1.60 0.059 0.062 F D C E B A G H REEL DIMENSIONS FOR 8SOICN Metric Code Min Max A 329.60 330.25 B 20.95 21.45 C 12.80 13.20 D 1.95 2.45 E 98.00 102.00 F n/a 18.40 G 14.50 17.10 H 12.40 14.40 Imperial Min Max 12.976 13.001 0.824 0.844 0.503 0.519 0.767 0.096 3.858 4.015 n/a 0.724 0.570 0.673 0.488 0.566 www.irf.com © 2008 International Rectifier 12 AUIRS2003S Part Marking Information www.irf.com © 2008 International Rectifier 13 AUIRS2003S Ordering Information Standard Pack Base Part Number Package Type Form AUIRS2003S SOIC8 Tube/Bulk Tape and Reel Quantity 95 2500 AUIRS2003S AUIRS2003STR Complete Part Number The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This document supersedes and replaces all information previously supplied. For technical support, please contact IR’s Technical Assistance Center http://www.irf.com/technical-info/ WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 www.irf.com © 2008 International Rectifier 14 AUIRS2003S Revision History Date 5/12/08 Comment Tables modified for AUIRS2003 Added cross conduction prevention comment to IC features Changed product summary topology to “General Driver” Changed product summary IO+ & IO- units from A to mA Modified functional block diagram to include the deadtime and shoot-through protection Added VBSUV+ and VBSUV- parameters Added input/output pin equivalent circuit diagrams Added IC label on lead assignment block Updated waveform diagrams to reflect proper labeling Reviewed all text/diagrams to reflect proper reference to LIN Updated LU rating to Class II level B (due to input pins having LU