ETQP6F0R6BFA

REFERENCE DESIGN International Rectifier IRDCiP2001-A • 233 Kansas Street, El Segundo, CA 90245 USA Overview IRDCiP2001-A, 500kHz, 40A, 2-phase Synchronous Buck Converter using iP2001 In this document, table 1 and figure 1 are provided to enable engineers to easily evaluate the iP2001 in a 2-phase configuration that is capable of providing up to 40A in a lab environment without airflow. Figures 3, 4, 5 and 6 and the complete bill of materials in table 2 are provided as a reference design to enable engineers to very quickly and easily design a 2-phase converter. In order to optimize this design to your specific requirements refer to the data sheet for the controller listed in the bill of materials. A variety of other controllers may also be used, but the design will require layout and control circuit modifications. Demoboard Quick Start Guide Initial Settings: The output is set to 1.7V, but can be adjusted from 1.1 to 1.85V by setting S1 according to the VID codes provided in Table 1. Droop control is set to 50mV at 40A, but can be adjusted by following the instructions in the data sheet for the PWM controller. The switching frequency per phase is set to 500kHz with the frequency set resistor R4. This creates an effective output frequency of 1MHz. The graph in figure 1 shows the relationship between R4 and the switching frequency per phase. This frequency may be adjusted by changing R4 according to this graph; however, extreme changes from the 500kHz set point may require redesigning the control loop and adjusting the values of input and output capacitors. Also, refer to the SOA graph in the iP2001 datasheet for maximum operating current at different frequencies. Procedure for Connecting and Powering Up Demoboard: 1. Apply input voltage (5-12V) across VIN (TP18) and PGND (TP15). Note that this input source must be applied first during the power-up sequence. 2. Apply +5V logic power across +5V (TP19) and PGND (TP20). 3. Apply load across VOUT pads (TP11 & TP12) and PGND pads (TP15 & TP16) 4. Set ENABLE high. 5. Monitor switch node signals (optional) via TP7 & TP8. 6. Adjust load accordingly. iP2001 Recommended Operating Conditions (refer to the iP2001 datasheet for maximum operating conditions) Input voltage: 5 - 12V Output voltage: 1.1 - 1.85V Output current: 20A per phase, 40A total for 2-phase demo board. Switching Freq: 500kHz per phase, 1MHz effective output frequency. 07/19/02 IRDCiP2001-A 1000 100 Resistance (kΩ ) 10 1 100 1000 Output Frequency (kHz) Figure 1 - R4 vs. Frequency (per Phase) VID4 VID3 VID2 VID1 VID0 1 1 1 1 1 1 1 1 1 0 1 1 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 0 1 1 0 0 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 0 1 0 1 0 1 1 0 1 0 0 1 0 0 1 1 1 0 0 1 0 1 0 0 0 1 1 0 0 0 0 2 VDAC Off 1.100 1.250 1.150 1.175 1.200 1.225 1.250 1.275 1.300 1.325 1.350 1.375 1.400 1.425 1.450 VID4 VID3 VID2 VID1 VID0 0 1 1 1 1 0 1 1 1 0 0 1 1 0 1 0 1 1 0 0 0 1 0 1 1 0 1 0 1 0 0 1 0 0 1 0 1 0 0 0 0 0 1 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 VDAC 1.475 1.500 1.525 1.550 1.575 1.600 1.625 1.650 1.675 1.700 1.725 1.750 1.775 1.800 1.825 1.850 www.irf.com Table 1 - PWM IC Voltage Identification Codes IRDCiP2001-A 92% fSW = 500kHz 90% 88% 86% VIN = 12V VOUT = 1.6V TA = 25°C fSW = 1MHz 84% 82% 80% 0 5 10 15 20 25 30 35 40 Output Current (A) Figure 2 - Typical Efficiency vs. Current Refer to the following application notes for detailed guidelines and suggestions when implementing iPOWIR Technology products: AN-1028: Recommended Design, Integration and Rework Guidelines for International Rectifier’s iPOWIR Technology BGA Packages This paper discusses the assembly considerations that need to be taken when mounting iPOWIR BGA’s on printed circuit boards. This includes soldering, pick and place, reflow, inspection, cleaning and reworking recommendations. AN-1029: Optimizing a PCB Layout for an iPOWIR Technology Design This paper describes how to optimize the PCB layout design for both thermal and electrical performance. This includes placement, routing, and via interconnect suggestions. AN-1030: Applying iPOWIR Products in Your Thermal Environment This paper explains how to use the Power Loss and SOA curves in the data sheet to validate if the operating conditions and thermal environment are within the Safe Operating Area of the iPOWIR product. www.irf.com Efficiency 3 12 11 9 10 8 7 VOUT SENSE S1 1 2 3 4 5 6 R6 10K 7 6 U1 FB VCC PWM1 16 15 13 14 0 ISEN3 PWM3 VDD 17 18 PWM2 R16 10K ENABLE PRDY U3 C27 10uF * COMP 4 R3 open Cx *Rx &Cx are not parts of PCB Rx C28 +5V C1 0.022uF C2 10uF VIN C9 10uF C10 10uF R8 2K 1% L3 0.54uH PRDY U4 PGND C22 100uF TP8 SWNODE3 C11 10uF C31 10uF SWNODE3 ENABLE VSW3 SGND 20 ENABLE R17 10K VDD Vin +5V IP2001 0 R14 22pF R1 1K IRDCiP2001-A ENABLE 1K 51 4700pF R2 +5V VSEN ISEN1 PWM1 0 R11 ISEN2 PWM2 12 11 IP2001 VIN C6 10uF SWNODE2 VSW2 PGND C7 10uF C8 10uF SGND ENABLE +5V +5V Vin TP18 Vin C30 10uF TP7 SWNODE2 R7 2K 1% R12 PGOOD VID4 VID3 VID2 VID1 VID0 FS/DIS +5V GND HIP6311 PWM4 ISEN4 TP5 19 1 2 3 4 5 8 R4 9 51K VID4 PGOOD VID3 VID2 VID1 VID0 10 C23 100uF TP11 VOUT TP12 VOUT L2 0.54uH VOUT Freq. Set Resistor VOUT SENSE TP21 C19 100uF C20 100uF VOUT SENSE C33 0.01uF PGNDSENSE TP22 PGND SENSE TP15 PGND TP16 PGND Fig. 3 - Reference Design Schematic +5V TP19 +5V TP20 PGND Note: Rx and Cx are add on components www.irf.com IRDCiP2001-A Fig. 4 - Component Placement Top Layer Fig. 5 - Component Placement Bottom Layer www.irf.com 5 IRDCiP2001-A Designator C1 C2, C6-C11, C27, C30, C31 C19, C20, C22, C23 C28 C33 Cx L2 L3 R1, R2 R11, R12, R14 R6, R16, R17 R3, R19, D2, D3 R4 R7, R8 Rx S1 ST1 - ST4 U1 U3, U4 Value 1 0.022uF 10.0uF 100uF 22.0pF 0.010uF 4700pF 0.54uH 1K 0 10K 51K 2K 51 SPST 4-40 Value 2 T ype Tolerance Package Mfr. 50V X7R 10% 0805 TDK 16V X5R 10% 1210 TDK 6.3V X5R 10% 2220 TDK 50V COG 5% 0805 TDK 50V X7R 10% 0805 TDK 50V X7R 10% 0603 TDK 27A Ferrite 20% SMT Panasonic 1/8W Thick film 5% 0805 ROHM 1/8W Thick film