IR21364JPbF

Data Sheet No. PD PD60342A November 13, 2009 IR21364(S&J)PbF 3-PHASE BRIDGE DRIVER Features • • • • • • • • • • • • • Floating channel designed for bootstrap operation Tolerant to negative transient voltage – dV/dt immune Gate drive supply range from 11.5 V to 20 V Undervoltage lockout for all channels Over-current shutdown turns off all six drivers Independent 3 half-bridge drivers Matched propagation delay for all channels Cross-conduction prevention logic Low side and High side outputs in phase with inputs. 3.3 V logic compatible Lower di/dt gate drive for better noise immunity Externally programmable delay for automatic fault clear RoHS Compliant Product Summary Topology VOFFSET VOUT Io+ & I o(typical) tON & tOFF (typical) Package Options 3 phase bridge driver ≤ 600 V 11.5 V – 20 V 200 mA & 350 mA 500 ns & 530 ns Typical Applications • • • • Motor Control Air Conditioners/ Washing Machines General Purpose Inverters Micro/Mini Inverter Drivers 28-Lead SOIC 44-Lead PLCC w/o 12 Leads www.irf.com © 2009 International Rectifier 1 IR21364(S&J)PbF Description The IR21364(S&J)PBF is a high voltage, high speed power MOSFET and IGBT drivers with three independent high and low side referenced output channels for 3-phase applications. Proprietary HVIC technology enables ruggedized monolithic construction. Logic inputs are compatible with CMOS or LSTTL outputs, down to 3.3V logic. A current trip function which terminates all six outputs can be derived from an external current sense resistor. An enable function is available to terminate all six outputs simultaneously. An open-drain FAULT signal is provided to indicate that an overcurrent or undervoltage shutdown has occurred. Overcurrent fault conditions are cleared automatically after a delay programmed externally via an RC network connected to the RCIN input. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive N-channel power MOSFETs or IGBTs in the high side configuration which operates up to 600 V. Qualification Information † Industrial Qualification Level †† Comments: This family of ICs has passed JEDEC’s Industrial qualification. IR’s Consumer qualification level is granted by extension of the higher Industrial level. SOIC28W MSL3 , 260°C (per IPC/JEDEC J-STD-020) MSL3 , 245°C (per IPC/JEDEC J-STD-020) ††† ††† Moisture Sensitivity Level PLCC44 Human Body Model ESD Machine Model IC Latch-Up Test RoHS Compliant † †† ††† Class 2 (per JEDEC standard JESD22-A114) Class B (per EIA/JEDEC standard EIA/JESD22-A115) Class I, Level A (per JESD78) Yes Qualification standards can be found at International Rectifier’s web site http://www.irf.com/ Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information. www.irf.com © 2009 International Rectifier 2 IR21364(S&J)PbF Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol VS VB VHO VCC VSS VLO1,2,3 VIN VFLT dV/dt PD RthJA TJ TS TL High side offset voltage Definition High side floating supply voltage High side floating output voltage Low side and logic fixed supply voltage Logic ground Low side output voltage Input voltage LIN, HIN, ITRIP, EN, RCIN FAULT output voltage Allowable offset voltage slew rate Package power dissipation @ TA ≤ +25 ° C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (28 lead SOIC) (44 lead PLCC) (28 lead SOIC) (44 lead PLCC) Min -0.3 -0.3 VCC - 25 -0.3 VSS -0.3 VSS -0.3 — — — — — — -55 — Max 625 25 VCC + 0.3 VCC + 0.3 lower of VCC + 0.3 or Vss+15 VCC + 0.3 50 1.6 2.0 78 63 150 150 300 Units VB 1,2,3 - 25 VB 1,2,3 + 0.3 VS1,2,3 - 0.3 VB 1,2,3 + 0.3 V V/ns W ° C/W ° C Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute referenced to COM. The VS & VSS offset rating are tested with all supplies biased at a 15 V differential. Symbol VB1,2,3 VS 1,2,3 VCC VHO 1,2,3 VLO1,2,3 VSS VFLT VRCIN Definition High side floating supply voltage High side floating supply voltage Low side supply voltage High side output voltage Low side output voltage Logic ground FAULT output voltage RCIN input voltage IR21364 IR21364 Min. VS1,2,3 +11.5 Note 1 11.5 VS1,2,3 0 -5 VSS VSS Max. VS1,2,3 + 20 600 20 VB1,2,3 VCC 5 VCC VCC Units V ITRIP input voltage VSS VSS + 5 Logic input voltage LIN, HIN, EN VSS VSS + 5 -40 Ambient temperature 125 ° C Note 1: Logic operational for VS of COM -5 V to COM + 600 V. Logic state held for VS of COM -5 to COM – VBS. (Please refer to the Design Tip DT97 -3 for more details). www.irf.com © 2009 International Rectifier VITRIP VIN TA 3 IR21364(S&J)PbF Static Electrical Characteristics VBIAS (VCC, VBS 1,2,3) = 15 V, TA = 25° unless otherwise specified. The VIN, VTH and IIN parameters are referenced to C VSS and are applicable to all six channels (HIN1,2,3 and LIN1,2,3). The VO and IO parameters are referenced to COM and VS1,2,3 and are applicable to the respective output leads: HO1,2,3 and LO1,2,3. Symbol VIH VIL VEN,TH+ VEN,THVIT,TH+ VIT,HYS VRCIN, TH+ VRCIN, HYS VOH VOL VCCUV+ VCCUVVCCUVHY VBSUV+ VBSUVVBSUVHY llk IQBS IQCC ILIN+ ILINIHIN+ IHINIITRIP+ IITRIPIEN+ IENIRCIN Io+ IoRon_RCIN Ron_FAULT Definition Logic “0” input voltage Logic “1” input voltage Enable positive going threshold Enable negative going threshold ITRIP positive going threshold ITRIP hysteresis RCIN positive going threshold RCIN hysteresis High level output voltage, VBIAS - VO Low level output voltage, VO VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold VCC supply undervoltage hysteresis VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold VBS supply undervoltage hysteresis Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Input bias current (LOUT = HI) Input bias current (LOUT = LO) Input bias current (HOUT = HI) Input bias current (HOUT = LO) “High” ITRIP input bias current “Low” ITRIP input bias current “High” ENABLE input bias current “Low” ENABLE input bias current RCIN input bias current Output high short circuit pulsed current Output low short circuit pulsed current RCIN low on resistance FAULT low on resistance IR21364 IR21364 IR21364 IR21364 IR21364 IR21364 Min Typ Max Units — 2.5 — 0.8 0.37 — — — — — 9.6 8.6 — 9.6 8.6 — — — — — -1 — -1 — -1 — -1 — 120 250 — — — — — — 0.46 0.07 8 3 0.9 0.4 10.4 9.4 1 10.4 9.4 1 — 70 0.6 100 — 100 — 3.3 — 100 — — 200 350 50 50 0.8 — 2.5 — 0.55 — — — 1.4 0.6 11.2 10.2 — 11.2 10.2 — 50 120 1.3 195 — 195 — 6 — — — 1 — mA — 100 100 µA mA V Test Conditions Io = 20 mA µA VB = VS = 600 V VB1,2,3 = VS1,2,3 = 600 V VIN = 0 V or 5 V VLIN = 3.3 V VLIN = 0 V VHIN = 3.3 V VHIN = 0 V VITRIP = 3.3 V VITRIP = 0 V VEN = 3.3 V VEN = 0 V Vrcin = 0 V or 15 V Vo = 0 V, PW ≤ 10 µs Vo = 15 V, PW ≤ 10 µs I = 1.5 mA www.irf.com © 2009 International Rectifier 4 IR21364(S&J)PbF Dynamic Electrical Characteristics Dynamic Electrical Characteristics VCC = VBS = VBIAS = 15 V, VS1,2,3 = VSS = COM, TA = 25° and CL = 1000 pF C unless otherwise specified. Symbol ton toff tr tf tEN tITRIP tbl tFLT tFILIN tfilterEn DT MT MDT PM tFLTCLR Definition Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time ENABLE low to output shutdown propagation delay ITRIP to output shutdown propagation delay ITRIP blanking time ITRIP to FAULT propagation delay Input filter time (HIN, LIN) Enable input filter time Deadtime Ton, off matching time (on all six channels) DT matching (Hi->Lo & Lo->Hi on all channels) pulse width distortion (pwin-pwout) FAULT clear time RCIN: R = 2 M , C = 1 nF Min 350 375 — — 300 500 100 400 100 100 220 — — — 1.3 Typ 500 530 125 50 450 750 150 600 200 200 290 — — — 1.65 Max Units 650 685 190 75 600 1000 — 800 — — 360 75 70 75 2 ms ns Test Conditions VIN = 0 V & 5 V VIN, VEN = 0 V or 5 V VITRIP = 5 V VIN = 0 V or 5 V VITRIP = 5 V VIN = 0 V & 5 V External dead time >450 nsec PW input =10 µs VIN = 0 V or 5 V VITRIP = 0 V www.irf.com © 2009 International Rectifier 5 IR21364(S&J)PbF HIN1,2,3 LIN1,2,3 EN ITRIP FAULT RCIN HO1,2,3 LO1,2,3 Fig. 1. Input/Output Timing Diagram LIN1,2,3 HIN1,2, 50% 50% 50% EN PWIN ten HO1,2,3 LO1,2,3 ton t r 90% PW 90% 50 tof f 90% t f HO1,2,3 LO1,2,3 10% 10% Fig. 2. Switching Time Waveforms Fig. 3. Output Enable Timing Waveform www.irf.com © 2009 International Rectifier 6 IR21364(S&J)PbF Fig. 4. Internal Deadtime Timing Waveforms R C IN 50% 50% IT R IP FA U LT Any Ouput tflt 50% 50% 90% tfltclr titrip Fig. 5. ITRIP/RCIN Timing Waveforms tin,fi l tin,fi l on off off on on off HIN/LI high lo w Fig. 6. Input Filter Function www.irf.com © 2009 International Rectifier 7 IR21364(S&J)PbF Lead Definitions Symbol VCC VSS HIN1,2,3 LIN1,2,3 FAULT EN ITRIP RCIN COM VB1,2,3 HO1,2,3 VS1,2,3 LO1,2,3 Low side supply voltage Logic ground Logic inputs for high side gate driver outputs (HO1,2,3), in phase Logic input for low side gate driver outputs (LO1,2,3), in phase Indicates over-current (ITRIP) or low-side undervoltage lockout has occurred. Negative logic, open-drain output Logic input to enable I/O functionality. Positive logic, i.e. I/O logic functions When ENABLE is high. No effect on FAULT and not latched Analog input for overcurrent shutdown. When active, ITRIP shuts down outputs and activates FAULT and RCIN low. When ITRIP becomes inactive, FAULT stays active low for an externally set time TFLTCLR, then automatically becomes inactive (open-drain high impedance). External RC network input used to define FAULT CLEAR delay, TFLTCLR, approximately equal to R*C. When RCIN > 8 V, the FAULT pin goes back into open-drain high-impedance Low side gate drivers return High side floating supply High side gate driver outputs High voltage floating supply return Low side gate driver outputs Description www.irf.com © 2009 International Rectifier 8 IR21364(S&J)PbF Functional Block Diagram VCC UVCC, FAULT return to high impedance. Note 3: When ITRIP