IR2184S

Data Sheet No. PD60174-D IR2184(4)(S) Features HALF-BRIDGE DRIVER Packages 14-Lead PDIP IR21844 8-Lead SOIC IR2184S • Floating channel designed for bootstrap operation • • • • • • • Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for both channels 3.3V and 5V input logic compatible Matched propagation delay for both channels Logic and power ground +/- 5V offset. Lower di/dt gate driver for better noise immunity Output source/sink current capability 1.4A/1.8A 8-Lead PDIP IR2184 14-Lead SOIC IR21844S Description The IR2184(4)(S) are high voltage, high speed power MOSFET and IGBT IR2181/IR2183/IR2184 Feature Comparison drivers with dependent high and low Crossconduction Input side referenced output channels. ProDead-Time Ground Pins Ton/Toff Part prevention logic prietary HVIC and latch immune logic CMOS technologies enable rugge2181 COM HIN/LIN no none 180/220 ns 21814 VSS/COM dized monolithic construction. The 2183 Internal 500ns COM HIN/LIN yes 180/220 ns logic input is compatible with standard 21834 Program 0.4 ~ 5 us VSS/COM CMOS or LSTTL output, down to 3.3V 2184 Internal 500ns COM IN/SD yes 680/270 ns 21844 Program 0.4 ~ 5 us VSS/COM logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts. Typical Connection up to 600V V CC V CC IN SD VB HO VS LO up to 600V TO LOAD IN SD COM IR2184 HO V CC IN SD V CC IN SD DT V SS RDT V SS COM LO VB VS TO LOAD IR21844 (Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IR2184(4) (S) Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol VB VS VHO VCC VLO DT VIN VSS dVS/dt PD Definition High side floating absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Programmable dead-time pin voltage (IR21844 only) Logic input voltage (IN & SD) Logic ground (IR21844 only) Allowable offset supply voltage transient Package power dissipation @ TA ≤ +25°C (8-lead PDIP) (8-lead SOIC) (14-lead PDIP) (14-lead SOIC) Min. -0.3 VB - 25 VS - 0.3 -0.3 -0.3 VSS - 0.3 VSS - 0.3 VCC - 25 — — — — — — — — — — -50 — Max. 625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 VSS + 10 VCC + 0.3 50 1.0 0.625 1.6 1.0 125 200 75 120 150 150 300 Units V V/ns W RthJA Thermal resistance, junction to ambient (8-lead PDIP) (8-lead SOIC) (14-lead PDIP) (14-lead SOIC) °C/W TJ TS TL Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) °C Recommended Operating Conditions The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential. Symbol VB VS VHO VCC VLO VIN DT VSS TA Definition High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage (IN & SD) Programmable dead-time pin voltage (IR21844 only) Logic ground (IR21844 only) Ambient temperature Min. VS + 10 Note 1 VS 10 0 VSS VSS -5 -40 Max. VS + 20 600 VB 20 VCC VSS + 5 VCC 5 125 Units V °C Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -V BS. (Please refer to the Design Tip DT97-3 for more details). Note 2: IN and SD are internally clamped with a 5.2V zener diode. 2 www.irf.com IR2184(4) (S) Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25°C, DT = VSS unless otherwise specified. Symbol ton toff tsd MTon MToff tr tf DT MDT Definition Turn-on propagation delay Turn-off propagation delay Shut-down propagation delay Delay matching, HS & LS turn-on Delay matching, HS & LS turn-off Turn-on rise time Turn-off fall time Deadtime: LO turn-off to HO turn-on(DTLO-HO) & HO turn-off to LO turn-on (DTHO-LO) Deadtime matching = DTLO - HO - DTHO-LO Min. — — — — — — — 280 4 — — Typ. 680 270 180 0 0 40 20 400 5 0 0 Max. Units Test Conditions 900 400 270 90 40 60 35 520 6 50 600 µsec nsec VS = 0V VS = 0V RDT= 0 RDT = 200k RDT=0 RDT = 200k nsec VS = 0V VS = 0V or 600V Static Electrical Characteristics VBIAS (VCC , VBS ) = 15V, VSS = COM, DT= V SS and TA = 25°C unless otherwise specified. The VIL, VIH and IIN parameters are referenced to VSS /COM and are applicable to the respective input leads: IN and SD. The VO, IO and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol VIH VIL VSD,TH+ VSD,THVOH VOL ILK IQBS IQCC IIN+ IINVCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH IO+ IO- Definition Logic “1” input voltage for HO & logic “0” for LO Logic “0” input voltage for HO & logic “1” for LO SD input positive going threshold SD input negative going threshold High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic “1” input bias current Logic “0” input bias current VCC and VBS supply undervoltage positive going threshold VCC and VBS dupply undervoltage negative going threshold Hysteresis Output high short circuit pulsed vurrent Output low short circuit pulsed current Min. Typ. Max. Units Test Conditions 2.7 — 2.7 — — — — 20 0.4 — — 8.0 7.4 0.3 1.4 1.8 — — — — — — — 60 1.0 5 1 8.9 8.2 0.7 1.9 2.3 — 0.8 — 0.8 1.2 0.1 50 150 1.6 20 2 9.8 9.0 — — — A V µA mA µA V VCC = 10V to 20V VCC = 10V to 20V VCC = 10V to 20V VCC = 10V to 20V IO = 0A IO = 0A VB = VS = 600V VIN = 0V or 5V VIN = 0V or 5V IN = 5V, SD = 0V IN = 0V, SD = 5V VO = 0V, PW ≤ 10 µs VO = 15V, PW ≤ 10 µs www.irf.com 3 IR2184(4) (S) Functional Block Diagrams VB 2 184 IN VSS/COM LEVEL SHIFT HV LEVEL SHIFTER PULSE GENERATOR UV DETECT R PULSE FILTER R S Q HO VS DEADTIME UV DETECT VCC +5V LO SD VSS/COM LEVEL SHIFT DELAY COM VB 2 1844 IN VSS/COM LEVEL SHIFT HV LEVEL SHIFTER PULSE GENERATOR UV DETECT R PULSE FILTER R S Q HO VS DT +5V DEADTIME UV DETECT VCC LO SD VSS/COM LEVEL SHIFT DELAY COM VSS 4 www.irf.com IR2184(4) (S) Lead Definitions Symbol Description IN SD DT VSS VB HO VS VCC LO COM Logic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM for IR2184 and VSS for IR21844) Logic input for shutdown (referenced to COM for IR2184 and VSS for IR21844) Programmable dead-time lead, referenced to VSS. (IR21844 only) Logic Ground (21844 only) High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return Lead Assignments 1 2 3 4 IN SD COM LO VB HO VS VCC 8 7 6 5 1 2 3 4 IN SD COM LO VB HO VS VCC 8 7 6 5 8-Lead PDIP 8-Lead SOIC IR2184 IR2184S 1 2 3 4 5 6 7 IN SD VSS DT COM LO VCC VB HO VS 14 13 12 11 10 9 8 1 2 3 4 5 6 7 IN SD VSS DT COM LO VCC VB HO VS 14 13 12 11 10 9 8 14-Lead PDIP 14-Lead SOIC IR21844 www.irf.com IR21844S 5 IR2184(4) (S) 8-Lead PDIP 01-6014 01-3003 01 (MS-001AB) D A 5 B F OOT PRINT 8X 0.72 [.028] DIM A b INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574 MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 A1 .0040 c 6 E 8 7 6 5 H 0.25 [.010] A 6.46 [.255] D E e e1 H K L 8X 1.78 [.070] 1 2 3 4 .050 BAS IC .025 BAS IC .2284 .0099 .016 0° .2440 .0196 .050 8° 1.27 BAS IC 0.635 BAS IC 5.80 0.25 0.40 0° 6.20 0.50 1.27 8° 6X e e1 A C 3X 1.27 [.050] y K x 45° y 0.10 [.004] 8X b 0.25 [.010] NOT ES: A1 CAB 8X L 7 8X c 1. DIMENS IONING & T OLERANCING PE R ASME Y14.5M-1994. 2. CONT ROLLING DIMENSION: MILLIMET ER 3. DIMENS IONS ARE SHOWN IN MILLIME TE RS [INCHES]. 4. OUT LINE CONF ORMS T O JEDEC OUTLINE MS-012AA. 5 DIMENSION DOES NOT INCLUDE MOLD PROT RUS IONS. MOLD PROTRUSIONS NOT T O E XCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROT RUS IONS. MOLD PROTRUSIONS NOT T O E XCEED 0.25 [.010]. 7 DIMENSION IS T HE LE NGTH OF LEAD FOR SOLDE RING TO A SUBS TRAT E. 8-Lead SOIC 6 01-6027 01-0021 11 (MS-012AA) www.irf.com IR2184(4) (S) 14-Lead PDIP 01-6010 01-3002 03 (MS-001AC) 14-Lead SOIC (narrow body) www.irf.com 01-6019 01-3063 00 (MS-012AB) 7 IR2184(4) (S) IN IN(LO) 50% 50% SD IN(HO) ton tr 90% toff 90% tf HO LO LO HO Figure 1. Input/Output Timing Diagram 10% 10% Figure 2. Switching Time Waveform Definitions SD 50% 50% 50% IN tsd HO LO 90% HO DT LO-HO 10% 90% Figure 3. Shutdown Waveform Definitions LO 90% DT HO-LO 10% IN (LO) 50% 50% MDT= DT LO-HO - DT HO-LO IN (HO) Figure 4. Deadtime Waveform Definitions LO HO 10% MT 90% MT LO HO Figure 5. Delay Matching Waveform Definitions IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 7/24/2001 8 www.irf.com