IRDC3840

IRDC3840 SupIRBuck DESCRIPTION TM USER GUIDE FOR IR3840 EVALUATION BOARD The IR3840 is a synchronous buck converter, providing a compact, high performance and flexible solution in a small 5mmx6mm Power QFN package. Key features offered by the IR3840 include programmable soft-start ramp, precision 0.7V reference voltage, Power Good, thermal protection, programmable switching frequency, Sequence input, Enable input, input under-voltage lockout for proper startup, and pre-bias start-up. An output over-current protection function is implemented by sensing the voltage developed across the on-resistance of the synchronous rectifier MOSFET for optimum cost and performance. This user guide contains the schematic and bill of materials for the IR3840 evaluation board. The guide describes operation and use of the evaluation board itself. Detailed application information for IR3840 is available in the IR3840 data sheet. BOARD FEATURES • Vin = +12V (13.2V Max) • Vcc=+5V (5.5V Max) • Vout = +1.8V @ 0- 12A • Fs=600kHz • L= 0.6uH • Cin= 4x10uF (ceramic 1206) + 330uF (electrolytic) • Cout= 6x22uF (ceramic 0805) 02/02/2009 1 IRDC3840 CONNECTIONS and OPERATING INSTRUCTIONS A well regulated +12V input supply should be connected to VIN+ and VIN-. A maximum 12A load should be connected to VOUT+ and VOUT-. The connection diagram is shown in Fig. 1 and inputs and outputs of the board are listed in Table I. IR3840 has two input supplies, one for biasing (Vcc) and the other as input voltage (Vin). Separate supplies should be applied to these inputs. Vcc input should be a well regulated 4.5V-5.5V supply and it would be connected to Vcc+ and Vcc-. If single 12V application is required connect R7 (zero Ohm resistor) which enables the on board bias regulator (see schematic). In this case there is no need of external Vcc supply. The output can track a sequencing input at the start-up. For sequencing application, R16 should be removed and the external sequencing source should be applied between Seq. and Agnd. The value of R14 and R28 can be selected to provide the desired ratio between the output voltage and the tracking input. For proper operation of IR3840, the voltage at Seq. pin should not exceed Vcc. Table I. Connections Connection VIN+ VINVcc+ VccVOUTVOUT+ Enable Seq. P_Good Signal Name Vin (+12V) Ground of Vin Vcc input Ground for Vcc input Ground of Vout Vout (+1.8V) Enable Sequence Input Power Good Signal LAYOUT The PCB is a 4-layer board. All of layers are 2 Oz. copper. The IR3840 SupIRBuck and all of the passive components are mounted on the top side of the board. Power supply decoupling capacitors, the Bootstrap capacitor and feedback components are located close to IR3840. The feedback resistors are connected to the output voltage at the point of regulation and are located close to the SupIRBuck. To improve efficiency, the circuit board is designed to minimize the length of the on-board power ground current path. 02/02/2009 2 IRDC3840 Connection Diagram Vin GND Enable GND Seq AGND Vo PGood SS Vcc GND Fig. 1: Connection diagram of IR384x evaluation boards 02/02/2009 3 IRDC3840 Fig. 2: Board layout, top overlay Fig. 3: Board layout, bottom overlay (rear view) 02/02/2009 4 IRDC3840 PGND Plane Single point connection between AGND and PGND. AGND Plane Fig. 4: Board layout, mid-layer I. Fig. 5: Board layout, mid-layer II. 02/02/2009 5 1 1 Boot Seq Vin 12 FB COMP AGnd Rt PGND PGnd 1 10 C30 N/S SS Vcc OCset 8 9 VCC 15 R12 3.32K L1 600nH C29 N/S C28 N/S C27 N/S En R1 1.87K Seq1 2 Agnd 3 4 1 C26 10000pF U1 14 13 1 PGood R9 23.7K 7 C10 0.1uF AGnd1 1 1 1 1 1 3.92K R3 2.49K A B 2 0 Optional +5V supply for Vcc Single point of connection between Power Ground and Signal ( “analog” ) Ground IRDC3840 Fig. 6: Schematic of the IR3840 evaluation board 1 02/02/2009 Vin 1 Enable R18 1 4.99K C7 0.1uF C6 N/S C5 10uF C4 10uF C3 10uF C25 N/S C2 + 10uF C1 330uF 1 Vin+ Vin+ R19 750 Vin1 C24 C11 220pF 0.1uF VinVout 1 Vout+ Vout+ Seq. VCC R14 N/S R16 0 R28 N/S IR3840 SW 11 1 5 SS 6 C20 22uF C19 22uF C18 C17 22uF 22uF C16 22uF C15 22uF C14 0.1uF Vout1 Vcc- Vcc+ Vout1 VCC R17 10K C13 0.1uF Vin R7 N/S C8 2200pF R2 R6 20 + C21 N/S C22 N/S C35 N/S + C36 N/S PGood R4 130 Q1 MMBT3904-TP R5 3.30K Vcc R* C32 0.1uF D1 MM3Z5V6B C34 10uF 6 IRDC3840 Bill of Materials Item Quantity Part Reference Value Description Manufacturer Part Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 1 1 4 6 1 1 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C1 C34 C3 C4 C5 C2 C7 C10 C13 C14 C24 C32 C8 C11 C15 C16 C17 C18 C19 C20 C26 D1 L1 Q1 R5 R18 R4 R6 R9 R16 R12 R17 R19 R1 R2 R3 U1 330uF 10uF 10uF 0.1uF 2200pF 220pF 22uF 10000pF MM3Z5V6B 0.6uH MMBT3904/SOT 3.3k 4.99k 130 20 23.7k 0 3.32k 10.0k 750 1.87k 3.92k 2.49k IR3840 SMD Elecrolytic, Fsize, 25V, 20% 0805, 10V, X5R, 20% 1206, 16V, X5R, 20% 0603, 25V, X7R, 10% 0603, 50V, NP0, 5% 0603, 50V, NP0, 5% 0805, 6.3V, X5R, 20% 0603, 50V, X7R, 10% MM3Z5V6B,Zener, 5.6V 11.5x10x4mm, 20%, 1.7mOhm NPN, 40V, 200mA, SOT-23 Thick Film, 0603,1/10W,1% Thick Film, 0603,1/10W,1% Thick Film, 0603,1/10W,1% Thick Film, 0603,1/10 W,1% Thick Film, 0603,1/10W,1% Thick Film, 0603,1/10 W,5% Thick Film, 0603,1/10 W,1% Thick Film, 0603,1/10W,1% Thick Film, 0603,1/10W,1% Thick Film, 0603,1/10W,1% Thick Film, 0603,1/10W,1% Thick Film, 0603,1/10W,1% PQFN, 6mmx5mm, 12A SupIRBuck Panasonic Panasonic - ECG Panasonic - ECG Panasonic - ECG Murata Panasonic- ECG Panasonic- ECG Panasonic - ECG Fairchild Delta Fairchild Rohm Rohm Panasonic - ECG Vishey/Dale Rohm Vishay/Dale Rohm Rohm Rohm Rohm Rohm Rohm International Rectifier EEV-FK1E331P ECJ-GVB1A106M ECJ-3YB1C106M ECJ-1VB1E104K GRM1885C1H222JA01D ECJ-1VC1H221J ECJ-2FB0J226M ECJ-1VB1H103K MM3Z5V6B MPL104-0R6IR MMBT3904/SOT MCR03EZPFX3301 MCR03EZPFX4991 ERJ-3EKF1300V CRCW060320R0FKEA MCR03EZPFX2372 CRCW06030000Z0EA MCR03EZPFX3321 MCR03EZPFX1002 MCR03EZPFX7500 MCR03EZPFX1871 MCR03EZPFX3921 MCR03EZPFX2491 IR3840MPbF 02/02/2009 7 IRDC3840 TYPICAL OPERATING WAVEFORMS Vin=12.0V, Vcc=5V, Vo=1.8V, Io=0-12A, Room Temperature, No Air Flow Fig. 7: Start up at 12A Load Ch1:Vo, Ch2:Vin, Ch3:Vss, Ch4:Enable Fig. 8: Start up at 12A Load, Ch1:Vo, Ch2:Vin, Ch3:Vss, Ch4:VPGood Fig. 9: Start up with 1.62V Pre Bias, 0A Load, Ch1:Vo, Ch3:VSS Fig. 10: Output Voltage Ripple, 12A load Ch1: Vout Fig. 11: Inductor node at 12A load Ch3:LX Fig. 12: Short (Hiccup) Recovery Ch1:Vout , Ch3:Vss 02/02/2009 8 IRDC3840 TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=1.8V, Io=0-12A, Room Temperature, No Air Flow Fig. 13: Transient Response, 6A to 12A step 2.5A/μs Ch1:Vout, Ch4:Iout 02/02/2009 9 IRDC3840 TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=1.8V, Io=12A, Room Temperature, No Air Flow Fig. 14: Bode Plot at 12A load shows a bandwidth of 109kHz and phase margin of 51 degrees 02/02/2009 10 IRDC3840 TYPICAL OPERATING WAVEFORMS Vin=12V, Vo=1.8V, Io=0- 12A, Room Temperature, No Air Flow 92.5 92.0 91.5 91.0 Efficiency (%) 90.5 90.0 89.5 89.0 88.5 88.0 10 20 30 40 50 60 70 80 90 100 Load Percentage (%) Fig.15: Efficiency versus load current 2.8 2.6 2.4 2.2 2.0 Power Loss (W) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 10 20 30 40 50 60 70 80 90 100 Load Percentage(%) Fig.16: Power loss versus load current 02/02/2009 11 IRDC3840 THERMAL IMAGES Vin=12V, Vo=1.8V, Io=12A, Room Temperature, No Air Flow Fig. 17: Thermal Image at 12A load Test points 1 and 2 are IR3840 and inductor, respectively. 02/02/2009 12 IRDC3840 Simultaneous Tracking at Power Up and Power Down Vin=12V, Vo=1.8V, Io=12A, Room Temperature, No Air Flow In order to run the IR3840 in the simultaneous tracking mode, following steps should be taken: - Remove R16 from the board. - Set the value of R14 and R28 as R2 (3.92K) and R3 (2.49K), respectively. - Connect the controlling input across SEQ and AGND test points on the board. This voltage should be at least 1.15 time greater than Vo. For the following test results a 0-3.3V source is applied to SEQ pin. - The controlling input should be applied after the SS pin is clamped to 3.0V. Fig. 18: Simultaneous Tracking a 3.3V input at power-up and shut-down Ch2: SEQ Ch3:Vo Ch4: SS (1.8V) 02/02/2009 13 IRDC3840 PCB Metal and Components Placement The lead lands (the 11 IC pins) width should be equal to the nominal part lead width. The minimum lead to lead spacing should be ≥ 0.2mm to minimize shorting. Lead land length should be equal to the maximum part lead length + 0.3 mm outboard extension. The outboard extension ensures a large and inspectable toe fillet. The pad lands (the 4 big pads other than the 11 IC pins) length and width should be equal to maximum part pad length and width. However, the minimum metal to metal spacing should be no less than 0.17mm for 2 oz. Copper; no less than 0.1mm for 1 oz. Copper and no less than 0.23mm for 3 oz. Copper. 02/02/2009 IRDC3840 Solder Resist It is recommended that the lead lands are Non Solder Mask Defined (NSMD). The solder resist should be pulled away from the metal lead lands by a minimum of 0.025mm to ensure NSMD pads. The land pad should be Solder Mask Defined (SMD), with a minimum overlap of the solder resist onto the copper of 0.05mm to accommodate solder resist mis-alignment. Ensure that the solder resist in between the lead lands and the pad land is ≥ 0.15mm due to the high aspect ratio of the solder resist strip separating the lead lands from the pad land. 02/02/2009 IRDC3840 Stencil Design • The Stencil apertures for the lead lands should be approximately 80% of the area of the lead lads. Reducing the amount of solder deposited will minimize the occurrences of lead shorts. If too much solder is deposited on the center pad the part will float and the lead lands will be open. The maximum length and width of the land pad stencil aperture should be equal to the solder resist opening minus an annular 0.2mm pull back to decrease the incidence of shorting the center land to the lead lands when the part is pushed into the solder paste. • 02/02/2009 IRDC3840 BOTTOM VIEW IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 This product has been designed and qualified for the Consumer market. Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 11/07 02/02/2009