IRF1302PBF

PD - 95499 AUTOMOTIVE MOSFET IRF1302PbF Benefits l l l l l l l HEXFET® Power MOSFET D Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free VDSS = 20V G S RDS(on) = 4.0mΩ ID = 180A† Description Specifically designed for Automotive applications, this Stripe Planar design of HEXFET® Power MOSFET utilizes the lastest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These benefits combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. TO-220AB Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy‚ Avalanche Current Repetitive Avalanche Energy‡ Peak Diode Recovery dv/dt ƒ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 180† 130† 700 230 1.5 ± 20 350 See Fig.12a, 12b, 15, 16 TBD -55 to + 175 300 (1.6mm from case ) Units A W W/°C V mJ A mJ V/ns °C Thermal Resistance Parameter RθJC RθCS RθJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient (PCB mount)ˆ Typ. ––– 0.50 ––– Max. 0.65 ––– 62 Units °C/W www.irf.com 1 06/29/04 IRF1302PbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance … Min. 20 ––– ––– 2.0 59 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.021 3.3 ––– ––– ––– ––– ––– ––– 79 18 31 28 130 47 16 4.5 7.5 3600 2370 520 5710 2370 3540 Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA 4.0 mΩ VGS = 10V, ID = 104A „ 4.0 V VDS = 10V, ID = 250µA ––– S VDS = 15V, ID = 104A 20 VDS = 20V, VGS = 0V µA 250 VDS = 16V, VGS = 0V, TJ = 150°C 200 VGS = 20V nA -200 VGS = -20V 120 ID = 104A 27 nC VDS = 16V 46 VGS = 10V„ ––– VDD = 11V ––– ID = 104A ns ––– RG = 4.5 Ω ––– VGS = 10V „ D Between lead, ––– 6mm (0.25in.) nH G from package ––– and center of die contact S ––– VGS = 0V ––– pF VDS = 25V ––– ƒ = 1.0MHz, See Fig. 5 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 16V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 16V Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 180† showing the A G integral reverse ––– ––– 700 S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 104A, VGS = 0V „ ––– 66 100 ns TJ = 25°C, IF = 104A ––– 130 200 nC di/dt = 100A/µs „ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2 www.irf.com IRF1302PbF 10000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 10000 ID, Drain-to-Source Current (A) 1000 ID, Drain-to-Source Current (A) 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 100 100 4.5V 10 10 4.5V 20µs PULSE WIDTH Tj = 25°C 20µs PULSE WIDTH Tj = 175°C 1 1 0.1 1 10 100 0.1 1 10 100 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000.00 2.0 I D = 174A ID, Drain-to-Source Current (Α ) T J = 175°C RDS(on) , Drain-to-Source On Resistance 1.5 100.00 (Normalized) 1.0 0.5 T J = 25°C VDS = 15V 10.00 4.0 5.0 20µs PULSE WIDTH 6.0 7.0 V GS = 10V 0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 VGS, Gate-to-Source Voltage (V) TJ , Junction Temperature ( ° C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRF1302PbF 100000 12 VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds VGS , Gate-to-Source Voltage (V) I D = 104A VDS = 16V 10 C, Capacitance(pF) 10000 7 Ciss Coss 1000 5 Crss 2 100 1 10 100 0 0 20 40 60 80 100 VDS, Drain-to-Source Voltage (V) QG, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 10000 OPERATION IN THIS AREA LIMITED BY R DS(on) 100 TJ = 175 ° C ID , Drain-to-Source Current (A) 1000 I SD , Reverse Drain Current (A) 10 100 100µsec 1msec TJ = 25 ° C 1 10 Tc = 25°C Tj = 175°C Single Pulse 1 1 10 10msec V GS = 0 V 0.1 0.2 0.7 1.2 1.7 2.2 V SD ,Source-to-Drain Voltage (V) 100 VDS , Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF1302PbF 200 LIMITED BY PACKAGE VDS VGS RD 150 RG 10V D.U.T. + -VDD I D , Drain Current (A) 100 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 10a. Switching Time Test Circuit 50 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature (°C) 10% VGS td(on) tr t d(off) tf Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms 1 (Z thJC ) D = 0.50 0.20 Thermal Response 0.1 0.10 P DM 0.05 SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = 2. Peak T 0.01 0.00001 0.0001 0.001 0.01 t1 / t 2 +T C 1 0.02 0.01 J = P DM x Z thJC 0.1 t1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF1302PbF 700 15V TOP ID 43A 74A 104A RG 20V D.U.T IAS tp EAS , Single Pulse Avalanche Energy (mJ) VDS L DRIVER 560 BOTTOM + V - DD 420 A 0.01Ω 280 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp 140 0 25 50 75 100 125 150 175 Starting Tj, Junction Temperature ( ° C) I AS Fig 12b. Unclamped Inductive Waveforms QG Fig 12c. Maximum Avalanche Energy Vs. Drain Current 10 V QGS VG QGD VGS(th) Gate threshold Voltage (V) 4.0 3.0 Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. ID = 250µA 2.0 50KΩ 12V .2µF .3µF D.U.T. VGS 3mA + V - DS 1.0 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage Vs. Temperature 6 www.irf.com IRF1302PbF 1000 Duty Cycle = Single Pulse 0.01 Avalanche Current (A) 100 0.05 0.10 10 Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses 1 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth 410 360 EAR , Avalanche Energy (mJ) TOP Single Pulse BOTTOM 10% Duty Cycle ID = 104A 310 260 210 160 110 60 10 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). t av = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 16. Maximum Avalanche Energy Vs. Temperature www.irf.com 7 IRF1302PbF Peak Diode Recovery dv/dt Test Circuit D.U.T* + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG V GS • dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test + V DD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt [VDD] Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% [ISD] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 17. For N-channel HEXFET® power MOSFETs 8 www.irf.com IRF1302PbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) 2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048) 4 15.24 (.600) 14.84 (.584) LEAD ASSIGNMENTS 1.15 (.045) MIN 1 23 HEXFET LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 14.09 (.555) 13.47 (.530) 21- GATE DRAIN 1- GATE 32- DRAINSOURCE 2- COLLECTOR 3- SOURCE 4 - DRAIN 3- EMITTER 4- DRAIN 4- COLLECTOR 4.06 (.160) 3.55 (.140) 3X 3X 1.40 (.055) 1.15 (.045) 0.93 (.037) 0.69 (.027) MBAM 3X 0.55 (.022) 0.46 (.018) 0.36 (.014) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 2.92 (.115) 2.64 (.104) 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information E XAMPL E : T HIS IS AN IRF 1010 LOT CODE 1789 AS S E MB LE D ON WW 19, 1997 IN T HE AS S E MB L Y L INE "C" INT E RNAT IONAL RE CT IF IE R L OGO AS S E MBL Y LOT CODE PART NU MBE R Note: "P" in assembly line position indicates "Lead-Free" DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C Notes:  Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). ‚ Starting TJ = 25°C, L = 0.063mH R G = 25Ω, IAS = 104A. (See Figure 12). ƒ ISD ≤ 104A, di/dt ≤ 100A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. „ Pulse width ≤ 400µs; duty cycle ≤ 2%. … Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . † Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A. ‡ Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. ˆ This is applied to D2Pak, when mounted on 1" square PCB ( FR4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. TO-220 package is not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.06/04 www.irf.com 9 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/