IRF1312

PD- 94504 HEXFET® Power MOSFET Applications l High frequency DC-DC converters l Motor Control l Uninterrutible Power Supplies Benefits l Low Gate-to-Drain Charge to Reduce Switching Losses l Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) l Fully Characterized Avalanche Voltage and Current Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TA = 25°C PD @TC = 25°C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Power Dissipation ˆ Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt ƒ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw IRF1312 IRF1312S IRF1312L ID 95A† VDSS 80V RDS(on) max 10mΩ TO-220AB IRF1312 D2Pak IRF1312S TO-262 IRF1312L Max. 95† 67† 380 3.8 210 1.4 ± 20 5.1 -55 to + 175 300 (1.6mm from case ) 10 lbf•in (1.1N•m) Units A W W/°C V V/ns °C Thermal Resistance Parameter RθJC RθCS RθJA RθJA Notes  through ˆ Junction-to-Case Case-to-Sink, Flat, Greased Surface ‡ Junction-to-Ambient‡ Junction-to-Ambient (PCB mount)ˆ are on page 11 Typ. ––– 0.50 ––– ––– Max. 0.73 ––– 62 40 Units °C/W www.irf.com 1 7/01/02 IRF1312/S/L Static @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 80 ––– ––– 3.5 ––– ––– ––– ––– Typ. ––– 0.078 6.6 ––– ––– ––– ––– ––– Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA 10 mΩ VGS = 10V, ID = 57A „ 5.5 V VDS = VGS, ID = 250µA 1.0 VDS = 76V, VGS = 0V µA 250 VDS = 64V, VGS = 0V, TJ = 150°C 100 VGS = 20V nA -100 VGS = -20V Dynamic @ TJ = 25°C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 92 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 93 36 34 25 130 47 51 5450 550 340 1910 380 620 Max. Units Conditions ––– S VDS = 25V, ID = 57A 140 ID = 57A ––– nC VDS = 40V ––– VGS = 10V, „ ––– VDD = 40V ––– ID = 57A ns ––– RG = 4.5Ω ––– VGS = 10V „ ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 64V, ƒ = 1.0MHz ––– VGS = 0V, V DS = 0V to 64V … Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy‚† Avalanche Current  Repetitive Avalanche Energy Typ. ––– ––– ––– Max. 250 57 21 Units mJ A mJ Diode Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) † Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 95† showing the A G integral reverse ––– ––– 380 S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 57A, VGS = 0V „ ––– 64 96 ns TJ = 25°C, IF = 57A ––– 150 230 nC di/dt = 100A/µs „ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2 www.irf.com IRF1312/S/L 1000 VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP 1000 100 ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 100 VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP 10 1 10 0.1 5.0V 20µs PULSE WIDTH Tj = 25°C 1 0.1 1 10 100 5.0V 0.01 0.1 1 20µs PULSE WIDTH Tj = 25°C 10 100 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000.00 2.5 ID, Drain-to-Source Current (A) 100.00 T J = 175°C RDS(on) , Drain-to-Source On Resistance ID = 95A VGS = 10V 2.0 T J = 25°C 1.00 (Normalized) 10.00 1.5 0.10 1.0 0.01 5 6 7 VDS = 25V 20µs PULSE WIDTH 8 9 10 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 VGS , Gate-to-Source Voltage (V) T J , Junction Temperature (°C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRF1312/S/L 100000 20 VGS , Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ C iss = C gs + Cgd , SHORTED Crss = Cgd Coss = Cds + Cgd ID= 57A C ds 16 VDS= 64V VDS= 40V VDS= 16V C, Capacitance (pF) 10000 12 Ciss 8 1000 Coss Crss 4 FOR TEST CIRCUIT SEE FIGURE 13 0 100 1 10 100 0 40 80 120 160 200 VDS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000.0 10000 OPERATION IN THIS AREA LIMITED BY RDS(on) ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 100.0 T J = 175°C 100 100µsec 10 1msec 1 Tc = 25°C Tj = 175°C Single Pulse 1 10 10.0 1.0 T J = 25°C 10msec 0.1 0.2 0.4 0.6 0.8 1.0 1.2 VGS = 0V 1.4 1.6 1.8 0.1 100 1000 VDS , Drain-toSource Voltage (V) VSD, Source-toDrain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF1312/S/L 100 LIMITED BY PACKAGE 80 ID , Drain Current (A) VDS VGS RG RD D.U.T. + -VDD 60 V GS 40 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 20 Fig 10a. Switching Time Test Circuit VDS 90% 0 25 50 75 100 125 150 175 T C , Case Temperature (°C) Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 1 (Z thJC ) D = 0.50 0.20 Thermal Response 0.1 0.10 P DM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = 2. Peak T t1/ t 2 +T C 0.1 0.05 0.02 0.01 J = P DM x Z thJC 0.01 0.00001 0.0001 0.001 0.01 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF1312/S/L 15V 500 ID TOP 23A 40A 57A RG VGS 20V D.U.T IAS tp + V - DD EAS , Single Pulse Avalanche Energy (mJ) VDS L DRIVER 400 BOTTOM 300 A 0.01Ω 200 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp 100 0 25 50 75 100 125 150 175 Starting TJ, Junction Temperature (°C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF VGS QGS VG QGD VGS 3mA D.U.T. + V - DS IG ID Charge Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 6 www.irf.com IRF1312/S/L Peak Diode Recovery dv/dt Test Circuit D.U.T* + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG VGS • dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test + VDD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt [VDD] Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% [ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET® power MOSFETs www.irf.com 7 IRF1312/S/L TO-220AB Package Outline Dimensions are shown in millimeters (inches) 2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048) 4 15.24 (.600) 14.84 (.584) 1.15 (.045) MIN 1 2 3 LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN 14.09 (.555) 13.47 (.530) 4.06 (.160) 3.55 (.140) 3X 3X 1.40 (.055) 1.15 (.045) 0.93 (.037) 0.69 (.027) M BAM 3X 0.55 (.022) 0.46 (.018) 0.36 (.014) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 2.92 (.115) 2.64 (.104) 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information EXAMPLE: T HIS IS AN IRF1010 L OT CODE 1789 ASS EMBLED ON WW 19, 1997 IN THE AS S EMBLY LINE "C" INTERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C 8 www.irf.com IRF1312/S/L D2Pak Package Outline D2Pak Part Marking Information THIS IS AN IRF530S WITH LOT CODE 8024 AS S EMBLED ON WW 02, 2000 IN T HE AS SEMBLY LINE "L" INTERNATIONAL RECTIFIER LOGO AS S EMBLY LOT CODE PART NUMBER F530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L www.irf.com 9 IRF1312/S/L TO-262 Package Outline IGBT 1- GATE 2- COLLECTOR 3- EMITTER 4- COLLECTOR TO-262 Part Marking Information EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 ASS EMBLED ON WW 19, 1997 IN THE ASS EMBLY LINE "C" INT ERNATIONAL RECTIFIER LOGO AS SEMBLY LOT CODE PART NUMBE R DATE CODE YEAR 7 = 1997 WEEK 19 LINE C 10 www.irf.com IRF1312/S/L D2Pak Tape & Reel Information TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION 1.85 (.073) 1.65 (.065) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 30.40 (1.197) MAX. 26.40 (1.039) 24.40 (.961) 3 4 Notes:  Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) „ Pulse width ≤ 400µs; duty cycle ≤ 2%. … Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS ‚ Starting TJ = 25°C, L = 0.15mH R G = 25Ω, IAS = 57A. (See Figure 12) T J ≤ 175°C ƒ ISD ≤ 57A, di/dt ≤ 410A/µs, VDD ≤ V(BR)DSS, †Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A. ‡ This is only applied to TO-220AB package ˆ This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. TO-220AB package is not recommended for Surface Mount Application Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.7/02 www.irf.com 11