IRF1404S

AUTOMOTIVE MOSFET PD - 96040 Features l l l l l l IRF1404ZPbF IRF1404ZSPbF IRF1404ZLPbF HEXFET® Power MOSFET D Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free G VDSS = 40V RDS(on) = 3.7mΩ S Description Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low onresistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. ID = 75A TO-220AB IRF1404ZPbF D2Pak TO-262 IRF1404ZSPbF IRF1404ZLPbF Absolute Maximum Ratings Parameter ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100°C Continuous Drain Current, VGS @ 10V ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current IDM Max. 180 120 75 710 200 Units A ™ PD @TC = 25°C Power Dissipation Linear Derating Factor VGS Gate-to-Source Voltage EAS (Thermally limited) Single Pulse Avalanche Energy Single Pulse Avalanche Energy Tested Value EAS (Tested ) W W/°C V mJ A mJ d 1.3 ± 20 IAR EAR TJ TSTG Avalanche Current Ù h 330 480 See Fig.12a, 12b, 15, 16 -55 to + 175 Repetitive Avalanche Energy Operating Junction and Storage Temperature Range g i °C 300 (1.6mm from case ) 10 lbf in (1.1N m) Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw Thermal Resistance Parameter RθJC RθCS RθJA RθJA J unction-to-Case Case-to-Sink, Flat Greased Surface J unction-to-Ambient y y Typ. Max. 0.75 ––– 62 40 i i ––– 0.50 ––– ––– k Units °C/W J unction-to-Ambient (PCB Mount) j www.irf.com 1 01/03/06 IRF1404Z/S/LPbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Parameter V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. Typ. Max. Units 40 ––– ––– 2.0 170 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 0.033 2.7 ––– ––– ––– ––– ––– ––– 100 31 42 18 110 36 58 4.5 7.5 4340 1030 550 3300 920 1350 ––– ––– 3.7 4.0 ––– 20 250 200 -200 150 ––– ––– ––– ––– ––– ––– ––– nH ––– ––– ––– ––– ––– ––– ––– pF ns nC nA V Conditions VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 75A e V V µA VDS = VGS, ID = 250µA VDS = 25V, ID = 75A VDS = 40V, VGS = 0V VDS = 40V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V ID = 75A VDS = 32V VGS = 10V VDD = 20V ID = 75A RG = 3.0 Ω VGS = 10V e e Between lead, 6mm (0.25in.) from package and center of die contact VGS = 0V VDS = 25V ƒ = 1.0MHz VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz VGS = 0V, VDS = 32V, ƒ = 1.0MHz VGS = 0V, VDS = 0V to 32V f Source-Drain Ratings and Characteristics Parameter IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units ––– ––– ––– ––– ––– ––– ––– ––– 28 34 75 A 750 1.3 42 51 V ns nC Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25°C, IS = 75A, VGS = 0V TJ = 25°C, IF = 75A, VDD = 20V di/dt = 100A/µs Ù e e Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2 www.irf.com IRF1404Z/S/LPbF 1000 TOP VGS 1000 TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V ID, Drain-to-Source Current (A) 100 10 ID, Drain-to-Source Current (A) 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 100 1 4.5V 20µs PULSE WIDTH Tj = 25°C 4.5V 10 20µs PULSE WIDTH Tj = 175°C 10 100 0.1 0.1 1 10 100 0.1 1 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 200 T J = 175°C 100 Gfs, Forward Transconductance (S) ID, Drain-to-Source Current ( A) T J = 25°C T J = 175°C 160 120 T J = 25°C 80 10 40 VDS = 15V 20µs PULSE WIDTH 0 0 40 80 120 160 VDS = 15V 20µs PULSE WIDTH 1 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 VGS , Gate-to-Source Voltage (V) ID, Drain-to-Source Current (A) Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance Vs. Drain Current www.irf.com 3 IRF1404Z/S/LPbF 8000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd Coss = Cds + Cgd 20 VGS, Gate-to-Source Voltage (V) ID= 75A VDS= 32V VDS= 20V 16 6000 C, Capacitance (pF) Ciss 4000 12 8 2000 Coss Crss 4 0 1 10 100 0 0 40 80 120 160 Q G Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000.0 10000 OPERATION IN THIS AREA LIMITED BY R DS(on) ISD, Reverse Drain Current (A) 100.0 T J = 175°C ID, Drain-to-Source Current (A) 1000 10.0 T J = 25°C 1.0 100 100µsec 10 Tc = 25°C Tj = 175°C Single Pulse 0 1 10 1msec 0.1 0.2 0.6 1.0 VGS = 0V 1.4 1.8 1 10msec 100 1000 VSD, Source-toDrain Voltage (V) VDS , Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF1404Z/S/LPbF 200 LIMITED BY PACKAGE 160 ID , Drain Current (A) RDS(on) , Drain-to-Source On Resistance 2.0 ID = 75A VGS = 10V 1.5 80 (Normalized) 120 1.0 40 0 25 50 75 100 125 150 175 T C , Case Temperature (°C) 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 T J , Junction Temperature (°C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10. Normalized On-Resistance Vs. Temperature 1 D = 0.50 Thermal Response ( Z thJC ) 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 0.01 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.001 0.01 0.1 0.001 1E-006 1E-005 0.0001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF1404Z/S/LPbF 600 EAS, Single Pulse Avalanche Energy (mJ) 15V TOP 500 VDS L DRIVER BOTTOM ID 31A 53A 75A 400 RG 20V VGS D.U.T IAS tp + V - DD A 300 0.01Ω 200 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp 100 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) I AS Fig 12b. Unclamped Inductive Waveforms QG Fig 12c. Maximum Avalanche Energy Vs. Drain Current 10 V QGS VG QGD VGS(th) Gate threshold Voltage (V) 4.0 ID = 250µA 3.0 Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 2.0 50KΩ 12V .2µF .3µF D.U.T. VGS 3mA + V - DS 1.0 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage Vs. Temperature 6 www.irf.com IRF1404Z/S/LPbF 10000 Avalanche Current (A) 1000 Duty Cycle = Single Pulse 100 0.01 Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax 0.05 10 0.10 1 1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth 400 EAR , Avalanche Energy (mJ) TOP Single Pulse BOTTOM 10% Duty Cycle ID = 75A 300 200 100 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav ·f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 16. Maximum Avalanche Energy Vs. Temperature www.irf.com 7 IRF1404Z/S/LPbF Driver Gate Drive D.U.T + P.W. Period D= P.W. Period VGS=10V ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt ‚ - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD VDD + - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs RD V DS VGS RG 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % D.U.T. + -VDD Fig 18a. Switching Time Test Circuit VDS 90% 10% VGS td(on) tr t d(off) tf Fig 18b. Switching Time Waveforms 8 www.irf.com IRF1404Z/S/LPbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information E XAMPL E : T HIS IS AN IR F 1010 L OT CODE 1789 AS S E MB LE D ON WW 19, 2000 IN T HE AS S E MB LY LINE "C" Note: "P" in as s embly line pos ition indicates "L ead - F ree" INT E R NAT IONAL R E CT IF IE R LOGO AS S E MB LY LOT CODE PAR T NU MB E R DAT E CODE YE AR 0 = 2000 WE E K 19 LINE C www.irf.com 9 IRF1404Z/S/LPbF D2Pak Package Outline (Dimensions are shown in millimeters (inches)) D2Pak Part Marking Information THIS IS AN IRF 530S WITH LOT CODE 8024 ASS EMBLED ON WW 02, 2000 IN THE ASSEMBLY LINE "L" INT ERNATIONAL RECTIFIER LOGO ASS EMBLY LOT CODE PART NUMBER F 530S DATE CODE YEAR 0 = 2000 WEEK 02 LINE L OR INTERNAT IONAL RECT IFIER LOGO AS SEMBLY LOT CODE PART NUMBER F530S DATE CODE P = DESIGNAT ES LEAD - FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = AS SEMBLY SITE CODE 10 www.irf.com IRF1404Z/S/LPbF TO-262 Package Outline ( Dimensions are shown in millimeters (inches)) TO-262 Part Marking Information E XAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS S E MBLED ON WW 19, 1997 IN THE AS S EMBLY LINE "C" INTERNATIONAL RE CTIFIER LOGO AS S EMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WE EK 19 LINE C OR INTERNATIONAL RE CT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DATE CODE P = DES IGNATES LEAD-FRE E PRODUCT (OPTIONAL) YEAR 7 = 1997 WE EK 19 A = AS S EMBLY S IT E CODE www.irf.com 11 IRF1404Z/S/LPbF D2Pak Tape & Reel Information TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION 1.85 (.073) 1.65 (.065) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 … Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive max. junction temperature. (See fig. 11). avalanche performance. ‚ Limited by TJmax, starting TJ = 25°C, L = 0.11mH † This value determined from sample failure population. 100% R G = 25Ω, IAS = 75A, VGS =10V. Part not tested to this value in production. recommended for use above this value. ‡ This is only applied to TO-220AB pakcage. ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%. ˆ This is applied to D2Pak, when mounted on 1" square PCB (FR„ Coss eff. is a fixed capacitance that gives the 4 or G-10 Material). For recommended footprint and soldering same charging time as Coss while VDS is rising techniques refer to application note #AN-994. from 0 to 80% VDSS . ‰ TO-220 device will have an Rth value of 0.65°C/W.  Repetitive rating; pulse width limited by TO-220AB package is not recommended for Surface Mount Application. Notes: Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101]market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.01/06 12 www.irf.com