IRF1405

PD -93991A AUTOMOTIVE MOSFET Typical Applications q q q q q IRF1405 HEXFET® Power MOSFET D Electric Power Steering (EPS) Anti-lock Braking System (ABS) Wiper Control Climate Control Power Door Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax G VDSS = 55V RDS(on) = 5.3mΩ S Benefits q q q q q q ID = 169A† Description Specifically designed for Automotive applications, this Stripe Planar design of HEXFET® Power MOSFETs utilizes the lastest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this HEXFET power MOSFET are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These benefits combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. TO-220AB Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy‚ Avalanche Current Repetitive Avalanche Energy‡ Peak Diode Recovery dv/dt ƒ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw Max. 169† 118† 680 330 2.2 ± 20 560 See Fig.12a, 12b, 15, 16 5.0 -55 to + 175 300 (1.6mm from case ) 10 lbf•in (1.1N•m) Units A W W/°C V mJ A mJ V/ns °C Thermal Resistance Parameter RθJC RθCS RθJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Typ. ––– 0.50 ––– Max. 0.45 ––– 62 Units °C/W www.irf.com 1 3/25/01 IRF1405 Electrical Characteristics @ TJ = 25°C (unless otherwise specified) V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance … Min. 55 ––– ––– 2.0 69 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.057 4.6 ––– ––– ––– ––– ––– ––– 170 44 62 13 190 130 110 4.5 7.5 5480 1210 280 5210 900 1500 Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA 5.3 mΩ VGS = 10V, ID = 101A „ 4.0 V VDS = 10V, ID = 250µA ––– S VDS = 25V, ID = 110A 20 VDS = 55V, VGS = 0V µA 250 VDS = 44V, VGS = 0V, TJ = 150°C 200 VGS = 20V nA -200 VGS = -20V 260 ID = 101A 66 nC VDS = 44V 93 VGS = 10V„ ––– VDD = 38V ––– ID = 110A ns ––– RG = 1.1Ω ––– VGS = 10V „ D Between lead, ––– 6mm (0.25in.) nH G from package ––– and center of die contact S ––– VGS = 0V ––– pF VDS = 25V ––– ƒ = 1.0MHz, See Fig. 5 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 44V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 44V Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Notes: Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 169† showing the A G integral reverse ––– ––– 680 S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 101A, VGS = 0V „ ––– 88 130 ns TJ = 25°C, IF = 101A ––– 250 380 nC di/dt = 100A/µs „ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). ‚ Starting TJ = 25°C, L = 0.11mH RG = 25Ω, IAS = 101A. (See Figure 12). ƒ ISD ≤ 101A, di/dt ≤ 210A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C „ Pulse width ≤ 400µs; duty cycle ≤ 2%. … Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A. ‡ Limited by T Jmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. † 2 www.irf.com IRF1405 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 1000 I D , Drain-to-Source Current (A) 100 10 I D , Drain-to-Source Current (A) VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 100 4.5V 20µs PULSE WIDTH TJ = 25 °C 1 10 100 4.5V 20µs PULSE WIDTH TJ = 175 °C 1 10 100 1 0.1 10 0.1 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 3.0 TJ = 175 ° C RDS(on) , Drain-to-Source On Resistance (Normalized) TJ = 25 ° C ID = 169A I D , Drain-to-Source Current (A) 2.5 100 2.0 1.5 10 1.0 0.5 1 4 6 8 V DS = 25V 20µs PULSE WIDTH 10 12 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 180 VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( °C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRF1405 100000 20 VGS = 0V, f = 1 MHZ Ciss = C + C , C gs gd ds SHORTED Crss = C gd Coss = C + C ds gd ID = 101A VDS = 44V VDS = 27V VGS , Gate-to-Source Voltage (V) 16 C, Capacitance(pF) 10000 Ciss 12 Coss 1000 8 Crss 4 100 1 10 100 0 0 60 120 FOR TEST CIRCUIT SEE FIGURE 13 180 240 300 VDS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 10000 OPERATION IN THIS AREA LIMITED BY RDS(on) ISD , Reverse Drain Current (A) TJ = 175 ° C 100 I D , Drain Current (A) 1000 10us 100 100us 1ms TJ = 25 ° C 10 10 10ms 1 0.0 V GS = 0 V 0.5 1.0 1.5 2.0 2.5 3.0 1 1 TC = 25 ° C TJ = 175 ° C Single Pulse 10 100 VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF1405 200 LIMITED BY PACKAGE 160 VDS VGS RG RD D.U.T. + I D , Drain Current (A) -VDD 120 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 80 Fig 10a. Switching Time Test Circuit 40 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( ° C) 10% VGS td(on) tr t d(off) tf Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms 1 Thermal Response (Z thJC ) D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 0.1 0.01 0.001 0.00001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF1405 1 5V 1200 EAS , Single Pulse Avalanche Energy (mJ) 1000 VDS L D R IV E R ID 41A 71A BOTTOM 101A TOP 800 RG 20V tp D .U .T IA S + - VD D A 600 0 .0 1 Ω Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp 400 200 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature ( °C) IAS Fig 12b. Unclamped Inductive Waveforms QG Fig 12c. Maximum Avalanche Energy Vs. Drain Current 10 V QGS VG VGS(th) , Variace ( V ) QGD 4.0 3.5 Charge 3.0 ID = 250µA Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 2.5 50KΩ 12V .2µF .3µF 2.0 + V - DS D.U.T. VGS 3mA 1.5 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage Vs. Temperature 6 www.irf.com IRF1405 1000 Duty Cycle = Single Pulse Avalanche Current (A) 100 0.01 Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses 0.05 0.10 10 1 1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth 600 EAR , Avalanche Energy (mJ) 500 TOP Single Pulse BOTTOM 10% Duty Cycle ID = 101A 400 300 200 100 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav ·f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = ∆T/ ZthJC Iav = 2∆T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·t av Fig 16. Maximum Avalanche Energy Vs. Temperature www.irf.com 7 IRF1405 Peak Diode Recovery dv/dt Test Circuit D.U.T* + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG VGS • dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test + VDD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt [VDD] Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% [ ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 17. For N-channel HEXFET® power MOSFETs 8 www.irf.com IRF1405 Package Outline TO-220AB Dimensions are shown in millimeters (inches) 2.87 (.11 3) 2.62 (.10 3) 10 .5 4 (.415 ) 10 .2 9 (.405 ) 3.7 8 ( .14 9 ) 3.5 4 ( .13 9 ) -A 6 .4 7 (.2 55 ) 6 .1 0 (.2 40 ) -B4 .6 9 (.1 85 ) 4 .2 0 (.1 65 ) 1.32 (.05 2) 1.22 (.04 8) 4 1 5.24 (.60 0) 1 4.84 (.58 4) 1 .1 5 (.0 4 5) M IN 1 2 3 L E A D A S S IG NM E NT S 1 - GATE 2 - D R A IN 3 - S O U RC E 4 - D R A IN 1 4.09 (.55 5) 1 3.47 (.53 0) 4 .0 6 (.160 ) 3 .5 5 (.140 ) 3X 3X 1 .4 0 (.0 55 ) 1 .1 5 (.0 45 ) 0 .9 3 (.0 37 ) 0 .6 9 (.0 27 ) M BAM 3X 0.55 (.02 2) 0.46 (.01 8) 0.36 (.0 14 ) 2.54 (.10 0) 2X N O TE S : 1 D IM E N S IO N IN G & TO L E R A N C IN G P E R A N S I Y 14 .5 M , 1 982 . 2 C O N TR O L LIN G D IM E N S IO N : INC H 2.92 (.11 5) 2.64 (.10 4) 3 O U TL IN E C O N F O R MS TO J E D E C O U T L IN E TO -2 20 A B . 4 H E A T S IN K & LE A D M E A S U R E M E N T S D O N O T IN C LU DE B U R R S . Part Marking Information TO-220AB E X A M P L E : TH IS IS A N IR F1 0 1 0 W IT H A S S E M B L Y LOT C ODE 9B1M A IN TE R N A TIO N A L R E C TIF IE R LOGO ASSEMBLY LOT CO DE PART NU MBER IR F 10 1 0 9246 9B 1M D A TE C O D E (Y Y W W ) YY = YEAR W W = W EEK Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 3/01 www.irf.com 9