PD - 94428
AUTOMOTIVE MOSFET
Typical Applications
l
IRF2805
HEXFET® Power MOSFET
D
Climate Control, ABS, Electronic Braking, Windshield Wipers Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
G
VDSS = 55V RDS(on) = 4.7mΩ
S
Features
l l l l l
ID = 75A
Description
Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC ID @ TC ID @ TC IDM PD @TC = 25°C = 100°C = 25°C = 25°C Continuous Drain Current, VGS @ 10V (Silicon limited) Continuous Drain Current, VGS @ 10V (See Fig.9) Continuous Drain Current, VGS @ 10V (Package limited) Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Single Pulse Avalanche Energy Tested Value Avalanche Current Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
Max.
175 120 75 700 330 2.2 ± 20 450 1220 See Fig.12a, 12b, 15, 16 -55 to + 175
Units
A
VGS EAS EAS (6 sigma) IAR EAR TJ TSTG
W W/°C V mJ A mJ °C
300 (1.6mm from case ) 1.1 (10)
N•m (lbf•in)
Thermal Resistance
Parameter
RθJC RθCS RθJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
––– 0.50 –––
Max.
0.45 ––– 62
Units
°C/W
HEXFET(R) is a registered trademark of International Rectifier.
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8/8/02
IRF2805
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance V(BR)DSS IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. 55 ––– ––– 2.0 91 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.06 3.9 ––– ––– ––– ––– ––– ––– 150 38 52 14 120 68 110 4.5 7.5 5110 1190 210 6470 860 1600 Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA 4.7 mΩ VGS = 10V, ID = 104A 4.0 V VDS = 10V, ID = 250µA ––– S VDS = 25V, ID = 104A 20 VDS = 55V, VGS = 0V µA 250 VDS = 55V, VGS = 0V, TJ = 125°C 200 VGS = 20V nA -200 VGS = -20V 230 ID = 104A 57 nC VDS = 44V 78 VGS = 10V ––– VDD = 28V ––– ID = 104A ns ––– RG = 2.5Ω ––– VGS = 10V D Between lead, ––– 6mm (0.25in.) nH G from package ––– and center of die contact S ––– VGS = 0V ––– pF VDS = 25V ––– ƒ = 1.0MHz, See Fig. 5 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 44V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 44V
Source-Drain Ratings and Characteristics
IS
I SM
VSD t rr Q rr ton Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Starting TJ = 25°C, L = 0.08mH RG = 25Ω, IAS = 104A. (See Figure 12). ISD ≤ 104A, di/dt ≤ 240A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C Pulse width ≤ 400µs; duty cycle ≤ 2%.
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol ––– ––– 175 showing the A G integral reverse ––– ––– 700 S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 104A, VGS = 0V ––– 80 120 ns TJ = 25°C, IF = 104A ––– 290 430 nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS . Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population. 100% tested to this value in production.
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IRF2805
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
ID, Drain-to-Source Current (A)
100
4.5V
ID, Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
4.5V
10
20µs PULSE WIDTH Tj = 25°C
1 0.1 1 10 100 10 0.1 1
20µs PULSE WIDTH Tj = 175°C
10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
200
T J = 25°C
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current (A)
T J = 175°C
160
T J = 175°C
120 T J = 25°C 80
100
40 VDS = 25V 20µs PULSE WIDTH 0 0 40 80 120 160 200
10 4.0 5.0 6.0
VDS = 25V 20µs PULSE WIDTH
7.0 8.0 9.0 10.0
VGS , Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance Vs. Drain Current
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IRF2805
10000 VGS = 0V, f = 1 MHZ C iss = C gs + C gd , C ds SHORTED Crss Coss = Cgd = C + Cgd ds
20 ID= 104A
VGS , Gate-to-Source Voltage (V)
VDS= 44V VDS= 28V
8000
16
C, Capacitance (pF)
6000
12
Ciss
4000
8
2000
4
Coss
0 1 10
Crss
100
0 0 40 80 120 160 200 240 Q G Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000.0
10000 OPERATION IN THIS AREA LIMITED BY RDS(on)
ISD, Reverse Drain Current (A)
T J = 175°C 100.0
ID, Drain-to-Source Current (A)
1000
10.0
100
100µsec 1msec
1.0
TJ = 25°C
10 Tc = 25°C Tj = 175°C Single Pulse 1 10 10msec
0.1 0.2 0.4 0.6 0.8 1.0 1.2
VGS = 0V 1.4 1.6 1.8
1
100
1000
VSD, Source-toDrain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRF2805
180
3.0
I D = 175A
LIMITED BY PACKAGE
150
2.5
RDS(on) , Drain-to-Source On Resistance
120
2.0
ID , Drain Current (A)
(Normalized)
90
1.5
60
1.0
30
0.5
V GS = 10V
0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
0 25 50 75 100 125 150 175
TC , Case Temperature ( °C)
TJ , Junction Temperature
( ° C)
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10. Normalized On-Resistance Vs. Temperature
1
(Z thJC )
D = 0.50
0.1
0.20 0.10
Thermal Response
0.05 0.02 0.01 0.01 SINGLE PULSE (THERMAL RESPONSE)
P DM t1 t2 Notes: 1. Duty factor D = 2. Peak T t1/ t
2
J = P DM x Z thJC
+T C 0.1
0.001 0.00001
0.0001
0.001
0.01
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRF2805
1000
15V
TOP
L
ID 43A 87A 104A
RG
20V VGS
D.U.T
IAS tp
+ V - DD
EAS , Single Pulse Avalanche Energy (mJ)
VDS
DRIVER
800
BOTTOM
600
A
0.01Ω
400
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
200
0 25 50 75 100 125 150 175
Starting Tj, Junction Temperature
( ° C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS VG QGD
VGS(th) Gate threshold Voltage (V)
4.0
ID = 250µA
3.0
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
2.0
50KΩ 12V .2µF .3µF
D.U.T. VGS
3mA
+ V - DS
1.0 -75 -50 -25 0 25 50 75 100 125 150 175
T J , Temperature ( °C )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage Vs. Temperature
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IRF2805
10000
Duty Cycle = Single Pulse
Avalanche Current (A)
1000
100
0.01 0.05 0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses. Note: In no c ase should Tj be allowed to exceed Tjmax
10
1 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
500
EAR , Avalanche Energy (mJ)
400
T OP Single Pulse BOTT OM 10% Duty Cycle ID = 104A
300
200
100
0 25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav ·f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·t av
Fig 16. Maximum Avalanche Energy Vs. Temperature
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IRF2805
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
+
RG
• dv/dt controlled by RG • Driver same type as D.U.T. • I SD controlled by Duty Factor "D" • D.U.T. - Device Under Test
V DD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
RD
V DS VGS RG 10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
D.U.T.
+
-V DD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
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IRF2805
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048)
4 15.24 (.600) 14.84 (.584)
1.15 (.045) MIN 1 2 3
LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
14.09 (.555) 13.47 (.530)
4.06 (.160) 3.55 (.140)
3X 3X 1.40 (.055) 1.15 (.045)
0.93 (.037) 0.69 (.027) M BAM
3X
0.55 (.022) 0.46 (.018)
0.36 (.014)
2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH
2.92 (.115) 2.64 (.104)
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010 L OT CODE 1789 AS SEMBLED ON WW 19, 1997 IN THE AS SEMBLY LINE "C" INT ERNATIONAL RECTIFIER LOGO AS SEMBLY LOT CODE PART NUMBE R
DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 8/02
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