IRF3205SPBF

PD - 95106 IRF3205SPbF IRF3205LPbF l l l l l l l Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Fully Avalanche Rated Lead-Free HEXFET® Power MOSFET D VDSS = 55V RDS(on) = 8.0mΩ G S ID = 110A… Description Advanced HEXFET® Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low onresistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2 Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRF3205L) is available for low-profile applications. D2Pak IRF3205SPbF TO-262 IRF3205LPbF Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Power Dissipation Linear Derating Factor Gate-to-Source Voltage Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt ƒ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew Max. 110 … 80 390 200 1.3 ± 20 62 20 5.0 -55 to + 175 300 (1.6mm from case ) 10 lbf•in (1.1N•m) Units A W W/°C V A mJ V/ns °C Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient (PCB mounted, steady-state)* Typ. ––– ––– Max. 0.75 40 Units °C/W www.irf.com 1 03/11/04 IRF3205S/LPbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss EAS Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Single Pulse Avalanche Energy ‚ Min. Typ. Max. Units Conditions 55 ––– ––– V VGS = 0V, ID = 250µA ––– 0.057 ––– V/°C Reference to 25°C, I D = 1mA ––– ––– 8.0 mΩ VGS = 10V, ID = 62A „ 2.0 ––– 4.0 V VDS = VGS, ID = 250µA 44 ––– ––– S VDS = 25V, ID = 62A„ ––– ––– 25 VDS = 55V, VGS = 0V µA ––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C ––– ––– 100 VGS = 20V nA ––– ––– -100 VGS = -20V ––– ––– 146 ID = 62A ––– ––– 35 nC VDS = 44V ––– ––– 54 VGS = 10V, See Fig. 6 and 13 ––– 14 ––– VDD = 28V ––– 101 ––– ID = 62A ns ––– 50 ––– RG = 4.5Ω ––– 65 ––– VGS = 10V, See Fig. 10 „ Between lead, 4.5 ––– ––– 6mm (0.25in.) nH G from package ––– 7.5 ––– and center of die contact ––– 3247 ––– VGS = 0V ––– 781 ––– VDS = 25V ––– 211 ––– pF ƒ = 1.0MHz, See Fig. 5 ––– 1050 † 264‡ mJ IAS = 62A, L = 138µH D S Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Notes: Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 110 showing the A G integral reverse ––– ––– 390 S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 62A, VGS = 0V „ ––– 69 104 ns TJ = 25°C, IF = 62A ––– 143 215 nC di/dt = 100A/µs „ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ‚ Starting TJ = 25°C, L = 138µH RG = 25Ω, IAS = 62A. (See Figure 12) TJ ≤ 175°C „ Pulse width ≤ 400µs; duty cycle ≤ 2%. … Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A. ƒ ISD ≤ 62A, di/dt ≤ 207A/µs, VDD ≤ V(BR)DSS, † This is a typical value at device destruction and represents operation outside rated limits. ‡This is a calculated value limited to TJ = 175°C. * When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. 2 www.irf.com IRF3205S/LPbF 1000 100 I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 1000 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 4.5V 10 10 4.5V 1 0.1 20µs PULSE WIDTH TJ = 25 °C 1 10 100 1 0.1 20µs PULSE WIDTH TJ = 175 °C 1 10 100 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics RDS(on) , Drain-to-Source On Resistance (Normalized) 1000 2.5 ID = 107A I D , Drain-to-Source Current (A) TJ = 25 ° C TJ = 175° C 2.0 100 1.5 1.0 10 0.5 1 V DS= 25V 20µs PULSE WIDTH 4 6 8 10 12 0.0 -60 -40 -20 0 VGS = 10V 20 40 60 80 100 120 140 160 180 VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( ° C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature 3 www.irf.com IRF3205S/LPbF 6000 VGS , Gate-to-Source Voltage (V) 5000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd 16 14 12 10 8 6 4 2 0 ID = 62A V DS= 44V V DS= 27V V DS= 11V C, Capacitance(pF) 4000 Ciss 3000 2000 Coss 1000 Crss 0 1 10 100 0 20 40 60 80 100 120 VDS, Drain-to-Source Voltage (V) QG , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 10000 Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage ISD , Reverse Drain Current (A) TJ = 175° C OPERATION IN THIS AREA LIMITED BY RDS(on) ID , Drain Current (A) 100 1000 10us 10 100 100us 1ms TJ = 25 ° C 1 10 0.1 0.2 V GS = 0 V 0.8 1.4 2.0 2.6 1 TC = 25 °C TJ = 175 °C Single Pulse 1 10 10ms 100 1000 VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 Fig 8. Maximum Safe Operating Area www.irf.com IRF3205S/LPbF 120 V DS RD LIMITED BY PACKAGE 100 VGS RG 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % D.U.T. + VDD ID , Drain Current (A) - 80 60 40 Fig 10a. Switching Time Test Circuit VDS 90% 20 0 25 50 TC , Case Temperature ( ° C) 75 100 125 150 175 10% VGS td(on) tr t d(off) tf Fig 9. Maximum Drain Current Vs. Case Temperature 1 Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 0.01 0.00001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF3205S/LPbF EAS , Single Pulse Avalanche Energy (mJ) 500 15V 400 VDS L DRIVER ID 25A 44A BOTTOM 62A TOP RG 20V D.U.T IAS tp + - VDD 300 A 0.01Ω 200 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp 100 0 25 Starting T J, Junction Temperature ( ° C) 50 75 100 125 150 175 Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 10 V QGS VG QGD VGS 3mA D.U.T. + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 6 www.irf.com IRF3205S/LPbF Peak Diode Recovery dv/dt Test Circuit D.U.T + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS www.irf.com 7 IRF3205S/LPbF Dimensions are shown in millimeters (inches) D2Pak Package Outline D2Pak Part Marking Information (Lead-Free) T H IS IS AN IR F 5 3 0 S W IT H L O T CO D E 8 0 2 4 AS S E M B L E D O N W W 0 2 , 2 0 0 0 IN T H E AS S E M B L Y L IN E "L " N ote: "P " in as s em bly lin e po s i tion in dicates "L ead-F r ee" IN T E R N AT IO N AL R E CT IF IE R L O GO AS S E M B L Y L O T CO D E P AR T N U M B E R F 53 0 S D AT E CO D E Y E AR 0 = 2 0 0 0 W E E K 02 L IN E L OR IN T E R N AT IO N AL R E C T IF IE R L O GO AS S E M B L Y L OT COD E P AR T N U M B E R F 530S D AT E CO D E P = D E S IG N AT E S L E AD -F R E E P R O D U C T (O P T IO N AL ) Y E AR 0 = 2 0 0 0 W E E K 02 A = AS S E M B L Y S IT E CO D E 8 www.irf.com IRF3205S/LPbF TO-262 Package Outline IGBT 1- GATE 2- COLLECTOR 3- EMITTER TO-262 Part Marking Information EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS SEMBLED ON WW 19, 1997 IN T HE ASS EMBLY LINE "C" Note: "P" in as s embly line pos ition indicates "Lead-Free" INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C OR INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = AS S EMBLY S ITE CODE www.irf.com 9 IRF3205S/LPbF D2Pak Tape & Reel Infomation Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION 1.85 (.073) 1.65 (.065) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Data and specifications subject to change without notice. This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.03/04 10 www.irf.com