IRF3709ZPBF

Applications l High Frequency Synchronous Buck Converters for Computer Processor Power l Lead-Free HEXFET® Power MOSFET IRF3709ZPbF IRF3709ZSPbF IRF3709ZLPbF Qg 17nC 6.3m: PD -95465 VDSS RDS(on) max 30V Benefits l Low RDS(on) at 4.5V VGS l Low Gate Charge l Fully Characterized Avalanche Voltage and Current TO-220AB IRF3709Z D2Pak IRF3709ZS TO-262 IRF3709ZL Absolute Maximum Ratings Parameter VDS VGS ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C PD @TC = 100°C TJ TSTG Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Max. 30 ± 20 87 62 Units V A c h h 350 79 40 0.53 -55 to + 175 300 (1.6mm from case) 10 lbf in (1.1N m) W/°C °C W Maximum Power Dissipation Maximum Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw y y Thermal Resistance Parameter RθJC RθJA Junction-to-Case i Typ. Max. 1.89 40 Units °C/W Junction-to-Ambient (PCB Mount) g ––– ––– Notes  through ‡ are on page 12 www.irf.com 1 6/30/04 IRF3709Z/S/LPbF Static @ TJ = 25°C (unless otherwise specified) Parameter BVDSS ∆ΒVDSS/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss td(on) tr td(off) tf Ciss Coss Crss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. Typ. Max. Units 30 ––– ––– ––– 1.35 ––– ––– ––– ––– ––– 88 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 0.021 5.0 6.2 ––– -5.5 ––– ––– ––– ––– ––– 17 4.4 1.7 6.0 4.9 7.7 11 13 41 16 4.7 2130 450 220 ––– ––– 6.3 7.8 2.25 ––– 1.0 150 100 -100 ––– 26 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– pF VGS = 0V VDS = 15V ns nC nC VDS = 15V VGS = 4.5V ID = 17A S nA V mV/°C µA V Conditions VGS = 0V, ID = 250µA mV/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 21A VGS = 4.5V, ID = 17A e e VDS = VGS, ID = 250µA VDS = 24V, VGS = 0V VDS = 24V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V VDS = 15V, ID = 17A See Fig. 14a&b VDS = 16V, VGS = 0V VDD = 15V, VGS = 4.5V ID = 17A Clamped Inductive Load e ƒ = 1.0MHz Avalanche Characteristics EAS IAR EAR Parameter Single Pulse Avalanche Energy Avalanche Current Ù d Typ. ––– ––– ––– Max. 60 17 7.9 Units mJ A mJ Repetitive Avalanche Energy ™ ––– ––– ––– ––– ––– ––– ––– ––– 16 6.2 Diode Characteristics Parameter IS ISM VSD trr Qrr Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Min. Typ. Max. Units 87 h Conditions MOSFET symbol D A 350 1.0 24 9.3 V ns nC Ù showing the integral reverse G S p-n junction diode. TJ = 25°C, IS = 17A, VGS = 0V TJ = 25°C, IF = 17A, VDD = 15V di/dt = 100A/µs e e 2 www.irf.com IRF3709Z/S/LPbF 1000 TOP VGS 10V 9.0V 7.0V 5.0V 4.5V 4.0V 3.5V 3.0V 1000 TOP VGS 10V 9.0V 7.0V 5.0V 4.5V 4.0V 3.5V 3.0V ID, Drain-to-Source Current (A) BOTTOM ID, Drain-to-Source Current (A) 100 BOTTOM 100 3.0V 10 3.0V ≤60µs PULSE WIDTH 10 0.1 1 Tj = 25°C 1 100 0.1 1 10 ≤60µs PULSE WIDTH Tj = 175°C 10 100 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 RDS(on) , Drain-to-Source On Resistance (Normalized) 2.0 ID, Drain-to-Source Current (Α) ID = 42A VGS = 10V 100 T J = 175°C 1.5 10 1.0 1 T J = 25°C VDS = 15V ≤60µs PULSE WIDTH 0 1 2 3 4 5 6 7 8 0.1 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 VGS, Gate-to-Source Voltage (V) T J , Junction Temperature (°C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature www.irf.com 3 IRF3709Z/S/LPbF 10000 VGS = 0V, f = 1 MHZ C iss = C gs + Cgd, C ds SHORTED C rss = C gd C oss = C ds + Cgd 6.0 ID= 17A VGS, Gate-to-Source Voltage (V) 5.0 4.0 3.0 2.0 1.0 0.0 C, Capacitance(pF) Ciss 1000 VDS= 24V VDS= 15V Coss Crss 100 1 10 100 0 5 10 15 20 25 VDS, Drain-to-Source Voltage (V) QG Total Gate Charge (nC) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 1000.00 10000 OPERATION IN THIS AREA LIMITED BY R DS(on) 100.00 T J = 175°C ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 100 100µsec 10 1msec 1 Tc = 25°C Tj = 175°C Single Pulse 0 1 10 10msec 10.00 T J = 25°C VGS = 0V 1.00 0.0 0.5 1.0 1.5 2.0 2.5 VSD, Source-to-Drain Voltage (V) 0.1 100 1000 VDS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF3709Z/S/LPbF 90 Limited By Package VGS(th) Gate threshold Voltage (V) 2.5 80 70 ID, Drain Current (A) 2.0 60 50 40 30 20 10 0 25 50 75 100 125 150 175 T C , Case Temperature (°C) 1.5 ID = 250µA 1.0 0.5 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( °C ) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Threshold Voltage vs. Temperature 10 Thermal Response ( Z thJC ) 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 τJ R1 R1 τJ τ1 τ2 R2 R2 τC τ τ2 Ri (°C/W) τi (sec) 0.832 0.000221 1.058 0.001171 τ1 0.01 SINGLE PULSE ( THERMAL RESPONSE ) Ci= τi/Ri Ci i/Ri Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 0.001 0.01 0.1 0.001 1E-006 1E-005 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF3709Z/S/LPbF RDS(on), Drain-to -Source On Resistance ( mΩ) Vgs = 10V 8.00 RDS(on), Drain-to -Source On Resistance (m Ω) 9.00 16 14 12 10 8 6 4 2 0 2 3 4 5 6 7 8 9 10 T J = 25°C T J = 125°C ID = 21A T J = 125°C 7.00 6.00 T J = 25°C 5.00 4.00 10.0 20.0 30.0 40.0 50.0 60.0 70.0 ID, Drain Current (A) VGS, Gate -to -Source Voltage (V) Fig 12. On-Resistance vs. Drain Current Current Regulator Same Type as D.U.T. Id 50KΩ 12V .2µF .3µF Fig 13. On-Resistance vs. Gate Voltage Vds Vgs 250 D.U.T. VGS 3mA EAS , Single Pulse Avalanche Energy (mJ) + V - DS Vgs(th) 200 ID 5.4A 8.0A BOTTOM 17A TOP IG ID Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr 150 Fig 14a&b. Basic Gate Charge Test Circuit and Waveform 15V 100 V(BR)DSS tp VDS L 50 DRIVER RG 20V D.U.T IAS + V - DD 0 A 25 50 75 100 125 150 175 I AS tp 0.01Ω Starting T J , Junction Temperature (°C) Fig 15a&b. Unclamped Inductive Test circuit and Waveforms Fig 16. Maximum Avalanche Energy vs. Drain Current 6 www.irf.com IRF3709Z/S/LPbF D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt ‚ - - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD VDD + - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs LD VDS + VDD D.U.T VGS Pulse Width < 1µs Duty Factor < 0.1% Fig 18a. Switching Time Test Circuit 90% VDS 10% VGS td(on) tr td(off) tf Fig 18b. Switching Time Waveforms www.irf.com 7 IRF3709Z/S/LPbF Power MOSFET Selection for Non-Isolated DC/DC Converters Control FET Special attention has been given to the power losses in the switching elements of the circuit - Q1 and Q2. Power losses in the high side switch Q1, also called the Control FET, are impacted by the Rds(on) of the MOSFET, but these conduction losses are only about one half of the total losses. Power losses in the control switch Q1 are given by; Synchronous FET The power loss equation for Q2 is approximated by; * P =P loss conduction + P drive + P output P = Irms × Rds(on) loss + (Qg × Vg × f ) ( 2 ) Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput This can be expanded and approximated by; ⎛Q ⎞ + ⎜ oss × Vin × f + (Qrr × Vin × f ) ⎠ ⎝2 *dissipated primarily in Q1. Ploss = (Irms × Rds(on ) ) 2 ⎛ ⎞⎛ Qgs 2 Qgd +⎜I× × Vin × f ⎟ + ⎜ I × × Vin × ig ig ⎝ ⎠⎝ + (Qg × Vg × f ) + ⎛ Qoss × Vin × f ⎞ ⎝2 ⎠ ⎞ f⎟ ⎠ This simplified loss equation includes the terms Qgs2 and Qoss which are new to Power MOSFET data sheets. Qgs2 is a sub element of traditional gate-source charge that is included in all MOSFET data sheets. The importance of splitting this gate-source charge into two sub elements, Qgs1 and Qgs2, can be seen from Fig 16. Qgs2 indicates the charge that must be supplied by the gate driver between the time that the threshold voltage has been reached and the time the drain current rises to Idmax at which time the drain voltage begins to change. Minimizing Qgs2 is a critical factor in reducing switching losses in Q1. Qoss is the charge that must be supplied to the output capacitance of the MOSFET during every switching cycle. Figure A shows how Qoss is formed by the parallel combination of the voltage dependant (nonlinear) capacitance’s Cds and Cdg when multiplied by the power supply input buss voltage. For the synchronous MOSFET Q2, Rds(on) is an important characteristic; however, once again the importance of gate charge must not be overlooked since it impacts three critical areas. Under light load the MOSFET must still be turned on and off by the control IC so the gate drive losses become much more significant. Secondly, the output charge Qoss and reverse recovery charge Qrr both generate losses that are transfered to Q1 and increase the dissipation in that device. Thirdly, gate charge will impact the MOSFETs’ susceptibility to Cdv/dt turn on. The drain of Q2 is connected to the switching node of the converter and therefore sees transitions between ground and Vin. As Q1 turns on and off there is a rate of change of drain voltage dV/dt which is capacitively coupled to the gate of Q2 and can induce a voltage spike on the gate that is sufficient to turn the MOSFET on, resulting in shoot-through current . The ratio of Qgd/Qgs1 must be minimized to reduce the potential for Cdv/dt turn on. Figure A: Qoss Characteristic 8 www.irf.com IRF3709Z/S/LPbF TO-220AB Package Outline 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) Dimensions are shown in millimeters (inches) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048) 2.87 (.113) 2.62 (.103) 4 15.24 (.600) 14.84 (.584) 1.15 (.045) MIN 1 2 3 LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 2 1- GATE- DRAIN 1- GATE 32- DRAINSOURCE 2- COLLECTOR 3- SOURCE 3- EMITTER 4 - DRAIN LEAD ASSIGNMENTS HEXFET 14.09 (.555) 13.47 (.530) 4- DRAIN 4.06 (.160) 3.55 (.140) 4- COLLECTOR 3X 3X 1.40 (.055) 1.15 (.045) 0.93 (.037) 0.69 (.027) M BAM 3X 0.55 (.022) 0.46 (.018) 0.36 (.014) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 2.92 (.115) 2.64 (.104) 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information E XAMPL E : T HIS IS AN IR F 1010 L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R Note: "P" in assembly line position indicates "Lead-Free" DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C www.irf.com 9 IRF3709Z/S/LPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information (Lead-Free) T H IS IS AN IR F 5 3 0 S W IT H L OT COD E 8 0 24 AS S E M B L E D O N W W 0 2 , 2 0 0 0 IN T H E AS S E M B L Y L IN E "L " N ote: "P " in as s em bly line pos ition in dicates "L ead-F ree" IN T E R N AT IO N AL R E C T IF IE R L O GO AS S E M B L Y L O T CO D E P AR T N U M B E R F 530S D AT E C O D E Y E AR 0 = 2 0 0 0 WE E K 02 L IN E L OR IN T E R N AT IO N AL R E C T IF IE R L OGO AS S E M B L Y L O T COD E P AR T N U M B E R F 530S D AT E C O D E P = D E S IG N AT E S L E AD -F R E E P R O D U CT (O P T IO N AL ) Y E AR 0 = 2 0 0 0 WE E K 02 A = AS S E M B L Y S IT E C O D E 10 www.irf.com IRF3709Z/S/LPbF TO-262 Package Outline IGBT 1- GATE 2- COLLECTOR 3- EMITTER TO-262 Part Marking Information EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN T HE AS S EMBLY LINE "C" Note: "P" in as s embly line pos ition indicates "Lead-Free" INT ERNAT IONAL RECTIFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C OR INT ERNATIONAL RECTIFIER LOGO AS S EMBLY LOT CODE PART NUMBER DATE CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPT IONAL) YEAR 7 = 1997 WEEK 19 A = AS S EMBLY S IT E CODE www.irf.com 11 IRF3709Z/S/LPbF D2Pak Tape & Reel Infomation Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION 1.85 (.073) 1.65 (.065) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Notes:  Repetitive rating; pulse width limited by … This is applied to D2Pak, when mounted on 1" square PCB (FR4 or G-10 Material). For recommended footprint and soldering max. junction temperature. techniques refer to application note #AN-994. ‚ Starting TJ = 25°C, L = 0.42mH, RG = 25Ω, † Calculated continuous current based on maximum allowable IAS = 17A. junction temperature. Package limitation current is 42A. ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%. ‡ Rθ is measured at TJ of approximately 90°C. „ Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 6/04 12 www.irf.com