IRF3710ZSPBF

PD - 95466 AUTOMOTIVE MOSFET Features ● ● ● ● ● ● ● Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free HEXFET® Power MOSFET D IRF3710ZPbF IRF3710ZSPbF IRF3710ZLPbF VDSS = 100V RDS(on) = 18mΩ Description Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. G S ID = 59A TO-220AB IRF3710Z D2Pak IRF3710ZS TO-262 IRF3710ZL Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS EAS (tested) IAR EAR TJ TSTG Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (See Fig. 9) Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited) Single Pulse Avalanche Energy Tested Value Avalanche Current Max. 59 42 240 160 1.1 ± 20 170 200 See Fig.12a,12b,15,16 -55 to + 175 300 (1.6mm from case ) 10 lbf•in (1.1N•m) Units A c W W/°C V mJ A mJ °C c i d Repetitive Avalanche Energy Operating Junction and Storage Temperature Range h Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw Thermal Resistance Parameter RθJC RθCS RθJA RθJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Junction-to-Ambient (PCB Mount, steady state) Typ. ––– 0.50 ––– ––– Max. 0.92 ––– 62 40 Units °C/W j HEXFET® is a registered trademark of International Rectifier. www.irf.com 1 6/30/04 IRF3710Z/S/LPbF Static @ TJ = 25°C (unless otherwise specified) Parameter V(BR)DSS ∆ΒVDSS/∆TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. Typ. Max. Units 100 ––– ––– 2.0 35 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 0.10 14 ––– ––– ––– ––– ––– ––– 82 19 27 17 77 41 56 4.5 7.5 2900 290 150 1130 170 280 ––– ––– 18 4.0 ––– 20 250 200 -200 120 28 40 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– pF Conditions V VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 35A V VDS = VGS, ID = 250µA S VDS = 50V, ID = 35A µA VDS = 100V, VGS = 0V VDS = 100V, VGS = 0V, TJ = 125°C nA VGS = 20V VGS = -20V nC ID = 35A VDS = 80V VGS = 10V ns VDD = 50V ID = 35A RG = 6.8Ω VGS = 10V D nH Between lead, f f f 6mm (0.25in.) from package G S and center of die contact VGS = 0V VDS = 25V ƒ = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz VGS = 0V, VDS = 80V, ƒ = 1.0MHz VGS = 0V, VDS = 0V to 80V Diode Characteristics Parameter IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units ––– ––– ––– ––– ––– ––– ––– ––– 50 100 59 A 240 1.3 75 160 V ns nC Conditions MOSFET symbol showing the integral reverse G D Ù p-n junction diode. TJ = 25°C, IS = 35A, VGS = 0V TJ = 25°C, IF = 35A, VDD = 25V di/dt = 100A/µs f S Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) f Notes:  Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). ‚ Limited by TJmax, starting TJ = 25°C, L = 0.27mH, RG = 25 Ω, IAS = 35A, VGS =10V. Part not recommended for use above this value. ƒ ISD ≤ 35A, di/dt ≤ 380A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. „ Pulse width ≤ 1.0ms; duty cycle ≤ 2%. … Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . † Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. ‡ This value determined from sample failure population. 100% tested to this value in production. ˆ This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. 2 www.irf.com IRF3710Z/S/LPbF 1000 TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 1000 TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V ID, Drain-to-Source Current (A) 100 ID, Drain-to-Source Current (A) 100 BOTTOM 10 BOTTOM 1 4.5V 10 4.5V 0.1 20µs PULSE WIDTH Tj = 25°C 0.01 0.1 1 10 100 20µs PULSE WIDTH Tj = 175°C 1 0.1 1 10 100 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 120 GFS , Forward Transconductance (S) ID, Drain-to-Source Current (Α) 100 100 T J = 175°C TJ = 25°C 80 T J = 175°C 60 10 1 T J = 25°C VDS = 25V 20µs PULSE WIDTH 2 4 6 8 10 40 20 0 VDS = 15V 20µs PULSE WIDTH 0 10 20 30 40 50 60 70 0 VGS, Gate-to-Source Voltage (V) ID, Drain-to-Source Current (A) Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance vs. Drain Current www.irf.com 3 IRF3710Z/S/LPbF 100000 VGS = 0V, C iss C rss V GS, Gate-to-Source Voltage (V) f = 1 MHZ =C +C , C gs gd ds = Cgd 12.0 SHORTED ID= 35A 10.0 8.0 6.0 4.0 2.0 0.0 0 20 V DS= 80V V DS= 50V V DS= 20V 10000 C oss =C +C ds gd C, Capacitance(pF) Ciss 1000 Coss 100 Crss 10 1 10 100 40 60 80 100 V DS, Drain-to-Source Voltage (V) QG Total Gate Charge (nC) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 1000.00 1000 OPERATION IN THIS AREA LIMITED BY R (on) DS 100.00 TJ = 175°C ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 100 100µsec 10 10.00 TJ = 25°C 1.00 1 1msec Tc = 25°C Tj = 175°C Single Pulse 1 10 10msec 0.10 0.2 0.4 0.6 0.8 1.0 1.2 V GS = 0V 1.4 1.6 0.1 100 1000 V DS , Drain-toSource Voltage (V) V SD, Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF3710Z/S/LPbF 60 50 ID, Drain Current (A) 3.0 RDS(on) , Drain-to-Source On Resistance (Normalized) 2.5 ID = 59A V GS = 10V 40 30 20 10 0 25 50 75 100 125 150 175 TC , Case Temperature (°C) 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature (°C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Normalized On-Resistance vs. Temperature 10 Thermal Response ( Z thJC ) 1 D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 0.1 0.01 0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF3710Z/S/LPbF 15V 300 EAS , Single Pulse Avalanche Energy (mJ) VDS L DRIVER 250 ID 15A 25A BOTTOM 35A TOP RG VGS 20V D.U.T IAS tp 200 + V - DD A 0.01Ω 150 100 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp 50 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature (°C) I AS Fig 12b. Unclamped Inductive Waveforms QG Fig 12c. Maximum Avalanche Energy vs. Drain Current 10 V QGS VG QGD 5.0 V GS(th) Gate threshold Voltage (V) 4.0 Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 3.0 ID = 250µA 50KΩ 12V .2µF .3µF 2.0 D.U.T. VGS 3mA + V - DS 1.0 -75 -50 -25 0 25 50 75 100 125 150 175 200 TJ , Temperature ( °C ) IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage vs. Temperature 6 www.irf.com IRF3710Z/S/LPbF 1000 Duty Cycle = Single Pulse 100 Avalanche Current (A) 0.01 10 Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses 0.05 0.10 1 0.1 1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current vs.Pulsewidth 200 EAR , Avalanche Energy (mJ) 150 TOP Single Pulse BOTTOM 10% Duty Cycle ID = 35A 100 50 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature (°C) Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav www.irf.com Fig 16. Maximum Avalanche Energy vs. Temperature 7 IRF3710Z/S/LPbF D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt ‚ - - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD VDD + - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V DS VGS RG 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % RD D.U.T. + -VDD Fig 18a. Switching Time Test Circuit VDS 90% 10% VGS td(on) tr t d(off) tf Fig 18b. Switching Time Waveforms 8 www.irf.com IRF3710Z/S/LPbF TO-220AB Package Outline 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) Dimensions are shown in millimeters (inches) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048) 2.87 (.113) 2.62 (.103) 4 15.24 (.600) 14.84 (.584) 1.15 (.045) MIN 1 2 3 LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 2 1- GATE- DRAIN 1- GATE 32- DRAINSOURCE 2- COLLECTOR 3- SOURCE 3- EMITTER 4 - DRAIN LEAD ASSIGNMENTS HEXFET 14.09 (.555) 13.47 (.530) 4- DRAIN 4.06 (.160) 3.55 (.140) 4- COLLECTOR 3X 3X 1.40 (.055) 1.15 (.045) 0.93 (.037) 0.69 (.027) M BAM 3X 0.55 (.022) 0.46 (.018) 0.36 (.014) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 2.92 (.115) 2.64 (.104) 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information E XAMPL E : T HIS IS AN IR F 1010 L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R Note: "P" in assembly line position indicates "Lead-Free" DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C www.irf.com 9 IRF3710Z/S/LPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information (Lead-Free) T H IS IS AN IR F 5 3 0 S W IT H L O T CO D E 8 0 2 4 AS S E M B L E D O N W W 0 2 , 2 0 0 0 IN T H E AS S E M B L Y L IN E "L " N ote: "P " in as s em bly lin e po s i tion in dicates "L ead-F r ee" IN T E R N AT IO N AL R E CT IF IE R L O GO AS S E M B L Y L O T CO D E P AR T N U M B E R F 53 0 S D AT E CO D E Y E AR 0 = 2 0 0 0 W E E K 02 L IN E L OR IN T E R N AT IO N AL R E C T IF IE R L OG O AS S E M B L Y L OT CO D E P AR T N U M B E R F 530 S D AT E C O D E P = D E S IGN AT E S L E AD -F R E E P R O D U C T (O P T IO N AL ) Y E AR 0 = 2 0 0 0 WE E K 02 A = AS S E M B L Y S IT E C O D E 10 www.irf.com IRF3710Z/S/LPbF TO-262 Package Outline IGBT 1- GATE 2- COLLECTOR 3- EMITTER TO-262 Part Marking Information EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS SEMBLED ON WW 19, 1997 IN T HE ASS EMBLY LINE "C" Note: "P" in as s embly line pos ition indicates "Lead-Free" INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C OR INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = AS S EMBLY S ITE CODE www.irf.com 11 IRF3710Z/S/LPbF D2Pak Tape & Reel Infomation Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION 1.85 (.073) 1.65 (.065) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 30.40 (1.197) MAX. 26.40 (1.039) 24.40 (.961) 3 4 TO-220AB package is not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR’s Web site. 12 IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.06/04 www.irf.com