IRF3808L

PD - 94338A AUTOMOTIVE MOSFET Typical Applications q q IRF3808S IRF3808L HEXFET® Power MOSFET D Integrated Starter Alternator 42 Volts Automotive Electrical Systems Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Benefits q q q q q q VDSS = 75V G S RDS(on) = 0.007Ω ID = 106AV Description Designed specifically for Automotive applications, this Advanced Planar Stripe HEXFET ® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this HEXFET power MOSFET are a 175°C junction operating temperature, low RθJC, fast switching speed and improved repetitive avalanche rating. This combination makes the design an extremely efficient and reliable choice for use in higher power Automotive electronic systems and a wide variety of other applications. D2Pak IRF3808S TO-262 IRF3808L Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Q Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche EnergyR Avalanche CurrentQ Repetitive Avalanche EnergyW Peak Diode Recovery dv/dt S Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 106V 75 V 550 200 1.3 ± 20 430 82 See Fig.12a, 12b, 15, 16 5.5 -55 to + 175 300 (1.6mm from case ) Units A W W/°C V mJ A mJ V/ns °C Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient (PCB Mounted, Steady State)** Typ. ––– ––– Max. 0.75 40 Units °C/W HEXFET(R) is a registered trademark of International Rectifier. www.irf.com 1 03/08/02 IRF3808S/IRF3808L Electrical Characteristics @ TJ = 25°C (unless otherwise specified) V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance U Min. 75 ––– ––– 2.0 100 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.086 5.9 ––– ––– ––– ––– ––– ––– 150 31 50 16 140 68 120 4.5 7.5 5310 890 130 6010 570 1140 Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA 7.0 mΩ VGS = 10V, ID = 82A T 4.0 V VDS = 10V, ID = 250µA ––– S VDS = 25V, ID = 82A 20 VDS = 75V, VGS = 0V µA 250 VDS = 60V, VGS = 0V, TJ = 150°C 200 VGS = 20V nA -200 VGS = -20V 220 ID = 82A 47 nC VDS = 60V 76 VGS = 10VT ––– VDD = 38V ––– ID = 82A ns ––– RG = 2.5Ω ––– VGS = 10V T D Between lead, ––– 6mm (0.25in.) nH G from package ––– and center of die contact S ––– VGS = 0V ––– pF VDS = 25V ––– ƒ = 1.0MHz, See Fig. 5 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 60V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 60V Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Notes: Q Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). R Starting TJ = 25°C, L = 0.130mH RG = 25Ω, IAS = 82A. (See Figure 12). S ISD ≤ 82A, di/dt ≤ 310A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C T Pulse width ≤ 400µs; duty cycle ≤ 2%. Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Q Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 106V showing the A G integral reverse ––– ––– 550 S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 82A, VGS = 0VT ––– 93 140 ns TJ = 25°C, IF = 82A ––– 340 510 nC di/dt = 100A/µs T Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) U Coss eff. is a fixed capacitance that gives the same charging time V Calculated continuous current based on maximum allowable W Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. ** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. junction temperature. Package limitation current is 75A. as Coss while VDS is rising from 0 to 80% VDSS . 2 www.irf.com IRF3808S/IRF3808L 1000 I D, Drain-to-Source Current (A) 100 I D, Drain-to-Source Current (A)  TOP BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 1000 100  TOP BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 4.5V 4.5V 10 10 1 0.1 1  20µs PULSE WIDTH T J= 25 ° C 10 100 1 0.1 1  20µs PULSE WIDTH T J= 175 ° C 10 100 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000.00 3.0 I D = 137A  ID, Drain-to-Source Current (Α ) 2.5 TJ = 175°C RDS(on) , Drain-to-Source On Resistance 2.0 (Normalized) 100.00 1.5 T J = 25°C 1.0 0.5 10.00 1.0 3.0 5.0 7.0 VDS = 15V 20µs PULSE WIDTH 9.0 11.0 13.0 15.0 0.0 -60 -40 -20 0 20 40 60 80 V GS = 10V  100 120 140 160 180 TJ , Junction Temperature (° C) VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRF3808S/IRF3808L 100000 12 VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds ID = 82A  10  V DS = 60V V DS = 37V V DS = 15V C, Capacitance(pF) VGS, Gate-to-Source Voltage (V) 10000 8 Ciss 6 1000 Coss 4 2 Crss 100 1 10 100 0 0 40 80 120 160 QG , Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000.00 10000 OPERATION IN THIS AREA LIMITED BY R DS (on) 100.00 T J = 175°C 10.00 T J = 25°C 1.00 VGS = 0V 0.10 0.0 0.5 1.0 1.5 2.0 VSD , Source-toDrain Voltage (V) ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 100 100µsec 10 Tc = 25°C Tj = 175°C Single Pulse 1 1 10 1msec 10msec 100 1000 VDS , Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF3808S/IRF3808L 120  LIMITED BY PACKAGE 100 VDS VGS RG RD D.U.T. + 80 -VDD I D , Drain Current (A) 10V 60 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 40 Fig 10a. Switching Time Test Circuit VDS 90% 20 0 25 50 75 100 125 150 175 TC , Case Temperature ( ° C) Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 1 (Z thJC ) D = 0.50 0.20 Thermal Response 0.1 0.10 0.05 0.02 0.01  SINGLE PULSE (THERMAL RESPONSE) 0.0001 0.001 0.01 0.01 0.00001  Notes: 1. Duty factor D = 2. Peak T 0.1 t1/ t 2 J = P DM x Z thJC  P DM t1 t2 +T C 1 10 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF3808S/IRF3808L 1 5V 800 VDS L D R IV E R E AS , Single Pulse Avalanche Energy (mJ) 640  ID TOP 34A 58A 82A BOTTOM RG 20V tp D .U .T IA S + V - DD 480 A 0 .0 1 Ω 320 Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp 160 0 25 50 75 100 125 150 Starting Tj, Junction Temperature ( ° C) IAS Fig 12b. Unclamped Inductive Waveforms QG Fig 12c. Maximum Avalanche Energy Vs. Drain Current 10 V QGS VG QGD VGS(th) Gate threshold Voltage (V) 3.5 3.0 Charge 2.5 ID = 250µA Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 2.0 50KΩ 12V .2µF .3µF 1.5 D.U.T. VGS 3mA + V - DS 1.0 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( °C ) IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage Vs. Temperature 6 www.irf.com IRF3808S/IRF3808L 10000 1000 Avalanche Current (A) Duty Cycle = Single Pulse 100 0.01 10 0.05 0.10 Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax 1 0.1 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth 500 EAR , Avalanche Energy (mJ) 400 TOP Single Pulse BOTTOM 10% Duty Cycle ID = 140A 300 200 100 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). t av = Average time in avalanche. 175 D = Duty cycle in avalanche = t av ·f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = ∆T/ ZthJC Iav = 2∆T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 16. Maximum Avalanche Energy Vs. Temperature www.irf.com 7 IRF3808S/IRF3808L Peak Diode Recovery dv/dt Test Circuit D.U.T* + S + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer R - T + Q RG VGS • dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test + VDD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt [VDD] Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% [ ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 17. For N-channel HEXFET® power MOSFETs 8 www.irf.com IRF3808S/IRF3808L D2Pak Package Outline 1 0.54 (.4 15) 1 0.29 (.4 05) 1.4 0 (.055 ) M AX. -A2 4.69 (.1 85) 4.20 (.1 65) -B 1.3 2 (.05 2) 1.2 2 (.04 8) 1 0.16 (.4 00 ) RE F. 6.47 (.2 55 ) 6.18 (.2 43 ) 15 .4 9 (.6 10) 14 .7 3 (.5 80) 5 .28 (.20 8) 4 .78 (.18 8) 2.7 9 (.110 ) 2.2 9 (.090 ) 2.61 (.1 03 ) 2.32 (.0 91 ) 1.3 9 (.0 5 5) 1.1 4 (.0 4 5) 8.8 9 (.3 50 ) R E F. 1.7 8 (.07 0) 1.2 7 (.05 0) 1 3 3X 1.40 (.0 55) 1.14 (.0 45) 3X 5 .08 (.20 0) 0 .93 (.03 7 ) 0 .69 (.02 7 ) 0 .25 (.01 0 ) M BAM 0.5 5 (.022 ) 0.4 6 (.018 ) M IN IM U M R E CO M M E ND E D F O O TP R IN T 1 1.43 (.4 50 ) NO TE S: 1 D IM EN S IO N S A FTER SO L D ER D IP. 2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2. 3 C O N TRO L LIN G D IM EN SIO N : IN C H . 4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S. LE A D A SS IG N M E N TS 1 - G A TE 2 - D R AIN 3 - S O U RC E 8.89 (.3 50 ) 17 .78 (.70 0) 3 .8 1 (.15 0) 2 .08 (.08 2) 2X 2.5 4 (.100 ) 2X D2Pak Part Marking Information THIS IS AN IRF530S WITH LOT CODE 8024 ASSEMBLED ON WW 02, 2000 IN THE ASSEMBLY LINE "L" PART NUMBER F530S DATE CODE YEAR 0 = 2000 WEEK 02 LINE L INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE www.irf.com 9 IRF3808S/IRF3808L TO-262 Package Outline TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL3103L LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" PART NUMBER INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE DATE CODE YEAR 7 = 1997 WEEK 19 LINE C 10 www.irf.com IRF3808S/IRF3808L D2Pak Tape & Reel Information TRR 1 .6 0 ( .0 6 3 ) 1 .5 0 ( .0 5 9 ) 4 .10 ( .1 6 1 ) 3 .90 ( .1 5 3 ) 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 0 .3 6 8 (.0 1 4 5 ) 0 .3 4 2 (.0 1 3 5 ) F E E D D I R E C T IO N 1 .8 5 ( .0 73 ) 1 .6 5 ( .0 65 ) 1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 ) 1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 ) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) TRL 1 0 .9 0 (.4 2 9 ) 1 0 .7 0 (.4 2 1 ) 1 .7 5 (.0 6 9 ) 1 .2 5 (.0 4 9 ) 1 6 .1 0 ( .6 3 4 ) 1 5 .9 0 ( .6 2 6 ) 4 .7 2 (.1 3 6 ) 4 .5 2 (.1 7 8 ) F E E D D IR E C T IO N 1 3 .5 0 ( .5 3 2 ) 1 2 .8 0 ( .5 0 4 ) 2 7 .4 0 ( 1 .0 7 9 ) 2 3 .9 0 ( .9 4 1 ) 4 330.00 ( 14.1 73 ) MAX. 6 0 .0 0 ( 2 .3 6 2 ) M IN . N O TE S : 1 . C O M F O R M S T O EIA-4 1 8 . 2 . C O N TR O L L IN G D IM EN SIO N : M IL L IM ET ER . 3 . D IM E NS IO N M E A SU R ED @ HU B . 4 . IN C L U D E S FL A N G E D IST O R T IO N @ O U TE R E D G E . 26 .40 ( 1.039 ) 24 .40 ( .961 ) 3 3 0 .4 0 ( 1 .1 9 7 ) M A X. 4 Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.03/02 www.irf.com 11