IRF520VLPBF

PD - 95484 l l l l l l l l Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Fully Avalanche Rated Optimized for SMPS Applications Lead-Free HEXFET® Power MOSFET D IRF520VSPbF IRF520VLPbF VDSS = 100V RDS(on) = 0.165Ω G S ID = 9.6A Advanced HEXFET® Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low onresistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRF520VL) is available for low-profile applications. Description D2Pak IRF520VS TO-262 IRF520VL Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V ‡ Continuous Drain Current, VGS @ 10V ‡ Pulsed Drain Current ‡ Power Dissipation Linear Derating Factor Gate-to-Source Voltage Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt ƒ‡ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 9.6 6.8 37 44 0.29 ± 20 9.2 4.4 7.0 -55 to + 175 300 (1.6mm from case ) Units A W W/°C V A mJ V/ns °C Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient ( PCB Mounted, steady state)** Typ. ––– ––– Max. 3.4 40 Units °C/W www.irf.com 1 06/30/04 IRF520VS/LPbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss EAS Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Single Pulse Avalanche Energy‚‡ Min. 100 ––– ––– 2.0 1.9 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.12 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 6.9 23 30 24 4.5 7.5 ––– 560 ––– 81 ––– 10 ––– 150… Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA ‡ 0.165 Ω VGS = 10V, ID = 5.5A „ 4.0 V VDS = VGS, ID = 250µA ––– S VDS = 50V, ID = 5.5A„‡ 25 VDS = 100V, VGS = 0V µA 250 VDS = 80V, VGS = 0V, TJ = 150°C 100 VGS = 20V nA -100 VGS = -20V 22 ID = 9.2A 5.2 nC VDS = 80V 7.0 VGS = 10V, See Fig. 6 and 13‡ ––– VDD = 50V ––– ID = 9.2A ns ––– RG = 18Ω ––– VGS = 10V, See Fig. 10 „‡ Between lead, ––– 6mm (0.25in.) nH G from package ––– and center of die contact ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz, See Fig. 5 ‡ 44 † mJ IAS = 9.2A, L = 1.0mH D S Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Notes: Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 9.6 showing the A G integral reverse 37 ––– ––– S p-n junction diode. ––– ––– 1.2 V TJ = 25°C, IS = 9.2A, VGS = 0V „ ––– 83 120 ns TJ = 25°C, I F = 9.2A ––– 220 330 nC di/dt = 100A/µs „ ‡ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ‚ Starting TJ = 25°C, L = 1.0mH RG = 25Ω, IAS = 9.2A, VGS=10V (See Figure 12) ƒ ISD ≤ 9.2A, di/dt ≤ 360A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C „ Pulse width ≤ 400µs; duty cycle ≤ 2%. … This is a typical value at device destruction and represents operation outside rated limits. † This is a calculated value limited to TJ = 175°C . ‡ Uses IRF520V data and test conditions. **When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 2 www.irf.com IRF520VS/LPbF 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 100 I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 10 10 4.5V 4.5V 1 0.1 20µs PULSE WIDTH TJ = 25 °C 1 10 100 1 1 10 20µs PULSE WIDTH TJ = 175 ° C 100 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 100 3.5 TJ = 25 ° C RDS(on) , Drain-to-Source On Resistance (Normalized) ID = 9.2A I D , Drain-to-Source Current (A) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 TJ = 175 ° C 10 1 4.0 V DS = 50V 20µs PULSE WIDTH 5.0 6.0 7.0 8.0 9.0 VGS = 10V 20 40 60 80 100 120 140 160 180 VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( °C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRF520VS/LPbF 1000 20 VGS , Gate-to-Source Voltage (V) 800 VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + C ds gd ID = 9.2A VDS = 80V VDS = 50V VDS = 20V 16 C, Capacitance(pF) 600 Ciss 12 400 8 200 Coss Crss 4 0 1 10 100 0 0 4 8 12 FOR TEST CIRCUIT SEE FIGURE 13 16 20 24 VDS, Drain-to-Source Voltage (V) QG , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 100 OPERATION IN THIS AREA LIMITED BY R DS(on) TJ = 175 ° C ISD , Reverse Drain Current (A) ID, Drain-to-Source Current (A) 10 10 100µsec 1 1 1msec TJ = 25 ° C 0.1 0.4 V GS = 0 V 0.6 0.8 1.0 1.2 1.4 1.6 0.1 1 Tc = 25°C Tj = 175°C Single Pulse 10 10msec 100 1000 VSD ,Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF520VS/LPbF 10.0 VDS 8.0 RD VGS RG D.U.T. + ID , Drain Current (A) -VDD 6.0 V GS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 4.0 Fig 10a. Switching Time Test Circuit 2.0 VDS 90% 0.0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS td(on) tr t d(off) tf Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms 10 Thermal Response (Z thJC ) D = 0.50 1 0.20 0.10 0.05 0.02 0.01 0.1 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 0.01 0.00001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF520VS/LPbF 15V EAS , Single Pulse Avalanche Energy (mJ) 80 TOP BOTTOM 60 VDS L DRIVER ID 3.8A 6.5A 9.2A RG VGS 20V D.U.T IAS tp + V - DD A 40 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp 20 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature ( °C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF VGS QGS VG QGD VGS 3mA D.U.T. + V - DS IG ID Charge Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 6 www.irf.com IRF520VS/LPbF Peak Diode Recovery dv/dt Test Circuit D.U.T* + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG VGS • dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test + VDD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt [VDD] Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% [ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET® power MOSFETs www.irf.com 7 IRF520VS/LPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information THIS IS AN IRF530S WITH LOT CODE 8024 AS S EMBLED ON WW 02, 2000 IN THE AS S EMBLY LINE "L" Note: "P" in assembly line position indicates "Lead-Free" INT ERNAT IONAL RECTIFIER LOGO AS SEMBLY LOT CODE PART NUMBE R F530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L OR INT ERNATIONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER F530S DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = ASS EMBLY SIT E CODE 8 www.irf.com IRF520VS/LPbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXAMPLE: T HIS IS AN IRL 3103L LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN T HE AS S EMBL Y LINE "C" Note: "P" in ass embly line position indicates "Lead-Free" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C OR INT ERNAT IONAL RE CT IFIER LOGO AS S E MBLY LOT CODE PART NUMBER DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPT IONAL) YE AR 7 = 1997 WEE K 19 A = AS S EMBLY S IT E CODE www.irf.com 9 IRF520VS/LPbF D2Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) F EED DIRECTION 1.85 (.073) 1.65 (.065) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178) F EED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information .06/04 10 www.irf.com Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/