PD - 96105A
IRF7306QPbF
HEXFET® Power MOSFET
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Advanced Process Technology Ultra Low On-Resistance Dual P Channel MOSFET Surface Mount Available in Tape & Reel 150°C Operating Temperature Lead-Free
S1 G1 S2 G2
1 2 3 4
8 7
D1 D1 D2 D2
VDSS = -30V RDS(on) = 0.10Ω
6 5
Top View
Description
These HEXFET® Power MOSFET's in a Dual SO-8 package utilize the lastest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of these HEXFET Power MOSFET's are a 150°C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These benefits combine to make this design an extremely efficient and reliable device for use in a wide variety of applications. The efficient SO-8 package provides enhanced thermal characteristics and dual MOSFET die capability making it ideal in a variety of power applications. This dual, surface mount SO-8 can dramatically reduce board space and is also available in Tape & Reel.
SO-8
Absolute Maximum Ratings
Parameter
ID @ TA = 25°C ID @ TA = 25°C ID @ TA = 70°C IDM PD @TA = 25°C VGS dv/dt TJ, TSTG 10 Sec. Pulsed Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range
Max.
-4.0 -3.6 -2.9 -14 2.0 0.016 ±20 -5.0 -55 to + 150
Units
A W W/°C V V/ns °C
Thermal Resistance Ratings
Parameter
RθJA Maximum Junction-to-Ambient
Typ.
Max.
62.5
Units
°C/W
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08/02/10
IRF7306QPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient V(BR)DSS RDS(ON) V GS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. Typ. Max. Units Conditions -30 V VGS = 0V, ID = -250µA -0.037 V/°C Reference to 25°C, ID = -1mA 0.10 VGS = -10V, I D = -1.8A Ω 0.16 VGS = -4.5V, ID = -1.5A -1.0 V VDS = VGS, I D = -250µA 2.5 S VDS = -24V, ID = -1.8A -1.0 VDS = -24V, VGS = 0V µA -25 VDS = -24V, VGS = 0V, TJ = 125°C -100 VGS = -20V nA 100 VGS = 20V 25 ID = -1.8A 2.9 nC VDS = -24V 9.0 VGS = -10V, See Fig. 6 and 12 11 VDD = -15V 17 ID = -1.8A ns 25 RG = 6.0Ω 18 RD = 8.2Ω, See Fig. 10 4.0 6.0 440 200 93 nH pF
D
Between lead tip and center of die contact VGS = 0V VDS = -25V = 1.0MHz, See Fig. 5
G S
Source-Drain Ratings and Characteristics
IS
I SM
V SD t rr Q rr ton
P arameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol -2.5 showing the A G integral reverse -14 p-n junction diode. S -1.0 V TJ = 25°C, IS = -1.8A, VGS = 0V 53 80 ns TJ = 25°C, IF = -1.8A 66 99 nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width ≤ 300µs; duty cycle ≤ 2%.
ISD ≤ -1.8A, di/dt ≤ 90A/µs, VDD ≤ V(BR)DSS,
TJ ≤150°C
Surface mounted on FR-4 board, t ≤ 10sec.
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IRF7306QPbF
100
VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTTOM - 4.5V TOP
100
TOP
-ID , Drain-to-Source Current (A)
10
-4.5V
-I D , Drain-to-Source Current (A)
VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTTOM - 4.5V
10
-4.5V
1 0.1 1
20µs PULSE WIDTH TJ = 25°C A
10 100
1 0.1
20µs PULSE WIDTH TJ = 150°C
1 10
100
A
-V , Drain-to-Source Voltage (V) DS
-VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
TJ = 25°C TJ = 150°C
R DS(on) , Drain-to-Source On Resistance (Normalized)
100
2.0
I D = -3.0A
-I D , Drain-to-Source Current (A)
1.5
10
1.0
0.5
1 4 5 6 7
VDS = -15V 20µs PULSE WIDTH
8 9 10
A
0.0 -60 -40 -20 0 20 40 60 80
VGS = -10V
100 120 140 160
A
-VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRF7306QPbF
1000
800
-VGS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd
20
ID = -3.0A VDS = -24V
16
C, Capacitance (pF)
600
Ciss Coss
12
400
8
200
Crss
4
0 1 10 100
A
0 0 5 10
FOR TEST CIRCUIT SEE FIGURE 12
15 20 25
A
-VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
-ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
10
TJ = 150°C TJ = 25°C
1
-ID , Drain Current (A) I
100us 10
1ms
0.1 0.0 0.3 0.6 0.9
VGS = 0V
1.2
A
1.5
1
TC = 25 °C TJ = 150 °C Single Pulse
1 10
10ms 100
-VSD , Source-to-Drain Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRF7306QPbF
4.0
V DS V GS
RD
-ID , Drain Current (A)
2.0
V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
-10
1.0
Fig 10a. Switching Time Test Circuit
VDS 90%
0.0
25
50
75
100
125
150
TC , Case Temperature ( °C)
Fig 9. Maximum Drain Current Vs. Ambient Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
100
Thermal Response (Z thJA )
D = 0.50 0.20 10 0.10 0.05 0.02 1 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJA + TA 0.001 0.01 0.1 1 10 100
0.1 0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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-
3.0
RG
D.U.T. V DD
5
IRF7306QPbF
Current Regulator Same Type as D.U.T.
50KΩ
-10 V
QGS VG
QG QGD
12V
.2µF
.3µF
VGS
-3mA
Charge
IG
ID
Current Sampling Resistors
Fig 12a. Basic Gate Charge Waveform
Fig 12b. Gate Charge Test Circuit
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+
D.U.T.
-
VDS
6
IRF7306QPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
-
+
RG VGS*
**
• dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test
+ -
V DD
*
*
Reverse Polarity for P-Channel ** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple ≤ 5%
[ ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 13. For P-Channel HEXFETS
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IRF7306QPbF
SO-8 Package Outline
Dimensions are shown in millimeters (inches)
D A 5 B
DIM A b INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574 MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
A1 .0040
6 E
8
7
6
5 H 0.25 [.010] A
c D E e e1 H
1
2
3
4
.050 BASIC .025 BASIC .2284 .0099 .016 0° .2440 .0196 .050 8°
1.27 BASIC 0.635 B ASIC 5.80 0.25 0.40 0° 6.20 0.50 1.27 8°
6X
e
K L y
e1
A
K x 45° C 0.10 [.004] y 8X c
8X b 0.25 [.010]
A1 CAB
8X L 7
NOT ES : 1. DIMENS IONING & TOLERANCING PER ASME Y14.5M-1994. 2. CONT ROLLING DIMENS ION: MILLIMET ER 3. DIMENS IONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS -012AA. 5 DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS . MOLD PROTRUS IONS NOT TO EXCEED 0.15 [.006]. 6 DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS . MOLD PROTRUS IONS NOT TO EXCEED 0.25 [.010]. 7 DIMENS ION IS T HE LENGT H OF LEAD FOR SOLDERING TO A S UBST RAT E. 3X 1.27 [.050] 6.46 [.255]
F OOTPRINT 8X 0.72 [.028]
8X 1.78 [.070]
SO-8 Part Marking
EXAMPLE: T HIS IS AN IRF7101 (MOSF ET ) DAT E CODE (YWW) P = DESIGNAT ES LEAD-FREE PRODUCT (OPT IONAL) Y = LAS T DIGIT OF T HE YEAR WW = WEEK A = AS S EMBLY S IT E CODE LOT CODE PART NUMBER
Notes: 1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/
INT ERNAT IONAL RECT IF IER LOGO
XXXX F7101
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IRF7306QPbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 ) 11.7 ( .461 )
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES: 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00 (12.992) MAX.
14.40 ( .566 ) 12.40 ( .488 ) NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.08/2010
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