IRF7401

PD - 9.1244C IRF7401 HEXFET® Power MOSFET l l l l l l l Generation V Technology Ultra Low On-Resistance N-Channel Mosfet Surface Mount Available in Tape & Reel Dynamic dv/dt Rating Fast Switching S S S G 1 8 7 A A D D D D 2 VDSS = 20V RDS(on) = 0.022Ω 3 6 4 5 T o p V ie w Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The SO-8 has been modified through a customized leadframe for enhanced thermal characteristics and multiple-die capability making it ideal in a variety of power applications. With these improvements, multiple devices can be used in an application with dramatically reduced board space. The package is designed for vapor phase, infra red, or wave soldering techniques. Power dissipation of greater than 0.8W is possible in a typical PCB mount application. S O -8 Absolute Maximum Ratings Parameter ID @ TA = 25°C ID @ TA = 25°C ID @ TA = 70°C IDM PD @TA = 25°C VGS dv/dt TJ, TSTG 10 Sec. Pulsed Drain Current, VGS @ 4.5V Continuous Drain Current, VGS @ 4.5V Continuous Drain Current, VGS @ 4.5V Pulsed Drain Current  Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt ‚ Junction and Storage Temperature Range Max. 10 8.7 7.0 35 2.5 0.02 ± 12 5.0 -55 to + 150 Units A W W/°C V V/ns °C Thermal Resistance Ratings Parameter RθJA Maximum Junction-to-Ambient„ Typ. ––– Max. 50 Units °C/W 02/13/01 IRF7401 Electrical Characteristics @ TJ = 25°C (unless otherwise specified) V(BR)DSS ∆V(BR)DSS/∆TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Min. 20 ––– ––– ––– 0.70 11 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.044 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 13 72 65 92 2.5 4.0 Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA 0.022 VGS = 4.5V, ID = 4.1A ƒ Ω 0.030 VGS = 2.7V, ID = 3.5A ƒ ––– V VDS = VGS, ID = 250µA ––– S VDS = 15V, ID = 4.1A 1.0 VDS = 16V, VGS = 0V µA 25 VDS = 16V, VGS = 0V, TJ = 125 °C 100 VGS = 12V nA -100 VGS = -12V 48 ID = 4.1A 5.1 nC VDS = 16V 20 VGS = 4.5V, See Fig. 6 and 12 ƒ ––– VDD = 10V ––– ID = 4.1A ns ––– RG = 6.0Ω ––– RD = 2.4Ω, See Fig. 10 ƒ D ––– nH ––– Between lead tip and center of die contact VGS = 0V VDS = 15V ƒ = 1.0MHz, See Fig. 5 G S ––– 1600 ––– ––– 690 ––– ––– 310 ––– pF Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 3.1 showing the A G integral reverse ––– ––– 35 p-n junction diode. S ––– ––– 1.0 V TJ = 25°C, IS = 2.0A, VGS = 0V ƒ ––– 39 59 ns TJ = 25°C, IF = 4.1A ––– 42 63 nC di/dt = 100A/µs ƒ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes:  Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ƒ Pulse width ≤ 300µs; duty cycle ≤ 2%. ‚ ISD ≤ 4.1A, di/dt ≤ 100A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C „ Surface mounted on FR-4 board, t ≤ 10sec. IRF7401 1000 V GS 7.5V 5.0V 4.0V 3.5V 3.0V 2.5V 2.0V BOT TOM 1.5V TO P 1000 I , D rain-to-S ou rc e C urre nt (A ) D I , D ra in-to-S o urc e C u rre nt (A ) D V GS 7.5V 5.0V 4.0V 3.5V 3.0V 2.5V 2.0V BOT TOM 1.5V TO P 100 100 10 10 1.5V 2 0 µ s P U LS E W ID TH TJ = 1 50 ° C A 0.1 1 10 100 1 .5V 1 0.1 1 2 0 µ s P U LS E W ID TH TA = 2 5 ° C A 10 100 1 V D S , D rain-to-S ourc e V olta g e ( V ) V D S , D rain-to-S ourc e V olta g e ( V ) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 2.0 R D S(on ) , D rain-to-S ourc e O n R esis tanc e (Norm alized) I D = 6 .9A I D , D rain-to -So urce C urre nt (A ) 1.5 100 TJ = 2 5 ° C TJ = 1 50 ° C 1.0 10 0.5 1 1.5 2.0 2.5 3.0 V DS = 15V 2 0 µ s P UL S E W ID TH 3.5 4.0 4.5 5.0 A 0.0 -60 -40 -20 0 20 40 60 80 V G S = 4 .5V 100 120 140 160 A V G S , G ate-to -So urce Vo lta g e (V) T J , Junction T em perature ( ° C ) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature IRF7401 3000 2500 V G S , G ate-to-S ource V oltage (V ) V GS C is s C rss C oss = = = = 0V, f = 1M H z C g s + C g d , C ds S H O R T E D C gd C ds + C gd 10 I D = 4 .1 A VD S = 1 6V 8 C , Capacitance (pF) 2000 C i ss 6 1500 C o ss 4 1000 C r ss 500 2 0 1 10 100 A 0 0 10 20 F O R TE S T C IR C U IT S E E FIG U R E 1 2 30 40 50 A V D S , D rain-to-S ourc e V olta g e ( V ) Q G , T otal G ate C har g e ( nC ) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 100 I S D , R everse Drain C urrent (A ) OPERATION IN THIS AREA LIMITED BY R DS(on) TJ = 25 ° C 10 I D , Drain Current (A) TJ = 15 0 ° C 100us 10 1ms 1 10ms 0.1 0.0 1.0 2.0 3.0 VG S = 0 V A 4.0 1 0.1 TA = 25 ° C TJ = 150 ° C Single Pulse 1 10 100 V S D , S ourc e-to-D rain V olta g e ( V ) VDS , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area IRF7401 10.0 VDS 8.0 RD VGS RG D.U.T. + I D , Drain Current (A) - VDD 6.0 4.5V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 4.0 Fig 10a. Switching Time Test Circuit 2.0 VDS 90% 0.0 25 50 75 100 125 150 TC , Case Temperature ( ° C) 10% VGS td(on) tr t d(off) tf Fig 9. Maximum Drain Current Vs. Ambient Temperature Fig 10b. Switching Time Waveforms 100 Thermal Response (Z thJA ) D = 0.50 0.20 0.10 0.05 0.02 1 0.01 SINGLE PULSE (THERMAL RESPONSE) 10 0.1 0.0001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJA + TA 0.01 0.1 1 10  P DM t1 t2 100 0.001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient IRF7401 Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 4.5V QGS VG QGD VGS 3mA D.U.T. + V - DS IG ID Charge Current Sampling Resistors Fig 12a. Basic Gate Charge Waveform Fig 12b. Gate Charge Test Circuit IRF7401 Peak Diode Recovery dv/dt Test Circuit D.U.T + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG VGS* ** • dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test + - VDD * * Reverse Polarity for P-Channel ** Use P-Channel Driver for P-Channel Measurements Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt [VDD] Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% [ ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 13. For N-Channel HEXFETS IRF7401 Package Outline SO-8 Outline Dimensions are shown in millimeters (inches) D -B- DIM 5 I NCHES MIN .0532 .0040 .014 .0075 .189 .150 MAX .0688 .0098 .018 .0098 .196 .157 MILLIMETERS MIN 1.35 0.10 0.36 0.19 4.80 3.81 MAX 1.75 0.25 0.46 0.25 4.98 3.99 A 6 5 H 0.25 ( .010 ) M AM 5 8 E -A- 7 A1 B C D E 1 2 3 4 e 6X K x 45 ° e1 A e e1 H K L θ .050 BASIC .025 BASIC .2284 .011 0.16 0° .2440 .019 .050 8° 0.72 ( .028 ) 8X 1.27 BASIC 0.635 BASIC 5.80 0.28 0.41 0° 6.20 0.48 1.27 8° θ 0.10 ( .004 ) L 8X 6 C 8X -CB 8X 0.25 ( .010 ) NOTES: A1 M CASBS RECOMMENDED FOOTPRINT 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M-1982. 2. CONTROLLING DIMENSION : INCH. 3. DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES). 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. 5 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS MOLD PROTRUSIONS NOT TO EXCEED 0.25 ( .006 ) . DIMENSIONS IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE.. 1.27 ( . 050 ) 3X 6.46 ( . 255 ) 1.78 ( .070 ) 8X Part Marking Information SO-8 EXAM PLE : TH IS IS AN IR F7 101 D ATE C O DE (YW W ) Y = LAST D IGIT O F TH E YEAR W W = W EEK XXXX W AFER LO T C O D E (LAST 4 D IG ITS) 31 2 IN TER N ATIO N AL R EC TIF IER LO G O F710 1 TOP PAR T N UM BER BO TTO M IRF7401 Tape & Reel Information SO-8 Dimensions are shown in millimeters (inches) 1.85 (.07 2) 4.1 0 (.1 61 ) 1.65 (.06 5) 3.9 0 (.1 54 ) 1.60 (.0 62 ) 1.50 (.0 59 ) 0 .35 (.01 3) 0 .25 (.01 0) T E R M IN AT IO N N U MBER 1 2.0 5 (.08 0 ) 1.9 5 (.07 7 ) 1 5 .55 (.2 18 ) 5 .45 (.2 15 ) 5 .3 0 (.2 08 ) 5 .1 0 (.2 01 ) 1 2.30 (.48 4 ) 1 1.70 (.46 1 ) F E E D D IR E C T IO N 8.10 (.3 18 ) 7.90 (.3 11 ) 6 .5 0 (.25 5) 6 .3 0 (.24 8) 2.6 0 (.1 02 ) 1.5 0 (.0 59 ) 2. 20 (.0 8 6) 2. 00 (.0 7 9) 13 .2 0 (.51 9) 12 .8 0 (.50 4) 1 5.40 (.60 7) 1 1.90 (.46 9) 2 3 3 0. 00 (13 .00 0) MAX. 5 0.0 0 (1.9 69 ) M IN . NO TES: 1 C O N FO R M S T O E IA -48 1-1 2 IN C LU D E S F LA N G E D IS T O R TIO N @ O U T E R E D G E 3 D IM E N S IO N S M E A S U R E D @ H U B 4 C O N TR O LL IN G D IM E N S IO N : M E T R IC 18 .4 0 (.7 24 ) MAX 3 1 4. 40 (.5 66 ) 1 2. 40 (.4 48 ) 3 WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 8/97