PD - 95724
IRF7401PbF
l l l l l l l l
Generation V Technology Ultra Low On-Resistance N-Channel Mosfet Surface Mount Available in Tape & Reel Dynamic dv/dt Rating Fast Switching Lead-Free
HEXFET® Power MOSFET
S S S G
1 8 7
A A D D D D
2
VDSS = 20V RDS(on) = 0.022Ω
3
6
4
5
Top View
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The SO-8 has been modified through a customized leadframe for enhanced thermal characteristics and multiple-die capability making it ideal in a variety of power applications. With these improvements, multiple devices can be used in an application with dramatically reduced board space. The package is designed for vapor phase, infra red, or wave soldering techniques. Power dissipation of greater than 0.8W is possible in a typical PCB mount application.
SO-8
Absolute Maximum Ratings
Parameter
ID @ TA = 25°C ID @ TA = 25°C ID @ TA = 70°C IDM PD @TA = 25°C VGS dv/dt TJ, TSTG 10 Sec. Pulsed Drain Current, VGS @ 4.5V Continuous Drain Current, VGS @ 4.5V Continuous Drain Current, VGS @ 4.5V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range
Max.
10 8.7 7.0 35 2.5 0.02 ± 12 5.0 -55 to + 150
Units
A W W/°C V V/ns °C
Thermal Resistance Ratings
Parameter
RθJA Maximum Junction-to-Ambient
Typ.
Max.
50
Units
°C/W 8/10/04
IRF7401PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
V(BR)DSS
∆V(BR)DSS/∆TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(ON) VGS(th) g fs IDSS IGSS Qg Qgs Qgd td(on) tr t d(off) tf LD LS Ciss Coss Crss
Min. 20 0.70 11
Typ. 0.044 13 72 65 92 2.5 4.0
Max. Units Conditions V VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA 0.022 VGS = 4.5V, ID = 4.1A Ω 0.030 VGS = 2.7V, ID = 3.5A V VDS = VGS, ID = 250µA S VDS = 15V, ID = 4.1A 1.0 VDS = 16V, VGS = 0V µA 25 VDS = 16V, VGS = 0V, T J = 125 °C 100 VGS = 12V nA -100 VGS = -12V 48 ID = 4.1A 5.1 nC VDS = 16V 20 VGS = 4.5V, See Fig. 6 and 12 VDD = 10V ID = 4.1A ns RG = 6.0Ω RD = 2.4Ω, See Fig. 10 nH pF
D
Between lead tip and center of die contact VGS = 0V VDS = 15V = 1.0MHz, See Fig. 5
G
S
1600 690 310
Source-Drain Ratings and Characteristics
IS
I SM
VSD t rr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 3.1 showing the A G integral reverse 35 p-n junction diode. S 1.0 V TJ = 25°C, IS = 2.0A, VGS = 0V 39 59 ns TJ = 25°C, IF = 4.1A 42 63 nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width ≤ 300µs; duty cycle ≤ 2%.
ISD ≤ 4.1A, di/dt ≤ 100A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
Surface mounted on FR-4 board, t ≤ 10sec.
IRF7401PbF
1000
VGS 7.5V 5.0V 4.0V 3.5V 3.0V 2.5V 2.0V BOTTOM 1.5V TOP
1000
I , Drain-to-Source Current (A) D
I , Drain-to-Source Current (A) D
VGS 7.5V 5.0V 4.0V 3.5V 3.0V 2.5V 2.0V BOTTOM 1.5V TOP
100
100
10
10
1.5V 20µs PULSE WIDTH TJ = 150°C A
1 10 100
1.5V
1 0.1
20µs PULSE WIDTH TA = 25°C A
10 100
1
1 0.1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
R DS(on) , Drain-to-Source On Resistance (Normalized)
I D = 6.9A
I D , Drain-to-Source Current (A)
1.5
100
TJ = 25°C TJ = 150°C
1.0
10
0.5
1 1.5 2.0 2.5 3.0
V DS = 15V 20µs PULSE WIDTH
3.5 4.0 4.5 5.0
A
0.0 -60 -40 -20
VGS = 4.5V
0 20 40 60
80 100 120 140 160
A
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
IRF7401PbF
3000
2500
V GS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd
10
I D = 4.1A VDS = 16V
8
C, Capacitance (pF)
2000
Ciss
6
1500
Coss
4
1000
Crss
500
2
0 1 10 100
A
0 0 10 20
FOR TEST CIRCUIT SEE FIGURE 12
30 40 50
A
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
TJ = 25°C TJ = 150°C
10
ID , Drain Current (A)
100us
10
1ms
1
10ms
0.1 0.0 1.0 2.0 3.0
VGS = 0V
A
4.0
1 0.1
TA = 25 ° C TJ = 150 ° C Single Pulse
1 10 100
VSD , Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
IRF7401PbF
10.0
VDS
8.0
RD
V GS RG
D.U.T.
+
ID , Drain Current (A)
- V DD
6.0
4.5V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
4.0
Fig 10a. Switching Time Test Circuit
2.0
VDS 90%
0.0 25 50 75 100 125 150
TC , Case Temperature ( ° C)
Fig 9. Maximum Drain Current Vs. Ambient Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
100
Thermal Response (Z thJA )
D = 0.50 0.20 0.10 0.05 0.02 1 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJA + TA 0.01 0.1 1 10 100
10
0.1 0.0001
0.001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
IRF7401PbF
Current Regulator Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
4.5V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
IG
ID
Charge
Current Sampling Resistors
Fig 12a. Basic Gate Charge Waveform
Fig 12b. Gate Charge Test Circuit
IRF7401PbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
-
+
RG VGS*
**
• dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test
+ -
VDD
*
*
Reverse Polarity for P-Channel ** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple ≤ 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 13. For N-Channel HEXFETS
IRF7401PbF
SO-8 Package Outline
Dimensions are shown in millimeters (inches)
D A 5 B
DIM A b INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574 MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
A1 .0040
8 6 E 1
7
6
5 H 0.25 [.010] A
c D E e e1 H K L y
2
3
4
.050 BASIC .025 BASIC .2284 .0099 .016 0° .2440 .0196 .050 8°
1.27 BASIC 0.635 BASIC 5.80 0.25 0.40 0° 6.20 0.50 1.27 8°
6X
e
e1 A C 0.10 [.004] 8X b 0.25 [.010] A1 CAB y
K x 45°
8X L 7
8X c
NOT ES : 1. DIMENS IONING & TOLERANCING PER ASME Y14.5M-1994. 2. CONT ROLLING DIMENS ION: MILLIMET ER 3. DIMENS IONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS -012AA. 5 DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS . MOLD PROTRUS IONS NOT TO EXCEED 0.15 [.006]. 6 DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS . MOLD PROTRUS IONS NOT TO EXCEED 0.25 [.010]. 7 DIMENS ION IS T HE LENGT H OF LEAD FOR SOLDERING TO A S UBST RAT E. 3X 1.27 [.050]
F OOTPRINT 8X 0.72 [.028]
6.46 [.255]
8X 1.78 [.070]
SO-8 Part Marking
EXAMPLE: T HIS IS AN IRF7101 (MOS FET ) DAT E CODE (YWW) P = DES IGNAT ES LEAD-FREE PRODUCT (OPT IONAL) Y = LAS T DIGIT OF T HE YEAR WW = WEEK A = AS S EMBLY S IT E CODE LOT CODE PART NUMBER
INT ERNAT IONAL RECT IFIER LOGO
XXXX F7101
IRF7401PbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 ) 11.7 ( .461 )
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES: 1 . CONTROLLING DIMENSION : MILLIMETER. 2 . ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 3 . OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00 (12.992) MAX.
14.40 ( .566 ) 12.40 ( .488 ) NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualifications Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.08/04
工商网监
湘ICP备2023018690号
