PD - 96124
IRF7416QPbF
HEXFET® Power MOSFET
l l l l l l l l
Advanced Process Technology Ultra Low On-Resistance P Channel MOSFET Surface Mount Available in Tape & Reel 150°C Operating Temperature Automotive [Q101] Qualified Lead-Free
S
1 2 3 4
8 7
A D D D D
S
S G
VDSS = -30V RDS(on) = 0.02Ω
6 5
Top View
Description
Specifically designed for Automotive applications, these HEXFET® Power MOSFET's in package utilize the lastest processing techniques to achieve extremely low onresistance per silicon area. Additional features of these Automotive qualified HEXFET Power MOSFET's are a 150°C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These benefits combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. The efficient SO-8 package provides enhanced thermal characteristics making it ideal in a variety of power applications. This surface mount SO-8 can dramatically reduce board space and is also available in Tape & Reel.
SO-8
Absolute Maximum Ratings
Parameter
I D @ TA = 25°C I D @ TA = 70°C I DM P D @TA = 25°C VGS EAS dv/dt TJ, TSTG Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ - 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Peak Diode Recovery dv/dt Junction and Storage Temperature Range
Max.
-10 -7.1 -45 2.5 0.02 ± 20 370 -5.0 -55 to + 150
Units
A W
mW/°C
V mJ V/ns °C
Thermal Resistance Ratings
Parameter
R θJA Maximum Junction-to-Ambient
Typ.
Max.
50
Units
°C/W
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1
08/29/07
IRF7416QPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
V(BR)DSS
∆V(BR)DSS/∆TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(on) VGS(th) g fs IDSS IGSS Qg Qgs Qgd t d(on) tr t d(off) tf Ciss Coss Crss
Min. -30 -1.0 5.6
Typ. Max. Units Conditions V VGS = 0V, ID = -250µA -0.024 V/°C Reference to 25°C, ID = -1mA 0.020 VGS = -10V, ID = -5.6A Ω 0.035 VGS = -4.5V, ID = -2.8A V VDS = VGS, ID = -250µA S VDS = -10V, ID = -2.8A -1.0 VDS = -24V, VGS = 0V µA -25 VDS = -24V, VGS = 0V, T J = 125°C -100 VGS = -20V nA 100 VGS = 20V 61 92 ID = -5.6A 8.0 12 nC VDS = -24V 22 32 VGS = -10V, See Fig. 6 and 9 18 VDD = -15V 49 ID = -5.6A ns 59 RG = 6.2Ω 60 RD = 2.7Ω, See Fig. 10 1700 VGS = 0V 890 pF VDS = -25V 410 = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
VSD t rr Q rr
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge
Min. Typ. Max. Units 56 99 -3.1 -45 -1.0 85 150 V ns nC A
Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25°C, IS = -5.6A, V GS = 0V TJ = 25°C, IF = -5.6A di/dt = 100A/µs
D
G S
Notes:
Repetitive rating; pulse width limited by Starting TJ = 25°C, L = 25mH
max. junction temperature. ( See fig. 11 )
ISD ≤ -5.6A, di/dt ≤ 100A/µs, VDD ≤ V(BR)DSS,
T J ≤ 150°C
RG = 25Ω, IAS = -5.6A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Surface mounted on FR-4 board, t ≤ 10sec.
2
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IRF7416QPbF
100
VGS - 15V - 10V - 7.0V - 5.5V - 4.5V - 4.0V - 3.5V BOTTOM - 3.0V TOP
100
-I D , Drain-to-Source Current (A)
-I D , Drain-to-Source Current (A)
VGS - 15V - 10V - 7.0V - 5.5V - 4.5V - 4.0V - 3.5V BOTTOM - 3.0V TOP
10
10
-3.0V
-3.0V 20µs PULSE WIDTH TJ = 25°C A
0.1 1 10
1
1 0.1 1
20µs PULSE WIDTH TJ = 150°C A
10
-VDS , Drain-to-Source Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.0
TJ = 25°C TJ = 150°C
10
R DS(on) , Drain-to-Source On Resistance (Normalized)
I D = -5.6A
-ID , Drain-to-Source Current (A)
1.5
1.0
0.5
1 3.0 3.5 4.0
VDS = -10V 20µs PULSE WIDTH
4.5 5.0 5.5
A
0.0 -60 -40 -20 0 20 40 60 80
VGS = -10V
100 120 140 160
A
-VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRF7416QPbF
4000
-VGS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd
20
I D = -5.6A VDS = -24V VDS = -15V
16
C, Capacitance (pF)
3000
Ciss
2000
12
Coss
8
1000
Crss
4
0 1 10 100
A
0 0 20 40
FOR TEST CIRCUIT SEE FIGURE 9
60 80
100
A
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
-ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
-ID , Drain Current (A) I
100us
TJ = 150°C
10
TJ = 25°C
10 1ms
1 0.4 0.6 0.8 1.0
VGS = 0V
A
1.2
1 0.1
TA = 25 °C TJ = 150 ° C Single Pulse
1 10
10ms
100
-VSD , Source-to-Drain Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF7416QPbF
QG
VDS V GS RG -10V
RD
-10V
VG
Charge
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 9a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
Fig 10a. Switching Time Test Circuit
50KΩ 12V .2µF .3µF
td(on)
tr
t d(off)
tf
VGS 10%
+ D.U.T. VDS
VGS
-3mA
90% VDS
IG ID
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
100
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJA )
D = 0.50 0.20 0.10 0.05 0.02 1 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJA + TA 0.1 1 10 100
10
0.1 0.0001
0.001
0.01
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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+
-
QGS
QGD
D.U.T. VDD
5
IRF7416QPbF
1000
VDS
L
EAS , Single Pulse Avalanche Energy (mJ)
RG
D.U.T
IAS
-20V
DRIVER
0.01Ω
VDD A
800
ID -2.5A -4.5A BOTTOM -5.6A TOP
tp
600
400
15V
Fig 12a. Unclamped Inductive Test Circuit
I AS
200
0
25
50
75
100
125
150
Starting TJ , Junction Temperature (o C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
tp V(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
6
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IRF7416QPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
-
+
RG VGS*
**
• dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test
+ -
VDD
*
*
Reverse Polarity for P-Channel ** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive P.W. Period D= P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[ VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple ≤ 5%
[ ISD]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 13. For P-Channel HEXFETS
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IRF7416QPbF
SO-8 Package Outline
Dimensions are shown in millimeters (inches)
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SO-8 Part Marking
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Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
8
IRF7416QPbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 ) 11.7 ( .461 )
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES: 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00 (12.992) MAX.
14.40 ( .566 ) 12.40 ( .488 ) NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR’s Web site.
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IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.08/2007
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