0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
IRF7805ZPBF

IRF7805ZPBF

  • 厂商:

    IRF

  • 封装:

  • 描述:

    IRF7805ZPBF - High Frequency Point-of-Load Synchronous Buck Converter for Applications in Networking...

  • 详情介绍
  • 数据手册
  • 价格&库存
IRF7805ZPBF 数据手册
PD - 96011A IRF7805ZPbF HEXFET® Power MOSFET Applications l High Frequency Point-of-Load Synchronous Buck Converter for Applications in Networking & Computing Systems. l Lead-Free S S S G VDSS RDS(on) max 30V 6.8m @VGS = 10V : 8 7 Qg (typ.) 18nC 1 2 3 4 Benefits l Very Low RDS(on) at 4.5V VGS l Ultra-Low Gate Impedance l Fully Characterized Avalanche Voltage and Current l 100% tested for Rg A A D D D D 6 5 Top View SO-8 Absolute Maximum Ratings Parameter VDS VGS ID @ TA = 25°C ID @ TA = 70°C IDM PD @TA = 25°C PD @TA = 70°C TJ TSTG Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Max. 30 ± 20 16 12 120 2.5 1.6 0.02 -55 to + 150 Units V f f c A W W/°C °C Linear Derating Factor Operating Junction and Storage Temperature Range Thermal Resistance RθJL RθJA g Junction-to-Ambient fg Junction-to-Drain Lead Parameter Typ. ––– ––– Max. 20 50 Units °C/W Notes  through … are on page 10 www.irf.com 1 06/30/05 IRF7805ZPbF Static @ TJ = 25°C (unless otherwise specified) Parameter BVDSS ∆ΒVDSS/∆TJ RDS(on) VGS(th) ∆VGS(th) IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Parameter Single Pulse Avalanche Energy Avalanche Current Min. Typ. Max. Units 30 ––– ––– ––– 1.35 ––– ––– ––– ––– ––– 64 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 0.023 5.5 7.0 ––– - 4.7 ––– ––– ––– ––– ––– 18 4.7 1.6 6.2 5.5 7.8 10 1.0 11 10 14 3.7 2080 480 220 ––– ––– 6.8 8.7 2.25 ––– 1.0 150 100 -100 ––– 27 ––– ––– ––– ––– ––– ––– 2.1 ––– ––– ––– ––– ––– ––– ––– Typ. ––– ––– nC Ω nC V Conditions VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 16A V VGS = 4.5V, ID = 13A VDS = VGS, ID = 250µA e e mV/°C µA VDS = 24V, VGS = 0V nA S VDS = 24V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V VDS = 15V, ID = 12A VDS = 15V VGS = 4.5V ID = 12A See Fig. 16 VDS = 16V, VGS = 0V VDD = 15V, VGS = 4.5V ID = 12A ns e Clamped Inductive Load VGS = 0V VDS = 15V ƒ = 1.0MHz Max. 72 12 Units mJ A pF Avalanche Characteristics EAS IAR ™ d Diode Characteristics Parameter IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units ––– ––– ––– ––– ––– ––– ––– ––– 29 20 3.1 A 120 1.0 44 30 V ns nC Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25°C, IS = 12A, VGS = 0V TJ = 25°C, IF = 12A, VDD = 15V di/dt = 100A/µs Ù e Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) e 2 www.irf.com IRF7805ZPbF 1000 TOP 15V 10V 4.5V 3.75V 3.25V 3.0V 2.75V BOTTOM 2.5V VGS 1000 ID, Drain-to-Source Current (A) 100 ID, Drain-to-Source Current (A) 100 VGS 15V 10V 4.5V 3.75V 3.25V 3.0V 2.75V BOTTOM 2.5V TOP 10 10 1 2.5V 20µs PULSE WIDTH Tj = 25°C 2.5V 20µs PULSE WIDTH Tj = 150°C 0.01 0.1 1 10 100 0.1 0.01 0.1 1 1 10 100 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 2.0 RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (Α) ID = 16A VGS = 10V 100 1.5 T J = 150°C 10 1.0 T J = 25°C 1 2.5 3.0 VDS = 15V 20µs PULSE WIDTH 3.5 4.0 4.5 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 VGS, Gate-to-Source Voltage (V) T J , Junction Temperature (°C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRF7805ZPbF 10000 C rss = C gd VGS, Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C oss = C ds + C gd 12 ID= 12A 10 8 6 4 2 0 VDS= 24V VDS= 15V C, Capacitance (pF) Ciss 1000 Coss Crss 100 1 10 100 0 10 20 30 40 VDS, Drain-to-Source Voltage (V) QG Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000.0 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) 100.0 T J = 150°C 10.0 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 100 10 100µsec 1msec 1 Tc = 25°C Tj = 150°C Single Pulse 1.0 10.0 VDS , Drain-toSource Voltage (V) 10msec 1.0 T J = 25°C VGS = 0V 0.1 0.2 0.4 0.6 0.8 1.0 1.2 VSD, Source-toDrain Voltage (V) 0.1 100.0 Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF7805ZPbF 16 2.2 VGS(th) Gate threshold Voltage (V) 2.0 ID , Drain Current (A) 12 1.8 ID = 250µA 1.6 8 1.4 4 1.2 0 25 50 75 100 125 150 1.0 -75 -50 -25 0 25 50 75 100 125 150 T J , Junction Temperature (°C) T J , Temperature ( °C ) Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10. Threshold Voltage Vs. Temperature 100 Thermal Response ( Z thJA ) 10 D = 0.50 0.20 0.10 0.05 1 0.02 0.01 τJ τJ τ1 R1 R1 τ2 R2 R2 R3 R3 τ3 R4 R4 τC τ τ4 Ri (°C/W) 1.081 12.880 24.191 11.862 τi (sec) 0.000437 0.213428 2.335 52 0.1 τ1 τ2 τ3 τ4 0.01 Ci= τi/Ri Ci i/Ri SINGLE PULSE ( THERMAL RESPONSE ) Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc 0.001 0.01 0.1 1 10 100 0.001 1E-006 1E-005 0.0001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient www.irf.com 5 IRF7805ZPbF RDS(on), Drain-to -Source On Resistance ( Ω) 0.03 300 EAS, Single Pulse Avalanche Energy (mJ) 250 ID 6.0A 6.9A BOTTOM 12A TOP 0.02 200 150 0.01 T J = 125°C 100 TJ = 25°C 0.00 2.0 4.0 6.0 8.0 10.0 50 0 25 50 75 100 125 150 VGS, Gate-to-Source Voltage (V) Starting T J, Junction Temperature (°C) Fig 12. On-Resistance Vs. Gate Voltage Fig 13c. Maximum Avalanche Energy Vs. Drain Current LD VDS 15V VDS L DRIVER + VDD - RG VGS 20V D.U.T IAS tp + V - DD A D.U.T VGS Pulse Width < 1µs Duty Factor < 0.1% 0.01Ω Fig 13a. Unclamped Inductive Test Circuit V(BR)DSS tp Fig 14a. Switching Time Test Circuit 90% VDS 10% VGS I AS td(on) tr td(off) tf Fig 13b. Unclamped Inductive Waveforms Fig 14b. Switching Time Waveforms 6 www.irf.com IRF7805ZPbF D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt ‚ - - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD VDD + - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs Current Regulator Same Type as D.U.T. Id Vds Vgs 50KΩ 12V .2µF .3µF D.U.T. VGS 3mA + V - DS Vgs(th) IG ID Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr Fig 16. Gate Charge Test Circuit Fig 17. Gate Charge Waveform www.irf.com 7 IRF7805ZPbF Power MOSFET Selection for Non-Isolated DC/DC Converters Control FET Special attention has been given to the power losses in the switching elements of the circuit - Q1 and Q2. Power losses in the high side switch Q1, also called the Control FET, are impacted by the Rds(on) of the MOSFET, but these conduction losses are only about one half of the total losses. Power losses in the control switch Q1 are given by; Synchronous FET The power loss equation for Q2 is approximated by; * Ploss = Pconduction + P + Poutput drive Ploss = Irms × Rds(on) + ( g × Vg × f ) Q ( 2 ) Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput This can be expanded and approximated by; ⎛Q ⎞ + ⎜ oss × Vin × f + (Qrr × Vin × f ) ⎝2 ⎠ *dissipated primarily in Q1. For the synchronous MOSFET Q2, Rds(on) is an important characteristic; however, once again the importance of gate charge must not be overlooked since it impacts three critical areas. Under light load the MOSFET must still be turned on and off by the control IC so the gate drive losses become much more significant. Secondly, the output charge Qoss and reverse recovery charge Qrr both generate losses that are transfered to Q1 and increase the dissipation in that device. Thirdly, gate charge will impact the MOSFETs’ susceptibility to Cdv/dt turn on. The drain of Q2 is connected to the switching node of the converter and therefore sees transitions between ground and Vin. As Q1 turns on and off there is a rate of change of drain voltage dV/dt which is capacitively coupled to the gate of Q2 and can induce a voltage spike on the gate that is sufficient to turn the MOSFET on, resulting in shoot-through current . The ratio of Qgd/Qgs1 must be minimized to reduce the potential for Cdv/dt turn on. Ploss = (Irms 2 × Rds(on ) ) ⎛ Qgs 2 Qgd ⎞⎛ ⎞ +⎜I × × Vin × f ⎟ + ⎜ I × × Vin × f ⎟ ig ig ⎝ ⎠⎝ ⎠ + (Qg × Vg × f ) + ⎛ Qoss × Vin × f ⎞ ⎝2 ⎠ This simplified loss equation includes the terms Qgs2 and Qoss which are new to Power MOSFET data sheets. Qgs2 is a sub element of traditional gate-source charge that is included in all MOSFET data sheets. The importance of splitting this gate-source charge into two sub elements, Qgs1 and Qgs2, can be seen from Fig 16. Qgs2 indicates the charge that must be supplied by the gate driver between the time that the threshold voltage has been reached and the time the drain current rises to Idmax at which time the drain voltage begins to change. Minimizing Qgs2 is a critical factor in reducing switching losses in Q1. Qoss is the charge that must be supplied to the output capacitance of the MOSFET during every switching cycle. Figure A shows how Qoss is formed by the parallel combination of the voltage dependant (nonlinear) capacitance’s Cds and Cdg when multiplied by the power supply input buss voltage. 8 Figure A: Qoss Characteristic www.irf.com IRF7805ZPbF SO-8 Package Outline Dimensions are shown in millimeters (inches) 9 6 ' & ! % " $ 7 9DH 6 6 i DI8C@T HDI H6Y $"! %'' #  " &$  '( (' ! ('  (%' HDGGDH@U@ST HDI H6Y "$ &$   ""  ( #' !$ $ !$ $ % @ $ # C !$Ãb dà 6 p 9 @ r r C  #(&  $&# $ÃÃ76TD8 !$ÃÃ76TD8 !!'# !## ((  % à  (% $ Ã'ƒ "' # !&ÃÃ76TD8 %"$ÃÃ76TD8 $' %! !$ # à $ !& Ã'ƒ %Y r F G ’ r 6 FÑÃ#$ƒ 8  Ãb#dà ’ 'YÃG & 'YÃp 'YÃi !$Ãb dà 6 867 IPU@T) ÃÃ9DH@ITDPIDIBÃÉÃUPG@S6I8DIBÃQ@SÃ6TH@Ã` #$H ((# !ÃÃ8PIUSPGGDIBÃ9DH@ITDPI)ÃHDGGDH@U@S "ÃÃ9DH@ITDPITÃ6S@ÃTCPXIÃDIÃHDGGDH@U@STÃbDI8C@Td #ÃÃPVUGDI@Ã8PIAPSHTÃUPÃE@9@8ÃPVUGDI@ÃHT !66 $ÃÃÃ9DH@ITDPIÃ9P@TÃIPUÃDI8GV9@ÃHPG9ÃQSPUSVTDPIT ÃÃÃÃÃHPG9ÃQSPUSVTDPITÃIPUÃUPÃ@Y8@@9à $Ãb%d %ÃÃÃ9DH@ITDPIÃ9P@TÃIPUÃDI8GV9@ÃHPG9ÃQSPUSVTDPIT ÃÃÃÃÃHPG9ÃQSPUSVTDPITÃIPUÃUPÃ@Y8@@9Ã!$Ãb d &ÃÃÃ9DH@ITDPIÃDTÃUC@ÃG@IBUCÃPAÃG@69ÃAPSÃTPG9@SDIBÃUP ÃÃÃÃÃ6ÃTV7TUS6U@ APPUQSDIU 'YÃ&!Ãb!'d %#%Ãb!$$d "Yà !&Ãb$d 'Yà &'Ãb&d SO-8 Part Marking @Y6HQG@)ÃUCDTÃDTÃ6IÃDSA&  ÃHPTA@U DIU@SI6UDPI6G S@8UDAD@S GPBP www.irf.com ;;;; ) 96U@Ã8P9@Ã`XX QÃ2Ã9@TDBI6U@TÃG@69AS@@ QSP9V8UÃPQUDPI6G `Ã2ÃG6TUÃ9DBDUÃPAÃUC@Ã`@6S XXÃ2ÃX@@F 6Ã2Ã6TT@H7G`ÃTDU@Ã8P9@ GPUÃ8P9@ Q6SUÃIVH7@S 9 IRF7805ZPbF SO-8 Tape and Reel Dimensions are shown in millimeters (inches) TERMINAL NUMBER 1 12.3 ( .484 ) 11.7 ( .461 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES: 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 330.00 (12.992) MAX. 14.40 ( .566 ) 12.40 ( .488 ) NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-481 & EIA-541. Notes:  Repetitive rating; pulse width limited by max. junction temperature. ‚ Starting TJ = 25°C, L = 0.94mH RG = 25Ω, IAS = 12A. ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%. „ When mounted on 1 inch square copper board … Rθ is measured at TJ approximately 90°C Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualifications Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.06/05 10 www.irf.com
IRF7805ZPBF
1. 物料型号:IRF7805ZPbF,这是一个由International Rectifier生产的功率MOSFET。

2. 器件简介:IRF7805ZPbF是一个高频同步降压转换器,适用于网络和计算系统中的点负载应用。它是一个无铅产品。

3. 引脚分配:文档中提到了SO-8封装,这是一种常见的8脚封装方式。

4. 参数特性: - 漏源电压(Vpss):30V - 最大连续漏源导通电阻(Rps(on) max):6.8mΩ@VGs = 10V - 门极电荷(Qg(typ.)):18nC

5. 功能详解: - 该器件具有非常低的漏源导通电阻(RDS(on))在4.5V VGS下,超低的栅极阻抗,并且完全表征了雪崩电压和电流,100%测试了Rg。 - 提供了详细的电气特性参数,包括击穿电压、导通电阻、门极阈值电压等。

6. 应用信息:适用于网络和计算系统中的点负载同步降压转换器应用。

7. 封装信息:SO-8封装,这是一种表面贴装的8脚封装。
IRF7805ZPBF 价格&库存

很抱歉,暂时无法提供与“IRF7805ZPBF”相匹配的价格&库存,您可以联系我们找货

免费人工找货