IRF7832Z

PD - 96975A IRF7832Z HEXFET® Power MOSFET Applications l Synchronous MOSFET for Notebook Processor Power l Synchronous Rectifier MOSFET for Isolated DC-DC Converters Benefits l Very Low RDS(on) at 4.5V VGS l Ultra-Low Gate Impedance l Fully Characterized Avalanche Voltage and Current l 20V VGS Max. Gate Rating l 100% tested for Rg VDSS 30V 3.8m:@VGS = 10V A A D D D D RDS(on) max Qg 30nC S S S G 1 2 3 4 8 7 6 5 Top View SO-8 Absolute Maximum Ratings Parameter VDS VGS ID @ TA = 25°C ID @ TA = 70°C IDM PD @TA = 25°C PD @TA = 70°C TJ TSTG Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Max. 30 ± 20 21 17 160 2.5 1.6 0.02 -55 to + 150 Units V c A W W/°C °C Power Dissipation Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range Thermal Resistance RθJL RθJA g Junction-to-Ambient fg Junction-to-Drain Lead Parameter Typ. ––– ––– Max. 20 50 Units °C/W Notes  through … are on page 10 www.irf.com 1 06/30/05 IRF7832Z Static @ T J = 2 5°C (unless otherwise specified) Parameter BV DSS ∆Β V DSS / ∆T J R DS(on) V GS(th) ∆V GS(th) I DSS I GSS gfs Qg Q gs1 Q gs2 Q gd Q godr Q sw Q oss Rg t d(on) tr t d(off) tf C iss C oss C rss Drain-to-Source Breakdown Voltage B reakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Q gs2 + Q gd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. 30 ––– ––– ––– 1.35 ––– ––– ––– ––– ––– 80 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. Max. Units ––– 0.023 3.1 3.7 ––– -5.5 ––– ––– ––– ––– ––– 30 7.9 2.6 11 8.5 13.6 19 1.2 14 15 18 5.6 3860 840 370 ––– ––– 3.8 4.5 2.35 ––– 1.0 150 100 -100 ––– 45 ––– ––– ––– ––– ––– ––– 1.9 ––– ––– ––– ––– ––– ––– ––– pF V GS = 0 V V DS = 15V ns nC Ω nC V DS = 15V V GS = 4 .5V ID = 16A S nA V mV/°C µA V mΩ Conditions V GS = 0 V, I D = 2 50µA V GS = 1 0V, ID = 20A V GS = 4 .5V, I D = 1 6A V/°C Reference to 25°C, I D = 1 mA e e V DS = V GS , ID = 250µA V DS = 24V, V GS = 0V V DS = 24V, V GS = 0V, TJ = 125°C V GS = 2 0V V GS = -20V V DS = 15V, I D = 1 6A See Fig. 16 V DS = 16V, V GS = 0V V DD = 15V, V GS = 4.5V ID = 16A Clamped Inductive Load ƒ = 1.0MHz Avalanche Characteristics E AS I AR Parameter Single Pulse Avalanche Energy Avalanche Current ™ d Min. ––– ––– ––– ––– ––– Typ. ––– ––– Max. 350 16 Units mJ A Diode Characteristics P arameter IS I SM V SD t rr Q rr t on Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Typ. Max. Units ––– ––– ––– 16 29 3.1 A 160 1.0 24 44 V ns nC Conditions MOSFET symbol showing the integral reverse G D Ù S p-n junction diode. TJ = 2 5°C, IS = 1 6A, V GS = 0V TJ = 2 5°C, IF = 16A, V DD = 1 5V di/dt = 500A/µs e e Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2 www.irf.com IRF7832Z 1000 TOP VGS 10V 5.0V 4.5V 3.5V 3.0V 2.7V 2.5V 2.3V 1000 TOP VGS 10V 5.0V 4.5V 3.5V 3.0V 2.7V 2.5V 2.3V ID, Drain-to-Source Current (A) 10 BOTTOM ID, Drain-to-Source Current (A) 100 100 BOTTOM 1 10 0.1 2.3V ≤60µs PULSE WIDTH Tj = 25°C 1 100 1000 0.1 10 2.3V ≤60µs PULSE WIDTH Tj = 150°C 10 100 1000 0.01 0.1 1 1 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 2.0 RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (Α) ID = 21A VGS = 10V 100 1.5 10 TJ = 150°C T J = 25°C 1.0 1 VDS = 15V ≤60µs PULSE WIDTH 1 2 3 4 0.1 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 T J , Junction Temperature (°C) VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature www.irf.com 3 IRF7832Z 100000 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd 6.0 ID= 16A VGS, Gate-to-Source Voltage (V) 5.0 4.0 3.0 2.0 1.0 0.0 VDS= 24V VDS= 15V C, Capacitance(pF) 10000 Ciss 1000 Coss Crss 100 1 10 VDS, Drain-to-Source Voltage (V) 100 0 10 20 30 40 QG Total Gate Charge (nC) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) 100µsec 100 T J = 150°C 10 T J = 25°C ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 100 10 10msec 1msec 1 VGS = 0V 0.1 0.2 0.4 0.6 0.8 1.0 1.2 VSD, Source-to-Drain Voltage (V) 1 T A = 25°C Tj = 150°C Single Pulse 0 1 10 100 0.1 VDS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF7832Z 25 VGS(th) Gate threshold Voltage (V) 2.5 20 ID, Drain Current (A) 2.0 ID = 250µA 1.5 15 10 1.0 5 0 25 50 75 100 125 150 T A , Ambient Temperature (°C) 0.5 -75 -50 -25 0 25 50 75 100 125 150 T J , Temperature ( °C ) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Threshold Voltage vs. Temperature 100 10 Thermal Response ( Z thJA ) 1 D = 0.50 0.20 0.10 0.05 0.02 0.01 τJ R1 R1 τJ τ1 τ2 R2 R2 R3 R3 τ3 τC τ τ3 Ri (°C/W) τi (sec) 5.6971 0.015296 28.314 16 PDM 0.1 τ1 τ2 0.01 Ci= τi /Ri Ci i/Ri 1.214900 40.40000 t1 t2 0.001 SINGLE PULSE ( THERMAL RESPONSE ) 0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJA + TA 1 10 100 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient www.irf.com 5 IRF7832Z RDS(on), Drain-to -Source On Resistance (m Ω) 10 ID = 21A 8 1600 EAS , Single Pulse Avalanche Energy (mJ) 1400 1200 1000 800 600 400 200 0 ID TOP 1.0A 1.4A BOTTOM 16A 6 T J = 125°C 4 T J = 25°C 2 2 4 6 8 10 25 50 75 100 125 150 VGS, Gate -to -Source Voltage (V) Starting T J , Junction Temperature (°C) Fig 12. On-Resistance vs. Gate Voltage Fig 13. Maximum Avalanche Energy vs. Drain Current Current Regulator Same Type as D.U.T. V(BR)DSS 15V tp 12V .2µF DRIVER 50KΩ .3µF VDS L D.U.T. RG 20V VGS + V - DS D.U.T IAS tp + - VDD A VGS 0.01Ω I AS 3mA Fig 14. Unclamped Inductive Test Circuit and Waveform LD VDS IG ID Current Sampling Resistors Fig 15. Gate Charge Test Circuit + VDD - 90% VDS D.U.T VGS Pulse Width < 1µs Duty Factor < 0.1% 10% VGS td(on) tr td(off) tf Fig 16. Switching Time Test Circuit Fig 17. Switching Time Waveforms 6 www.irf.com IRF7832Z D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt ‚ - - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD VDD + - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 18. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs Id Vds Vgs Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig 19. Gate Charge Waveform www.irf.com 7 IRF7832Z Power MOSFET Selection for Non-Isolated DC/DC Converters Control FET Special attention has been given to the power losses in the switching elements of the circuit - Q1 and Q2. Power losses in the high side switch Q1, also called the Control FET, are impacted by the Rds(on) of the MOSFET, but these conduction losses are only about one half of the total losses. Power losses in the control switch Q1 are given by; Synchronous FET The power loss equation for Q2 is approximated by; * Ploss = Pconduction + P + Poutput drive Ploss = Irms × Rds(on) + ( g × Vg × f ) Q ( 2 ) Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput This can be expanded and approximated by; ⎛Q ⎞ + ⎜ oss × Vin × f + (Qrr × Vin × f ) ⎝2 ⎠ *dissipated primarily in Q1. For the synchronous MOSFET Q2, Rds(on) is an important characteristic; however, once again the importance of gate charge must not be overlooked since it impacts three critical areas. Under light load the MOSFET must still be turned on and off by the control IC so the gate drive losses become much more significant. Secondly, the output charge Qoss and reverse recovery charge Qrr both generate losses that are transfered to Q1 and increase the dissipation in that device. Thirdly, gate charge will impact the MOSFETs’ susceptibility to Cdv/dt turn on. The drain of Q2 is connected to the switching node of the converter and therefore sees transitions between ground and Vin. As Q1 turns on and off there is a rate of change of drain voltage dV/dt which is capacitively coupled to the gate of Q2 and can induce a voltage spike on the gate that is sufficient to turn the MOSFET on, resulting in shoot-through current . The ratio of Qgd/Qgs1 must be minimized to reduce the potential for Cdv/dt turn on. Ploss = (Irms 2 × Rds(on ) ) ⎛ Qgs 2 Qgd ⎞⎛ ⎞ +⎜I × × Vin × f ⎟ + ⎜ I × × Vin × f ⎟ ig ig ⎝ ⎠⎝ ⎠ + (Qg × Vg × f ) + ⎛ Qoss × Vin × f ⎞ ⎝2 ⎠ This simplified loss equation includes the terms Qgs2 and Qoss which are new to Power MOSFET data sheets. Qgs2 is a sub element of traditional gate-source charge that is included in all MOSFET data sheets. The importance of splitting this gate-source charge into two sub elements, Qgs1 and Qgs2, can be seen from Fig 16. Qgs2 indicates the charge that must be supplied by the gate driver between the time that the threshold voltage has been reached and the time the drain current rises to Idmax at which time the drain voltage begins to change. Minimizing Qgs2 is a critical factor in reducing switching losses in Q1. Qoss is the charge that must be supplied to the output capacitance of the MOSFET during every switching cycle. Figure A shows how Qoss is formed by the parallel combination of the voltage dependant (nonlinear) capacitance’s Cds and Cdg when multiplied by the power supply input buss voltage. 8 Figure A: Qoss Characteristic www.irf.com IRF7832Z SO-8 Package Outline 9 6 ' & ! % " $ 7 (Dimensions are shown in millimeters (inches) 9DH 6 6 i DI8C@T HDI H6Y $"! %'' #  " &$  '( (' ! ('  (%' HDGGDH@U@ST HDI H6Y "$ &$   ""  ( #' !$ $ !$ $ % @ $ # C !$Ãb dà 6 p 9 @ r r C  #(&  $&# $ÃÃ76TD8 !$ÃÃ76TD8 !!'# !## ((  % à  (% $ Ã'ƒ "' # !&ÃÃ76TD8 %"$ÃÃ76TD8 $' %! !$ # à $ !& Ã'ƒ %Y r F G ’ r 6 FÑÃ#$ƒ 8  Ãb#dà ’ 'YÃG & 'YÃp 'YÃi !$Ãb dà 6 867 IPU@T) ÃÃ9DH@ITDPIDIBÃÉÃUPG@S6I8DIBÃQ@SÃ6TH@Ã` #$H ((# !ÃÃ8PIUSPGGDIBÃ9DH@ITDPI)ÃHDGGDH@U@S "ÃÃ9DH@ITDPITÃ6S@ÃTCPXIÃDIÃHDGGDH@U@STÃbDI8C@Td #ÃÃPVUGDI@Ã8PIAPSHTÃUPÃE@9@8ÃPVUGDI@ÃHT !66 $ÃÃÃ9DH@ITDPIÃ9P@TÃIPUÃDI8GV9@ÃHPG9ÃQSPUSVTDPIT ÃÃÃÃÃHPG9ÃQSPUSVTDPITÃIPUÃUPÃ@Y8@@9à $Ãb%d %ÃÃÃ9DH@ITDPIÃ9P@TÃIPUÃDI8GV9@ÃHPG9ÃQSPUSVTDPIT ÃÃÃÃÃHPG9ÃQSPUSVTDPITÃIPUÃUPÃ@Y8@@9Ã!$Ãb d &ÃÃÃ9DH@ITDPIÃDTÃUC@ÃG@IBUCÃPAÃG@69ÃAPSÃTPG9@SDIBÃUP ÃÃÃÃÃ6ÃTV7TUS6U@ APPUQSDIU 'YÃ&!Ãb!'d %#%Ãb!$$d "Yà !&Ãb$d 'Yà &'Ãb&d SO-8 Part Marking @Y6HQG@)ÃUCDTÃDTÃ6IÃDSA&  ÃHPTA@U DIU@SI6UDPI6G S@8UDAD@S GPBP www.irf.com ;;;; ) 96U@Ã8P9@Ã`XX QÃ2Ã9@TDBI6U@TÃG@69AS@@ QSP9V8UÃPQUDPI6G `Ã2ÃG6TUÃ9DBDUÃPAÃUC@Ã`@6S XXÃ2ÃX@@F 6Ã2Ã6TT@H7G`ÃTDU@Ã8P9@ GPUÃ8P9@ Q6SUÃIVH7@S 9 IRF7832Z SO-8 Tape and Reel Dimensions are shown in millimeters (inches) TERMINAL NUMBER 1 12.3 ( .484 ) 11.7 ( .461 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES: 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 330.00 (12.992) MAX. 14.40 ( .566 ) 12.40 ( .488 ) NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-481 & EIA-541. Notes:  Repetitive rating; pulse width limited by max. junction temperature. ‚ Starting TJ = 25°C, L = 2.7mH, RG = 25Ω, IAS = 16A. ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%. „ When mounted on 1 inch square copper board. … Rθ is measured at T J of approximately 90°C. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.06/05 10 www.irf.com