IRF830AS

PD- 92006A SMPS MOSFET IRF830AS/L HEXFET® Power MOSFET Applications Switch Mode Power Supply (SMPS) l Uninterruptable Power Supply l High Speed Power Switching l VDSS 500V RDS(on) max 1.40Ω ID 5.0A Benefits Low Gate Charge Qg Results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective Coss specified (See AN 1001) l D2Pak TO-262 Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TA = 25°C PD @TC = 25°C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V† Continuous Drain Current, VGS @ 10V† Pulsed Drain Current  † Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt ƒ † Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 5.0 3.2 20 3.1 74 0.59 ± 30 5.3 -55 to + 150 300 (1.6mm from case ) Units A W W/°C V V/ns °C Typical SMPS Topologies: l l Two Transistor Forward Half Bridge and Full Bridge Notes  through … are on page 10 www.irf.com 1 5/4/00 IRF830AS/L Static @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 500 ––– ––– 2.0 ––– ––– ––– ––– Typ. ––– 0.60 ––– ––– ––– ––– ––– ––– Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA† 1.4 Ω VGS = 10V, ID = 3.0A „ 4.5 V VDS = VGS, ID = 250µA 25 VDS = 500V, VGS = 0V µA 250 VDS = 400V, VGS = 0V, TJ = 125°C 100 VGS = 30V nA -100 VGS = -30V Dynamic @ TJ = 25°C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 2.8 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– ––– ––– ––– 10 21 21 15 620 93 4.3 886 27 39 Max. Units Conditions ––– S VDS = 50V, ID = 3.0A† 24 ID = 5.0A 6.3 nC VDS = 400V 11 VGS = 10V, See Fig. 6 and 13 „† ––– VDD = 250V ––– ID = 5.0A ns ––– RG = 14Ω ––– RD = 49 Ω,See Fig. 10 „† ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz, See Fig. 5 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 400V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 400V …† Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy‚† Avalanche Current† Repetitive Avalanche Energy Typ. ––– ––– ––– Max. 230 5.0 7.4 Units mJ A mJ Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient ( PCB Mounted, steady-state)* Typ. ––– ––– Max. 1.7 40 Units °C/W Diode Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 5.0 showing the A G integral reverse ––– ––– 20 S p-n junction diode. ––– ––– 1.5 V TJ = 25°C, IS = 5.0A, VGS = 0V „ ––– 430 650 ns TJ = 25°C, IF = 5.0A ––– 2.0 3.0 µC di/dt = 100A/µs „† Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2 www.irf.com IRF830AS/L 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 100 I D , Drain-to-Source Current (A) 10 I D , Drain-to-Source Current (A) VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 10 1 1 4.5V 0.1 4.5V 0.01 0.1 20µs PULSE WIDTH TJ = 25 °C 1 10 100 0.1 1 10 20µs PULSE WIDTH TJ = 150 °C 100 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 100 2.5 ID = 5.0A RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 2.0 10 TJ = 150 ° C 1.5 TJ = 25 ° C 1 1.0 0.5 0.1 4.0 V DS = 50V 20µs PULSE WIDTH 5.0 6.0 7.0 8.0 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( °C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRF830AS/L 10000 VGS , Gate-to-Source Voltage (V) V GS = C iss = C rs s = C oss = 0V , f = 1 M Hz Cg s + C g d , Cd s S HO RTE D C gd Cds + C gd 20 ID = 5.0A VDS = 400V VDS = 250V VDS = 100V 16 C, Capacitance (pF) 1000 C i ss 12 100 C o ss 8 10 4 C r ss 1 1 10 100 1000 A 0 0 4 8 12 FOR TEST CIRCUIT SEE FIGURE 13 16 20 24 V D S , D ra in-to-S ource V olta g e ( V ) Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 100 OPERATION IN THIS AREA LIMITED BY RDS(on) ISD , Reverse Drain Current (A) I D , Drain Current (A) 10us 10 100us 10 TJ = 150 ° C 1ms 1 10ms 1 TJ = 25 ° C 0.1 0.2 V GS = 0 V 0.4 0.6 0.8 1.0 1.2 0.1 TC = 25 ° C TJ = 150 ° C Single Pulse 10 100 1000 10000 VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF830AS/L 5.0 VDS VGS RD 4.0 D.U.T. + RG I D , Drain Current (A) -VDD 3.0 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 2.0 Fig 10a. Switching Time Test Circuit 1.0 VDS 90% 0.0 25 50 75 100 125 150 TC , Case Temperature ( °C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 10 Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.10 P DM 0.1 0.05 t1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 1 0.01 0.00001 0.0001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF830AS/L 1 5V 500 EAS , Single Pulse Avalanche Energy (mJ) TOP 400 VDS L D R IV E R BOTTOM ID 2.2A 3.2A 5.0A RG 20V tp D .U .T IA S + V - DD 300 A 0 .0 1 Ω 200 Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp 100 0 25 50 75 100 125 150 Starting TJ , Junction Temperature ( °C) IAS Fig 12b. Unclamped Inductive Waveforms QG Fig 12c. Maximum Avalanche Energy Vs. Drain Current 10 V QGS VG QGD V D S a v , A valanche V oltage (V ) 790 785 Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 780 50KΩ 12V .2µF .3µF 775 D.U.T. VGS 3mA + V - DS 770 0.0 1.0 2.0 3.0 4.0 5.0 A I a v , A v alanc he C urrent (A ) IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current 6 www.irf.com IRF830AS/L Peak Diode Recovery dv/dt Test Circuit D.U.T + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET® Power MOSFET www.irf.com 7 IRF830AS/L D2Pak Package Outline 1 0.54 (.415 ) 1 0.29 (.405 ) 1.4 0 (.055 ) M AX. -A2 4 .6 9 (.18 5) 4 .2 0 (.16 5) -B1.3 2 (.05 2) 1.2 2 (.04 8) 10 .1 6 (.4 00 ) R E F. 6.47 (.2 55 ) 6.18 (.2 43 ) 1 5.49 (.6 10) 1 4.73 (.5 80) 5.28 (.2 08 ) 4.78 (.1 88 ) 2.7 9 (.110 ) 2.2 9 (.090 ) 2.61 (.1 03 ) 2.32 (.0 91 ) 1.3 9 (.0 55 ) 1.1 4 (.0 45 ) 8.8 9 (.3 50 ) R E F. 1.7 8 (.07 0) 1.2 7 (.05 0) 1 3 3X 1.40 (.0 55) 1.14 (.0 45) 5 .08 (.20 0) 0.9 3 (.0 37 ) 3X 0.6 9 (.0 27 ) 0.25 (.0 10 ) M BAM 0.55 (.0 22) 0.46 (.0 18) M IN IM U M R EC O M M E ND E D F O O TP R IN T 1 1.43 (.4 50 ) NO TE S: 1 D IM EN S IO N S A FTER SO LD E R D IP . 2 D IM EN S IO N IN G & TO LE R AN C IN G P ER AN S I Y1 4.5M , 19 82 . 3 C O N TRO L LIN G D IM EN S IO N : IN C H. 4 H E ATSINK & L EA D D IM E N SIO N S DO N O T IN C LU D E B U R RS . LE AD AS SIG N M E N TS 1 - G ATE 2 - D RA IN 3 - SO U R C E 8 .89 (.35 0) 17 .78 (.70 0) 3.81 (.1 5 0) 2.0 8 (.08 2) 2X 2.5 4 (.100 ) 2X Part Marking Information D2Pak IN TE R N A TIO N A L R E C T IF IE R LO G O A S S E M B LY LO T C O D E PART NUM BER F530S 9 24 6 9B 1M A DATE CODE (Y YW W ) YY = Y E A R W W = W EEK 8 www.irf.com IRF830AS/L Package Outline TO-262 Outline Part Marking Information TO-262 www.irf.com 9 IRF830AS/L Tape & Reel Information D2Pak TR R 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 ( .1 6 1 ) 3 .9 0 ( .1 5 3 ) 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 0.3 6 8 (.01 4 5 ) 0.3 4 2 (.01 3 5 ) F E E D D IR E C TIO N 1 .8 5 ( .0 7 3 ) 1 .6 5 ( .0 6 5 ) 1 1.6 0 (.4 57 ) 1 1.4 0 (.4 49 ) 1 5 .42 (.60 9 ) 1 5 .22 (.60 1 ) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) TRL 1 0.9 0 (.4 2 9) 1 0.7 0 (.4 2 1) 1 .75 (.06 9 ) 1 .25 (.04 9 ) 16 .1 0 (.63 4 ) 15 .9 0 (.62 6 ) 4 .7 2 (.1 3 6) 4 .5 2 (.1 7 8) F E E D D IR E C T IO N 13.50 (.532 ) 12.80 (.504 ) 2 7.4 0 (1.079 ) 2 3.9 0 (.9 41) 4 3 30 .00 ( 14.1 73 ) MAX. 6 0.0 0 (2.36 2) M IN . Notes: N O TE S : 1 . CO M F OR M S TO E IA -418 . 2 . CO N TR O L LIN G D IM E N SIO N : M IL LIM E T ER . 3 . DIM E NS IO N M EA S UR E D @ H U B. 4 . IN C LU D ES FL AN G E DIST O R T IO N @ O UT E R E D G E. 26 .40 (1 .03 9) 24 .40 (.9 61 ) 3 30.4 0 (1.19 7) M A X. 4  Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) „ Pulse width ≤ 300µs; duty cycle ≤ 2%. … Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS ‚ Starting TJ = 25°C, L = 18mH TJ ≤ 150°C RG = 25Ω, IAS = 5.0A. (See Figure 12) ƒ ISD ≤ 5.0A, di/dt ≤ 370A/µs, VDD ≤ V(BR)DSS, † Uses IRF830A data and test conditions * When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. 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