IRFR3418PBF

PD - 95516A HEXFET® Power MOSFET Applications High frequency DC-DC converters l Lead-Free l IRFR3418PbF IRFU3418PbF 14m: VDSS 80V RDS(on) Max ID 30A Benefits Low Gate-to-Drain Charge to Reduce Switching Losses l Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) l Fully Characterized Avalanche Voltage and Current l D-Pak IRFR3418 I-Pak IRFU3418 Absolute Maximum Ratings Parameter VDS VGS ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C PD @TA = 25°C dv/dt TJ TSTG Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Max. 80 ± 20 70 50 280 140 3.8 0.95 5.2 -55 to + 175 Units V h A W c Maximum Power Dissipation Maximum Power Dissipation Linear Derating Factor Peak Diode Recovery dv/dt Operating Junction and e W/°C V/ns °C Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Thermal Resistance Parameter RθJC RθJA RθJA Junction-to-Case Junction-to-Ambient (PCB Mount) * Junction-to-Ambient Typ. ––– ––– ––– Max. 1.05 40 110 Units °C/W Notes  through † are on page 10 www.irf.com 1 12/03/04 IRFR/U3418PbF Static @ TJ = 25°C (unless otherwise specified) Parameter V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) IDSS IGSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units 80 ––– ––– 3.5 ––– ––– ––– ––– ––– 0.08 11.5 ––– ––– ––– ––– ––– ––– ––– 14 5.5 1.0 250 100 -100 nA V mΩ V µA Conditions VGS = 0V, ID = 250µA VGS = 10V, ID = 18A VDS = 80V, VGS = 0V VDS = 64V, VGS = 0V, TJ = 150°C VGS = 20V VGS = -20V V/°C Reference to 25°C, ID = 1mA f VDS = VGS, ID = 250µA Dynamic @ TJ = 25°C (unless otherwise specified) Parameter gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. Typ. Max. Units 66 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 63 23 23 24 72 41 27 3510 330 190 1220 240 360 ––– 94 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– pF ns nC S ID = 18A VDS = 40V VGS = 10V VDD = 40V ID = 18A RG = 6.8Ω VGS = 10V VGS = 0V VDS = 25V Conditions VDS = 25V, ID = 18A f f ƒ = 1.0MHz VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz VGS = 0V, VDS = 64V, ƒ = 1.0MHz VGS = 0V, VDS = 0V to 64V e Avalanche Characteristics EAS IAR Parameter Single Pulse Avalanche Energy Avalanche Current Ù dh Typ. ––– ––– Max. 260 18 Units mJ A Diode Characteristics Parameter IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units ––– ––– ––– ––– ––– ––– ––– ––– 57 130 70 280 1.3 ––– ––– V ns nC A Conditions MOSFET symbol showing the integral reverse G S D Ùh p-n junction diode. TJ = 25°C, IS = 18A, VGS = 0V f TJ = 150°C, IF = 18A, VDD = 25V di/dt = 100A/µs f Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2 www.irf.com IRFR/U3418PbF 1000 TOP VGS 15V 10V 9.0V 8.0V 7.5V 7.0V 6.5V 6.0V 1000 TOP VGS 15V 10V 9.0V 8.0V 7.5V 7.0V 6.5V 6.0V ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 100 100 BOTTOM 10 BOTTOM 1 10 6.0V 1 0.1 6.0V 0.01 20µs PULSE WIDTH Tj = 25°C 0.001 0.1 1 10 100 1000 0.1 0.1 1 20µs PULSE WIDTH Tj = 175°C 10 100 1000 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000.00 2.5 ID = 70A 100.00 T J = 175°C 10.00 1.00 T J = 25°C 0.10 VDS = 25V 20µs PULSE WIDTH 0.01 5 6 7 8 9 10 11 12 13 14 15 RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (Α) 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 VGS = 10V 20 40 60 80 100 120 140 160 180 T T J, Junction Temperature (°C) ( °C) VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRFR/U3418PbF 100000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd Coss = Cds + Cgd 12.0 ID= 18A VGS , Gate-to-Source Voltage (V) 10.0 10000 VDS= 64V VDS= 40V VDS= 16V C, Capacitance(pF) Ciss 1000 8.0 6.0 Coss Crss 100 4.0 2.0 10 1 10 100 0.0 0 10 20 30 40 50 60 70 VDS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000.00 10000 OPERATION IN THIS AREA LIMITED BY R DS(on) 100.00 T J = 175°C 10.00 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 100 100µsec 10 1msec 1 TC = 25°C Tj = 175°C Single Pulse 0.1 10msec 1.00 T J = 25°C VGS = 0V 0.10 0.0 0.5 1.0 1.5 2.0 VSD, Source-toDrain Voltage (V) 1 10 100 1000 VDS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRFR/U3418PbF 80 V DS LIMITED BY PACKAGE RD VGS RG VGS D.U.T. + ID , Drain Current (A) 60 -VDD 40 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 10a. Switching Time Test Circuit 20 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS td(on) tr t d(off) tf Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms 10 Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.10 0.1 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 PDM t1 t2 0.01 0.00001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFR/U3418PbF 600 15V EAS, Single Pulse Avalance Energy (mJ) TOP 500 VDS L DRIVER BOTTOM ID 7.3A 13A 18A 400 RG VGS 20V D.U.T IAS tp + V - DD A 0.01Ω 300 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp 200 100 0 25 50 75 100 125 150 175 Starting Junction Temperature( Starting TTJ,, JunctionTemperature (°C)°C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF VGS QGS VG QGD VGS 3mA D.U.T. + V - DS IG ID Charge Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 6 www.irf.com IRFR/U3418PbF Peak Diode Recovery dv/dt Test Circuit D.U.T + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET® Power MOSFETs www.irf.com 7 IRFR/U3418PbF D-Pak (TO-252AA) Package Outline D-Pak (TO-252AA) Part Marking Information EXAMPLE: THIS IS AN IRFR120 WITH AS SEMBLY LOT CODE 1234 AS SEMBLED ON WW 16, 1999 IN T HE AS SEMBLY LINE "A" Note: "P" in as sembly line position indicates "Lead-Free" PART NUMBER INT ERNATIONAL RECT IFIER LOGO IRFU120 12 916A 34 ASSEMBLY LOT CODE DAT E CODE YEAR 9 = 1999 WEEK 16 LINE A OR PART NUMBER INT ERNATIONAL RECT IFIER LOGO IRFU120 12 34 DAT E CODE P = DESIGNATES LEAD-F REE PRODUCT (OPT IONAL) YEAR 9 = 1999 WEEK 16 A = ASSEMBLY SITE CODE ASSEMBLY LOT CODE 8 www.irf.com IRFR/U3418PbF I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches) I-Pak (TO-251AA) Part Marking Information EXAMPLE: T HIS IS AN IRFU120 WIT H AS SEMBLY LOT CODE 5678 AS SEMB LED ON WW 19, 1999 IN T HE AS SEMB LY LINE "A" Note: "P" in assembly line position indicates "Lead-Free" INT ERNAT IONAL RECT IFIER LOGO PART NUMBER IRFU120 919A 56 78 ASS EMBLY LOT CODE DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A OR INT ERNAT IONAL RECT IFIER LOGO PART NUMB ER IRF U120 56 78 ASS EMB LY LOT CODE DAT E CODE P = DESIGNAT ES LEAD-FREE PRODUCT (OPT IONAL) YEAR 9 = 1999 WEEK 19 A = AS SEMBLY S IT E CODE www.irf.com 9 IRFR/U3418PbF D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 16.3 ( .641 ) 15.7 ( .619 ) 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION N OTES : 1 . CONTROLLING DIMENSION : MILLIMETER. 2 . ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3 . OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. Notes:  Repetitive rating; pulse width limited by max. junction temperature. ‚ Starting TJ = 25°C, L = 1.6mH RG = 25Ω, IAS = 18A. ƒ ISD ≤ 18A, di/dt ≤ 350A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. „ Pulse width ≤ 300µs; duty cycle ≤ 2%. … Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS † Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 30A. * When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information .12/04 10 www.irf.com