PD - 94752
AUTOMOTIVE MOSFET
IRFR4105Z IRFU4105Z
HEXFET® Power MOSFET
D
Features
● ● ● ● ●
Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
VDSS = 55V
G S
RDS(on) = 24.5mΩ ID = 30A
Description
Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
D-Pak IRFR4105Z
I-Pak IRFU4105Z
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100°C Continuous Drain Current, VGS @ 10V Pulsed Drain Current IDM
Max.
30 21 120 48
Units
A W W/°C V mJ A mJ
PD @TC = 25°C Power Dissipation VGS EAS (Thermally limited) EAS (Tested ) IAR EAR TJ TSTG Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current
d
0.32 ± 20
Single Pulse Avalanche Energy Tested Value
Ã
h
29 46 See Fig.12a, 12b, 15, 16 -55 to + 175
Repetitive Avalanche Energy Operating Junction and Storage Temperature Range
g
°C 300 (1.6mm from case ) 10 lbf in (1.1N m)
Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
Thermal Resistance
Parameter
RθJC RθJA RθJA Junction-to-Case Junction-to-Ambient (PCB mount) Junction-to-Ambient
y
y
Typ.
Max.
3.12 40 110
Units
°C/W
i
––– ––– –––
HEXFET® is a registered trademark of International Rectifier.
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1
8/25/03
IRFR/U4105Z
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
55 ––– ––– 2.0 16 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 0.053 19 ––– ––– ––– ––– ––– ––– 18 5.3 7.0 10 40 26 24 4.5 7.5 740 140 74 450 110 180 ––– ––– 24.5 4.0 ––– 20 250 200 -200 27 ––– ––– ––– ––– ––– ––– ––– nH ––– ––– ––– ––– ––– ––– ––– pF ns nC nA V
Conditions
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 18A
e
V S µA
VDS = VGS, ID = 250µA VDS = 15V, ID = 18A VDS = 55V, VGS = 0V VDS = 55V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V ID = 18A VDS = 44V VGS = 10V VDD = 28V ID = 18A RG = 24.5 Ω VGS = 10V
e e
D G
Between lead, 6mm (0.25in.) from package and center of die contact VGS = 0V VDS = 25V ƒ = 1.0MHz
S
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz VGS = 0V, VDS = 44V, ƒ = 1.0MHz VGS = 0V, VDS = 0V to 44V
f
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
––– ––– ––– ––– ––– ––– ––– ––– 19 14 30 A 120 1.3 29 21 V ns nC
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25°C, IS = 18A, VGS = 0V TJ = 25°C, IF = 18A, VDD = 28V di/dt = 100A/µs
Ã
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFR/U4105Z
1000
TOP
VGS
1000
TOP
ID, Drain-to-Source Current (A)
100
ID, Drain-to-Source Current (A)
15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V
100
15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V
VGS
10
10
1
4.5V 60µs PULSE WIDTH Tj = 25°C
0.1 0.1 0
4.5V 60µs PULSE WIDTH Tj = 175°C
1
1
10
100 100
0.1 0
1
10
100 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
30
Gfs, Forward Transconductance (S)
T J = 175°C 25 20 15
ID, Drain-to-Source Current (Α)
100
T J = 175°C
10
T J = 25°C
T J = 25°C
1
10 5 0 0 10 20 30 40 ID, Drain-to-Source Current (A)
VDS = 25V 60µs PULSE WIDTH
0 4 5 6 7 8 9 10
VDS = 8.0V 380µs PULSE WIDTH
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance Vs. Drain Current
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IRFR/U4105Z
1200 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd
20
VGS, Gate-to-Source Voltage (V)
ID= 18A VDS= 44V VDS= 28V VDS= 11V
1000
16
C, Capacitance (pF)
800
Ciss
12
600
8
400
200
Coss Crss
4
FOR TEST CIRCUIT SEE FIGURE 13
0 1 10 100
0 0 5 10 15 20 25 30 QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000.0
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
100.0 T J = 175°C 10.0
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
10 100µsec
1.0
T J = 25°C VGS = 0V
1 Tc = 25°C Tj = 175°C Single Pulse 1 10 1msec 10msec
0.1 0.0 0.5 1.0 1.5 2.0 VSD, Source-toDrain Voltage (V)
0.1
100
1000
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFR/U4105Z
30 2.5
RDS(on) , Drain-to-Source On Resistance (Normalized)
25
ID = 18A VGS = 10V
2.0
ID , Drain Current (A)
20
15
1.5
10
1.0
5
0 25 50 75 100 125 150 175
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
T J , Junction Temperature (°C)
T J , Junction Temperature (°C)
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10. Normalized On-Resistance Vs. Temperature
10
Thermal Response ( Z thJC )
D = 0.50
1
0.20 0.10 0.05
0.1
R1 R1 τJ τ1 τ2 R2 R2 R3 R3 τ3 τC τ τ3
0.02 0.01
τJ
τ1
τ2
Ri (°C/W) τi (sec) 1.100 0.000174 1.601 0.000552 0.418 0.007193
0.01
SINGLE PULSE ( THERMAL RESPONSE )
Ci= τi /Ri Ci i/Ri
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.0001 0.001 0.01
0.001 1E-006 1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFR/U4105Z
120
EAS, Single Pulse Avalanche Energy (mJ)
15V
100
VDS
L
DRIVER
ID 2.0A 3.5A BOTTOM 18A
TOP
80
RG
20V VGS
D.U.T
IAS tp
+ V - DD
A
60
0.01Ω
40
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
20
0 25 50 75 100 125 150 175
Starting T J, Junction Temperature (°C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS VG QGD
VGS(th) Gate threshold Voltage (V)
4.5
4.0
Charge
3.5
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
ID = 250µA
3.0
50KΩ 12V .2µF .3µF
2.5
D.U.T. VGS
3mA
+ V - DS
2.0 -75 -50 -25 0 25 50 75 100 125 150 175
T J , Temperature ( °C )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage Vs. Temperature
6
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IRFR/U4105Z
100
Duty Cycle = Single Pulse
Avalanche Current (A)
10
0.01 0.05 0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
1
0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
30
EAR , Avalanche Energy (mJ)
25
TOP Single Pulse BOTTOM 1% Duty Cycle ID = 18A
20
15
10
5
0 25 50 75 100 125 150
Starting T J , Junction Temperature (°C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav ·f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav
Fig 16. Maximum Avalanche Energy Vs. Temperature
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IRFR/U4105Z
Driver Gate Drive
D.U.T
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
• • • • dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
RD
V DS VGS RG 10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
D.U.T.
+
-VDD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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IRFR/U4105Z
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265) 6.35 (.250) -A5.46 (.215) 5.21 (.205) 4 1.27 (.050) 0.88 (.035)
2.38 (.094) 2.19 (.086)
1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018)
6.45 (.245) 5.68 (.224) 6.22 (.245) 5.97 (.235) 1.02 (.040) 1.64 (.025) 1 2 3 0.51 (.020) MIN. 10.42 (.410) 9.40 (.370) LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN -B1.52 (.060) 1.15 (.045) 3X 1.14 (.045) 2X 0.76 (.030) 2.28 (.090) 4.57 (.180) 0.89 (.035) 0.64 (.025) 0.25 (.010) M AMB NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-252AA. 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SOLDER DIP MAX. +0.16 (.006).
0.58 (.023) 0.46 (.018)
D-Pak (TO-252AA) Part Marking Information
Notes : T his part marking information applies to devices produced before 02/26/2001
EXAMPLE: T HIS IS AN IRFR120 WIT H AS S EMBLY LOT CODE 9U1P INT ERNATIONAL RECTIFIER LOGO ASS EMBLY LOT CODE
IRFU120 016 9U 1P
DAT E CODE YEAR = 0 WEEK = 16
Notes : T his part marking information applies to devices produced after 02/26/2001
EXAMPLE: T HIS IS AN IRFR120 WIT H AS S EMBLY LOT CODE 1234 AS SEMBLED ON WW 16, 1999 IN T HE AS SEMBLY LINE "A" PART NUMBER
IRFU120 12 916A 34
INT ERNATIONAL RECTIFIER LOGO ASS EMBLY LOT CODE
DATE CODE YEAR 9 = 1999 WEEK 16 LINE A
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IRFR/U4105Z
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265) 6.35 (.250) -A5.46 (.215) 5.21 (.205) 4 6.45 (.245) 5.68 (.224) 1.52 (.060) 1.15 (.045) 1 -B2.28 (.090) 1.91 (.075) 9.65 (.380) 8.89 (.350) 2 3 NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-252AA. 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SOLDER DIP MAX. +0.16 (.006). 6.22 (.245) 5.97 (.235) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 0.58 (.023) 0.46 (.018) LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
3X
1.14 (.045) 0.76 (.030)
3X
0.89 (.035) 0.64 (.025) M AMB
1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018)
2.28 (.090) 2X
0.25 (.010)
I-Pak (TO-251AA) Part Marking Information
Notes : T his part marking information applies to devices produced before 02/26/2001
EXAMPLE: T HIS IS AN IRFR120 WIT H AS SEMBLY LOT CODE 9U1P INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE DAT E CODE YEAR = 0 WEEK = 16
IRFU120 016 9U 1P
Notes : T his part marking information applies to devices produced after 02/26/2001
EXAMPLE: T HIS IS AN IRFR120 WIT H AS SEMBLY LOT CODE 5678 AS SEMBLED ON WW 19, 1999 IN T HE ASS EMBLY LINE "A" INTERNATIONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER
IRFU120 919A 56 78
DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A
10
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IRFR/U4105Z
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL
16.3 ( .641 ) 15.7 ( .619 )
16.3 ( .641 ) 15.7 ( .619 )
12.1 ( .476 ) 11.9 ( .469 )
FEED DIRECTION
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.
Repetitive rating; pulse width limited by
Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25°C, L = 0.18mH
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive RG = 25Ω, IAS = 18A, VGS =10V. Part not avalanche performance. recommended for use above this value. This value determined from sample failure population. 100% Pulse width ≤ 1.0ms; duty cycle ≤ 2%. tested to this value in production. When mounted on 1" square PCB (FR-4 or G-10 Material) . For recommended footprint and soldering techniques refer to application note #AN-994 Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR’s Web site.
Notes:
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.8/03
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