IRFRU4105

PD - 91302C IRFR/U4105 HEXFET® Power MOSFET l l l l l Ultra Low On-Resistance Surface Mount (IRFR4105) Straight Lead (IRFU4105) Fast Switching Fully Avalanche Rated D VDSS = 55V G S RDS(on) = 0.045Ω ID = 27A… Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The D-PAK is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for throughhole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. D -P A K T O -252 A A I-P A K T O -25 1A A Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current ‡ Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy‚‡ Avalanche Current‡ Repetitive Avalanche Energy‡ Peak Diode Recovery dv/dt ƒ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 27… 19 100 68 0.45 ± 20 65 16 6.8 5.0 -55 to + 175 300 (1.6mm from case ) Units A W W/°C V mJ A mJ V/ns °C Thermal Resistance Parameter RθJC RθJA RθJA Junction-to-Case Junction-to-Ambient (PCB mount) ** Junction-to-Ambient Typ. ––– ––– ––– Max. 2.2 50 110 Units °C/W www.irf.com 1 5/11/98 IRFR/U4105 Electrical Characteristics @ TJ = 25°C (unless otherwise specified) V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. Typ. Max. Units Conditions 55 ––– ––– V V GS = 0V, ID = 250µA ––– 0.052 ––– V/°C Reference to 25°C, ID = 1mA ––– ––– 0.045 VGS = 10V, ID = 16A „ 2.0 ––– 4.0 V VDS = VGS, ID = 250µA 6.5 ––– ––– S VDS = 25V, ID = 16A‡ ––– ––– 25 VDS = 55V, VGS = 0V µA ––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C ––– ––– 100 VGS = 20V nA ––– ––– -100 V GS = -20V ––– ––– 34 ID = 16A ––– ––– 6.8 nC VDS = 44V ––– ––– 14 VGS = 10V, See Fig. 6 and 13 „‡ ––– 7.0 ––– VDD = 28V ––– 49 ––– ID = 16A ns ––– 31 ––– RG = 18Ω ––– 40 ––– RD = 1.8Ω, See Fig. 10 „‡ Between lead, ––– 4.5 ––– nH 6mm (0.25in.) G from package ––– 7.5 ––– and center of die contact† ––– 700 ––– VGS = 0V ––– 240 ––– pF VDS = 25V ––– 100 ––– ƒ = 1.0MHz, See Fig. 5‡ D S Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Notes: Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) ‡ Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 27 … showing the A G integral reverse ––– ––– 100 p-n junction diode. S ––– ––– 1.6 V TJ = 25°C, IS = 16A, VGS = 0V „ ––– 57 86 ns TJ = 25°C, IF = 16A ––– 130 200 nC di/dt = 100A/µs „‡ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ‚ VDD = 25V, starting TJ = 25°C, L = 410µH RG = 25Ω, IAS = 16A. (See Figure 12) „ Pulse width ≤ 300µs; duty cycle ≤ 2% … Calculated continuous current based on maximum allowable junction † This is applied for I-PAK, Ls of D-PAK is measured between lead and center of die contact temperature; Package limitation current = 20A ƒ ISD ≤ 16A, di/dt ≤ 420A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C ‡ Uses IRFZ34N data and test conditions ** When mounted on 1" square PCB (FR-4 or G-10 Material ) . For recommended footprint and soldering techniques refer to application note #AN-994 2 www.irf.com IRFR/U4105 1000 I , Drain-to-S ource C urrent (A ) D I , D rain-to-Source Current (A ) D 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 1000 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 10 10 4 .5 V 4 .5 V 1 1 0.1 0.1 1 2 0 µ s P U L S E W ID TH T C = 25 °C 10 100 A 0.1 0.1 1 2 0 µ s P U LS E W ID TH T C = 1 75 °C 10 100 A V DS , D rain-to-S ource V olta g e ( V ) V DS , D rain-to-S ource V olta g e ( V ) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 100 2.4 R D S (on) , D rain-to-Source O n Resistance (Norm alized) I D = 2 6A I D , D rain-to -So urc e C urre nt (A ) 2.0 TJ = 2 5 °C TJ = 1 7 5°C 1.6 10 1.2 0.8 0.4 tion 1 4 5 6 7 V DS = 25V 2 0 µ s P U LS E W ID TH 8 9 10 A 0.0 -60 -40 -20 0 20 40 60 80 V G S = 1 0V 100 120 140 160 180 A V G S , G ate-to-So urce Vo lta g e (V) T J , Junction T em perature (°C ) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRFR/U4105 1200 20 1000 800 C o ss 600 V G S , G ate-to-S ourc e V oltage (V ) V GS C is s C rs s C i ss C o s s = = = = 0V, f = 1MHz C g s + C g d , C d s S H O R TE D C gd C ds + C gd I D = 16 A V DS = 44V V DS = 28V 16 C , Capacitance (pF) 12 8 400 C r ss 200 4 0 1 10 100 A 0 0 10 20 F O R TE S T C IR C U IT S E E F IG U R E 1 3 30 40 A V D S , D rain-to-S ourc e V olta g e ( V ) Q G , T otal G ate C h ar g e ( n C ) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 1000 I S D , Reverse D rain C urrent (A) O P E R A TIO N IN TH IS A R E A L IM ITE D B Y R D S (o n) 100 I D , Drain C urrent (A ) 100 10µ s TJ = 17 5°C TJ = 25 °C 100µ s 10 1m s 10 1 0.4 0.8 1.2 1.6 V G S = 0V A 1 1 T C = 2 5 °C T J = 17 5°C S in g le P u lse 10 100 2.0 A V S D , S ourc e-to-D rain V oltage (V ) V D S , D rain-to-S ource V olta g e ( V ) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRFR/U4105 30 LIMITED BY PACKAGE 25 VDS VGS RG RD D.U.T. + I D , Drain Current (A) 20 -VDD 5.0V 15 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 10 Fig 10a. Switching Time Test Circuit VDS 90% 5 0 25 50 75 100 125 150 175 TC , Case Temperature ( ° C) Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 10 Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.10 0.05 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.1 0.02 0.01 0.01 0.00001 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFR/U4105 140 E AS , S ingle P ulse A valanc he Energy (m J ) TO P 120 1 5V B O TTO M 100 ID 6 .5A 1 1A 16 A VD S L D R IV E R 80 RG 10V tp D .U .T IA S + V - DD 60 A 0.0 1 Ω 40 Fig 12a. Unclamped Inductive Test Circuit 20 0 25 VDD = 25V 50 75 100 125 150 A 175 V (B R )D SS tp S tartin g T J , J unc tion T em perature ( °C ) Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 5.0 V QGS VG QGD VGS 3mA D.U.T. + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 6 www.irf.com IRFR/U4105 Peak Diode Recovery dv/dt Test Circuit D.U.T + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS www.irf.com 7 IRFR/U4105 Package Outline TO-252AA Outline Dimensions are shown in millimeters (inches) 6 .7 3 (.2 6 5 ) 6 .3 5 (.2 5 0 ) -A5 .4 6 (.2 1 5 ) 5 .2 1 (.2 0 5 ) 4 6 .4 5 (.2 4 5 ) 5 .6 8 (.2 2 4 ) 6 .2 2 (.2 4 5 ) 5 .9 7 (.2 3 5 ) 1 .0 2 (.0 4 0 ) 1 .6 4 (.0 2 5 ) 1 2 3 -B 1 .5 2 (.0 6 0 ) 1 .1 5 (.0 4 5 ) 3X 1 .1 4 (.0 4 5 ) 2 X 0 .7 6 (.0 3 0 ) 2 .2 8 (.0 9 0 ) 4 .5 7 (.1 8 0 ) 0 .8 9 (.0 3 5 ) 0 .6 4 (.0 2 5 ) 0 .2 5 (.0 1 0 ) M AMB 0 .5 1 (.0 2 0 ) M IN . 1 0 .4 2 (.4 1 0 ) 9 .4 0 (.3 7 0 ) 1 .2 7 (.0 5 0 ) 0 .8 8 (.0 3 5 ) 2 .3 8 (.0 9 4 ) 2 .1 9 (.0 8 6 ) 1 .1 4 (.0 4 5 ) 0 .8 9 (.0 3 5 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) L E A D A S S IG N M E N T S 1 - GATE 2 - D R A IN 3 - SOURCE 4 - D R A IN 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) N O TE S : 1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 2 C O N T R O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A . 4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP , S O L D E R D IP M A X . + 0 .1 6 (.0 0 6 ). Part Marking Information TO-252AA (D-PARK) E XA M P L E : T H IS IS A N IR F R 1 2 0 W IT H A S S E M B L Y LOT COD E 9U1P IN T E R N A T IO N A L R E C T IF IE R LO GO A IR F R 120 9U 1P F IR S T P O R T IO N OF PART NUMBER ASS EMB LY LOT CODE S E C O N D P O R TIO N OF PART NUMBER 8 www.irf.com IRFR/U4105 Package Outline TO-251AA Outline Dimensions are shown in millimeters (inches) 6 .7 3 (.2 6 5 ) 6 .3 5 (.2 5 0 ) -A 5 .4 6 (.2 1 5 ) 5 .2 1 (.2 0 5 ) 4 6 .4 5 (.2 4 5 ) 5 .6 8 (.2 2 4 ) 1 .2 7 (.0 5 0 ) 0 .8 8 (.0 3 5 ) 2 .3 8 (.0 9 4 ) 2 .1 9 (.0 8 6 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) L E A D A S S IG N M E N T S 1 - GATE 2 - D R A IN 3 - SOURCE 4 - D R A IN 1 .5 2 (.0 6 0 ) 1 .1 5 (.0 4 5 ) 1 -B 2 .2 8 (.0 9 0 ) 1 .9 1 (.0 7 5 ) 2 3 6 .2 2 (.2 4 5 ) 5 .9 7 (.2 3 5 ) 9 .6 5 (.3 8 0 ) 8 .8 9 (.3 5 0 ) N O TE S : 1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 2 C O N T R O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A . 4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP , S O L D E R D IP M A X . + 0 .1 6 (.0 0 6 ). 3X 1 .1 4 (.0 4 5 ) 0 .7 6 (.0 3 0 ) 3X 0 .8 9 (.0 3 5 ) 0 .6 4 (.0 2 5 ) M AMB 1 .1 4 (.0 4 5 ) 0 .8 9 (.0 3 5 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) 2 .2 8 (.0 9 0 ) 2X 0 .2 5 (.0 1 0 ) Part Marking Information TO-251AA (I-PARK) E XA M P L E : TH IS IS A N IR F U 1 2 0 W IT H A S S E M B L Y LOT CODE 9U1P IN TE R N A T IO N A L R E C TIF IE R LO G O IR F U 12 0 9U 1P F IR S T P O R TIO N OF PART NUMBER AS SEMBLY LOT CODE S E C O N D P O R TIO N OF PART NUM BER www.irf.com 9 IRFR/U4105 Tape & Reel Information TO-252AA TR TRR TR L 1 6.3 ( .641 ) 1 5.7 ( .619 ) 16.3 ( .64 1 ) 15.7 ( .61 9 ) 12 .1 ( .4 76 ) 11 .9 ( .4 69 ) F E E D D IR E C T IO N 8 .1 ( .3 18 ) 7 .9 ( .3 12 ) F E E D D IR E C T IO N NO T ES : 1. C O N T R O LL IN G D IM E N S IO N : M ILLIM E T E R . 2. A LL D IM E N S IO N S A R E S H O W N IN M ILL IM E T E R S ( IN C H E S ). 3. O U T L IN E C O N F O R M S T O E IA -4 81 & E IA -54 1. 13 IN C H 16 m m NOTES : 1. O U T LIN E C O N F O R M S T O E IA -481 . WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T 3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: 171 (K&H Bldg.) 30-4 Nishi-ikebukuro 3-chome, Toshima-ku, Tokyo Japan Tel: 81 33 983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 16907 Tel: 65 221 8371 Data and specifications subject to change without notice. 5/98 10 www.irf.com