PD - 96188
IRFS3006PbF IRFSL3006PbF
HEXFET® Power MOSFET
Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits G Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free
D
VDSS RDS(on) typ. max. ID (Silicon Limited) ID (Package Limited)
D
60V 2.0m: 2.5m: 270A 195A
c
S
D
S G
G
D
S
D2Pak IRFS3006PbF
TO-262 IRFSL3006PbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
ID @ TC = 25°C ID @ TC = 100°C ID @ TC = 25°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Wire Bond Limited) Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw
Max.
d
f
270 191 195 1080 375 2.5 ± 20 10 -55 to + 175 300 10lb in (1.1N m) 320 See Fig. 14, 15, 22a, 22b,
Units
A
W W/°C V V/ns
°C
x
x
Avalanche Characteristics
EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Ãd
e
Thermal Resistance
Symbol
RθJC RθJA Junction-to-Case Junction-to-Ambient
g
mJ A mJ
kl jk
Parameter
Typ.
––– –––
Max.
0.4 40
Units
°C/W
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1
10/06/08
IRFS/SL3006PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) IDSS IGSS RG
Parameter
Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance
Min. Typ. Max. Units
60 ––– ––– 2.0 ––– ––– ––– ––– ––– ––– 0.07 2.0 ––– ––– ––– ––– ––– 2.0 ––– ––– 2.5 4.0 20 250 100 -100 –––
Conditions
V VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 5mA mΩ VGS = 10V, ID = 170A V VDS = VGS, ID = 250µA µA VDS = 60V, VGS = 0V VDS = 60V, VGS = 0V, TJ = 125°C nA VGS = 20V VGS = -20V Ω
g
d
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR)
Parameter
Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min. Typ. Max. Units
––– 200 37 60 140 16 182 118 189 8970 1020 534 1480 1920 ––– 300 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– S nC
Conditions
VDS = 25V, ID = 170A ID = 170A VDS =30V VGS = 10V ID = 170A, VDS =0V, VGS = 10V VDD = 39V ID = 170A RG = 2.7Ω VGS = 10V VGS = 0V VDS = 50V ƒ = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 0V to 48V , See Fig. 11 VGS = 0V, VDS = 0V to 48V
280 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Effective Output Capacitance (Energy Related) ––– ––– Effective Output Capacitance (Time Related)
g
ns
pF
g
h
i h
Diode Characteristics
Symbol
IS ISM VSD trr Qrr IRRM ton
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time
Min. Typ. Max. Units
––– ––– ––– 270 –––
Conditions
MOSFET symbol showing the integral reverse
G D
A A
Ãd
1080
Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time
p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 170A, VGS = 0V VR = 51V, ––– 44 ––– ns TJ = 25°C TJ = 125°C IF = 170A ––– 48 ––– di/dt = 100A/µs ––– 63 ––– nC TJ = 25°C TJ = 125°C ––– 77 ––– ––– 2.4 ––– A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
g
S
g
Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140) Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25°C, L = 0.022mH RG = 25 Ω, IAS = 170A, VGS =10V. Part not recommended for use above this value .
ISD ≤ 170A, di/dt ≤ 1360A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400µs; duty cycle ≤ 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Coss eff. (ER) is a fixed capacitance that gives the same energy as When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
RθJC value shown is at time zero Coss while VDS is rising from 0 to 80% VDSS. mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C
2
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IRFS/SL3006PbF
1000
TOP
1000
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
VGS 15V 10V 8.0V 6.0V 5.0V 4.5V 4.0V 3.5V
TOP
BOTTOM
VGS 15V 10V 8.0V 6.0V 5.0V 4.5V 4.0V 3.5V
100
10
3.5V ≤ 60µs PULSE WIDTH Tj = 175°C
10 0.1 1 10 100
3.5V
1 0.1 1
≤ 60µs PULSE WIDTH Tj = 25°C
10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
1000
Fig 2. Typical Output Characteristics
2.5
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID, Drain-to-Source Current(Α)
ID = 170A VGS = 10V
2.0
100
TJ = 175°C
1.5
TJ = 25°C
10
1.0
VDS = 25V ≤ 60µs PULSE WIDTH
1 2.0 3.0 4.0 5.0 6.0 7.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
16000
VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd
Fig 4. Normalized On-Resistance vs. Temperature
16
VGS, Gate-to-Source Voltage (V)
ID= 170A 12
VDS= 48V VDS= 30V
12000
C, Capacitance (pF)
Ciss 8000
8
4000
4
Coss Crss
0 0 40 80 120 160 200 240 280
0 1 10 VDS, Drain-to-Source Voltage (V) 100
QG Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFS/SL3006PbF
1000
10000
ID, Drain-to-Source Current (A)
TJ = 175°C
OPERATION IN THIS AREA LIMITED BY R DS (on) 100µsec
ISD , Reverse Drain Current (A)
100
1000
100
LIMITED BY PACKAGE
10
TJ = 25°C
1
10
1msec 10msec
1
VGS = 0V
0.1 0.0 0.4 0.8 1.2 1.6 2.0
Tc = 25°C Tj = 175°C Single Pulse 0.1 1 10
DC
0.1 100
VSD, Source-to-Drain Voltage (V)
VDS, Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
V(BR)DSS , Drain-to-Source Breakdown Voltage
Fig 8. Maximum Safe Operating Area
80
300 Limited By Package 250
ID, Drain Current (A)
ID = 5mA
75
200 150 100 50 0 25 50 75 100 125 150 175 T C , Case Temperature (°C)
70
65
60
55 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 9. Maximum Drain Current vs. Case Temperature
EAS, Single Pulse Avalanche Energy (mJ)
2.0
Fig 10. Drain-to-Source Breakdown Voltage
1400 1200 1000 800 600 400 200 0
1.5
ID 20A 27A BOTTOM 170A
TOP
Energy (µJ)
1.0
0.5
0.0 0 10 20 30 40 50 60
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting TJ, Junction Temperature (°C)
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
4
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IRFS/SL3006PbF
1
Thermal Response ( ZthJC )
D = 0.50
0.1
0.20 0.10 0.05
0.01
0.02 0.01
τJ
R1 R1 τJ τ1 τ2
R2 R2 τC
Ri (°C/W) 0.22547
τι (sec)
0.006073
τ1
τ2
0.175365 0.000343
0.001
Ci= τi/ Ri C
SINGLE PULSE ( THERMAL RESPONSE )
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.0001 0.001 0.01 0.1
0.0001 1E-006 1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Tj = 150°C and Tstart =25°C (Single Pulse)
Avalanche Current (A)
100
0.01 0.05
10
0.10
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and Tstart = 150°C.
1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
400
EAR , Avalanche Energy (mJ)
300
TOP Single Pulse BOTTOM 1% Duty Cycle ID = 170A
200
100
Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
175
0 25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav
Fig 15. Maximum Avalanche Energy vs. Temperature
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5
IRFS/SL3006PbF
4.0
20
VGS(th) Gate threshold Voltage (V)
3.5
ID = 1.0A ID = 1.0mA ID = 250µA
IRRM - (A)
16
3.0
12
2.5
8 IF = 112A VR = 51V TJ = 125°C 0 TJ = 25°C 100 200 300 400 500 600 700 800
2.0
4
1.5
1.0 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Temperature ( °C )
dif / dt - (A / µs)
Fig 16. Threshold Voltage Vs. Temperature
20
Fig. 17 - Typical Recovery Current vs. dif/dt
700 600
16
500
QRR - (nC)
IF = 170A VR = 51V TJ = 125°C TJ = 25°C
IRRM - (A)
12
400 300 200 100 0 IF = 112A VR = 51V TJ = 125°C TJ = 25°C 100 200 300 400 500 600 700 800
8
4
0 100 200 300 400
500
600
700
800
dif / dt - (A / µs)
dif / dt - (A / µs)
Fig. 18 - Typical Recovery Current vs. dif/dt
700 600 500
Fig. 19 - Typical Stored Charge vs. dif/dt
QRR - (nC)
400 300 200 100 0 100 200 300 400 500 600 700 800 IF = 170A VR = 51V TJ = 125°C TJ = 25°C
dif / dt - (A / µs)
6
Fig. 20 - Typical Stored Charge vs. dif/dt
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IRFS/SL3006PbF
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
• • • • dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage
Body Diode
Forward Drop
Inductor Curent Inductor Current
Ripple ≤ 5% ISD
* VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
15V
tp
DRIVER
VDS
L
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
0.01Ω
I AS
Fig 22a. Unclamped Inductive Test Circuit
VDS VGS RG RD
Fig 22b. Unclamped Inductive Waveforms
VDS 90%
D.U.T.
+
- VDD
V10V GS
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
10% VGS
td(on) tr t d(off) tf
Fig 23a. Switching Time Test Circuit
Current Regulator Same Type as D.U.T.
Fig 23b. Switching Time Waveforms
Id Vds Vgs
50KΩ 12V .2µF .3µF
D.U.T. VGS
3mA
+ V - DS
Vgs(th)
IG
ID
Current Sampling Resistors
Qgs1 Qgs2
Qgd
Qgodr
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Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
7
IRFS/SL3006PbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
UCDTÃDTÃ6IÃDSA$"TÃXDUC GPUÃ8P9@Ã'!# 6TT@H7G@9ÃPIÃXXÃ!Ã! DIÃUC@Ã6TT@H7G`ÃGDI@ÃÅGÅ DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S A$"T 96U@Ã8P9@ `@6SÃÃ2Ã! X@@FÃ! GDI@ÃG
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ A$"T
Q6SUÃIVH7@S 96U@Ã8P9@ QÃ2Ã9@TDBI6U@TÃG@69ÃÃAS@@ QSP9V8UÃPQUDPI6G `@6SÃÃ2Ã! X@@FÃ! 6Ã2Ã6TT@H7G`ÃTDU@Ã8P9@
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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
IRFS/SL3006PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
@Y6HQG@) UCDTÃDTÃ6IÃDSG" "G GPUÃ8P9@Ã &'( 6TT@H7G@9ÃPIÃXXÃ (Ã ((& DIÃUC@Ã6TT@H7G`ÃGDI@ÃÅ8Å DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S
96U@Ã8P9@ `@6SÃ&Ã2Ã ((& X@@FÃ ( GDI@Ã8
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S
96U@Ã8P9@ QÃ2Ã9@TDBI6U@TÃG@69AS@@ QSP9V8UÃPQUDPI6G `@6SÃ&Ã2Ã ((& X@@FÃ ( 6Ã2Ã6TT@H7G`ÃTDU@Ã8P9@
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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
IRFS/SL3006PbF
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059)
0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site.
10
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 10/2008
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