IRFS5620PBF

PD - 96205 DIGITAL AUDIO MOSFET Features • Key Parameters Optimized for Class-D Audio Amplifier Applications • Low RDSON for Improved Efficiency • Low QG and QSW for Better THD and Improved Efficiency • Low QRR for Better THD and Lower EMI • 175°C Operating Junction Temperature for Ruggedness • Can Deliver up to 300W per Channel into 8Ω Load in Half-Bridge Configuration Amplifier G S D IRFS5620PbF IRFSL5620PbF Key Parameters 200 63.7 25 9.8 2.6 175 D D VDS RDS(ON) typ. @ 10V Qg typ. Qsw typ. RG(int) typ. TJ max V m: nC nC Ω °C S G G D S D2 Pak IRFS5620PbF D TO-262 IRFSL5620PbF S G Gate Drain Source Description This Digital Audio MOSFET is specifically designed for Class-D audio amplifier applications. This MOSFET utilizes the latest processing techniques to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode reverse recovery and internal Gate resistance are optimized to improve key Class-D audio amplifier performance factors such as efficiency, THD and EMI. Additional features of this MOSFET are 175°C operating junction temperature and repetitive avalanche capability. These features combine to make this MOSFET a highly efficient, robust and reliable device for ClassD audio amplifier applications. Absolute Maximum Ratings Parameter VDS VGS ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C PD @TC = 100°C TJ TSTG Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Max. 200 ±20 24 17 100 144 72 0.96 -55 to + 175 Units V f f c A W W/°C Linear Derating Factor Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) °C 300 Thermal Resistance RθJC RθJA Junction-to-Case Junction-to-Ambient (PCB Mount) f Parameter h Typ. ––– ––– Max. 1.045 40 Units °C/W Notes  through † are on page 2 www.irf.com 1 12/18/08 IRFS/SL5620PbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Parameter BVDSS ∆ΒVDSS/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw RG(int) td(on) tr td(off) tf Ciss Coss Crss Coss LD LS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Internal Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance Internal Drain Inductance Internal Source Inductance Min. 200 ––– ––– 3.0 ––– ––– ––– ––– ––– 37 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. Max. Units ––– 0.22 63.7 ––– -14 ––– ––– ––– ––– ––– 25 6.3 1.9 7.9 9.3 9.8 2.6 8.6 14.6 17.1 9.9 1710 125 30 138 4.5 7.5 ––– ––– 77.5 5.0 ––– 20 250 100 -100 ––– 38 ––– ––– ––– ––– ––– 5.0 ––– ––– ––– ––– ––– ––– ––– ––– ––– nH ––– V Conditions VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 15A V VDS = VGS, ID = 100µA mV/°C µA nA S e VDS = 200V, VGS = 0V VDS = 200V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V VDS = 50V, ID = 15A VDS = 100V VGS = 10V ID = 15A See Fig. 6 and 19 nC Ω ns VDD = 100V, VGS = 10V ID = 15A RG = 2.4Ω VGS = 0V VDS = 50V Ãe pF ƒ = 1.0MHz, See Fig.5 VGS = 0V, VDS = 0V to 160V Between lead, 6mm (0.25in.) from package and center of die contact G S D Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Ãg d Typ. Max. Units mJ A mJ g Min. ––– ––– ––– ––– ––– ––– ––– ––– 98 491 ––– 113 See Fig. 14, 15, 17a, 17b Diode Characteristics Parameter IS @ TC = 25°C Continuous Source Current ISM VSD trr Qrr Notes: Typ. Max. Units 24 A 100 1.3 147 737 V ns nC Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25°C, IS = 15A, VGS = 0V (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Ù TJ = 25°C, IF = 15A , VR = 160V di/dt = 100A/µs e e … Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive  Repetitive rating; pulse width limited by max. junction temperature. avalanche information ‚ Starting TJ = 25°C, L = 1.00mH, RG = 25Ω, IAS = 15A. † When mounted on 1" square PCB (FR-4 or G-10 Material). For ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%. recommended footprint and soldering techniques refer to „ Rθ is measured at TJ of approximately 90°C. application note #AN-994. 2 www.irf.com IRFS/SL5620PbF 1000 TOP VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 1000 TOP VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V 5.0V ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 100 100 BOTTOM 10 BOTTOM 10 1 5.0V 0.1 ≤60µs PULSE WIDTH Tj = 25°C 0.01 0.1 1 10 100 V DS, Drain-to-Source Voltage (V) 5.0V 1 ≤60µs PULSE WIDTH 0.1 0.1 1 Tj = 175°C 10 100 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 1000 Fig 2. Typical Output Characteristics 3.5 RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 3.0 2.5 2.0 1.5 1.0 0.5 ID = 15A VGS = 10V 100 TJ = 175°C 10 T J = 25°C 1 VDS = 50V ≤60µs PULSE WIDTH 0.1 2 4 6 8 10 12 14 16 -60 -40 -20 0 20 40 60 80 100 120140 160180 T J , Junction Temperature (°C) VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 100000 VGS = 0V, f = 1 MHZ Ciss = C gs + C gd, C ds SHORTED Fig 4. Normalized On-Resistance vs. Temperature 14.0 VGS, Gate-to-Source Voltage (V) 10000 C, Capacitance (pF) Crss = C gd Coss = C ds + C gd 12.0 10.0 8.0 6.0 4.0 2.0 0.0 ID= 15A VDS= 160V VDS= 100V VDS= 40V 1000 Ciss Coss 100 Crss 10 1 10 100 1000 VDS, Drain-to-Source Voltage (V) 0 5 10 15 20 25 30 35 QG, Total Gate Charge (nC) Fig 5. Typical Capacitance vs.Drain-to-Source Voltage www.irf.com Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage 3 IRFS/SL5620PbF 100 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) 100 100µsec 1msec TJ = 175°C 10 T J = 25°C ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 10 10msec DC 1 Tc = 25°C Tj = 175°C Single Pulse 0.1 1 10 100 1000 VGS = 0V 1.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VSD, Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 30 25 ID, Drain Current (A) Fig 8. Maximum Safe Operating Area 6.0 VGS(th), Gate threshold Voltage (V) VDS, Drain-to-Source Voltage (V) 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 -75 -50 -25 0 25 50 75 100 125 150 175 ID = 100µA ID = 250uA ID = 1.0mA ID = 1.0A 20 15 10 5 0 25 50 75 100 125 150 175 T C , Case Temperature (°C) T J , Temperature ( °C ) Fig 9. Maximum Drain Current vs. Case Temperature 10 Thermal Response ( Z thJC ) °C/W Fig 10. Threshold Voltage vs. Temperature 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 1E-005 0.0001 τJ τJ τ1 R1 R1 τ2 R2 R2 τC τ1 τ2 τ Ri (°C/W) 0.456 0.589 τi (sec) 0.000311 0.003759 Ci= τi/Ri Ci i/Ri Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.01 0.1 0.001 1E-006 0.001 Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case t1 , Rectangular Pulse Duration (sec) 4 www.irf.com IRFS/SL5620PbF RDS(on), Drain-to -Source On Resistance ( Ω) 0.5 EAS , Single Pulse Avalanche Energy (mJ) 500 ID = 15A 0.4 450 400 350 300 250 200 150 100 50 0 25 50 75 100 ID 2.05A 2.94A BOTTOM 15A TOP 0.3 0.2 T J = 125°C 0.1 T J = 25°C 0 4 6 8 10 12 14 16 125 150 175 Fig 12. On-Resistance Vs. Gate Voltage 100 Duty Cycle = Single Pulse VGS, Gate -to -Source Voltage (V) Starting T J , Junction Temperature (°C) Fig 13. Maximum Avalanche Energy Vs. Drain Current Avalanche Current (A) 10 0.01 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆ Tj = 150°C and Tstart =25°C (Single Pulse) 0.05 0.10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and Tstart = 150°C. 0.1 1.0E-06 1.0E-05 1.0E-04 tav (sec) 1.0E-03 1.0E-02 1.0E-01 Fig 14. Typical Avalanche Current Vs.Pulsewidth 120 100 80 60 40 20 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 15A Fig 15. Maximum Avalanche Energy Vs. Temperature Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as neither Tjmax nor Iav (max) is exceeded 3. Equation below based on circuit and waveforms shown in Figures 17a, 17b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav www.irf.com EAR , Avalanche Energy (mJ) 5 IRFS/SL5620PbF D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt ‚ - - „ +  RG • dv/dt controlled by RG • Driver same type as D.U.T. • I SD controlled by Duty Factor "D" • D.U.T. - Device Under Test V DD VDD + - Re-Applied Voltage Body Diode Forward Drop Inductor Current Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V tp DRIVER VDS L RG 20V D.U.T IAS tp + V - DD A 0.01Ω I AS Fig 17a. Unclamped Inductive Test Circuit V DS V GS RG RD Fig 17b. Unclamped Inductive Waveforms VDS 90% D.U.T. + - V DD V10V GS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 10% VGS td(on) tr t d(off) tf Fig 18a. Switching Time Test Circuit Current Regulator Same Type as D.U.T. Fig 18b. Switching Time Waveforms Id Vds Vgs 50KΩ 12V .2µF .3µF D.U.T. VGS 3mA + V - DS Vgs(th) IG ID Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr Fig 19a. Gate Charge Test Circuit Fig 19b. Gate Charge Waveform 6 www.irf.com IRFS/SL5620PbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information @Y6HQG@) UCDTÃDTÃ6IÃDSG" "G GPUÃ8P9@à &'( 6TT@H7G@9ÃPIÃXXà (à ((& DIÃUC@Ã6TT@H7G`ÃGDI@ÃÅ8Å DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S 96U@Ã8P9@ `@6SÃ&Ã2à ((& X@@Fà ( GDI@Ã8 25 DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S 96U@Ã8P9@ QÃ2Ã9@TDBI6U@TÃG@69AS@@ QSP9V8UÃPQUDPI6G `@6SÃ&Ã2à ((& X@@Fà ( 6Ã2Ã6TT@H7G`ÃTDU@Ã8P9@ Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 7 IRFS/SL5620PbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information @Y6HQG@) UCDTÃDTÃ6IÃDSG" "G GPUÃ8P9@à &'( 6TT@H7G@9ÃPIÃXXà (à ((& DIÃUC@Ã6TT@H7G`ÃGDI@ÃÅ8Å DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S 96U@Ã8P9@ `@6SÃ&Ã2à ((& X@@Fà ( GDI@Ã8 25 DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S 96U@Ã8P9@ QÃ2Ã9@TDBI6U@TÃG@69AS@@ QSP9V8UÃPQUDPI6G `@6SÃ&Ã2à ((& X@@Fà ( 6Ã2Ã6TT@H7G`ÃTDU@Ã8P9@ Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 8 www.irf.com IRFS/SL5620PbF D2Pak (TO-263AB) Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION 1.85 (.073) 1.65 (.065) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 12/2008 www.irf.com 9