IRFSL3107PBF

PD -97144 IRFS3107PbF IRFSL3107PbF Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits G Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free D HEXFET® Power MOSFET VDSS RDS(on) typ. max. ID (Silicon Limited) ID (Package Limited) D 75V 2.5m: 3.0m: 230A c 195A S D S G G D S D2Pak IRFS3107PbF TO-262 IRFSL3107PbF G D S Gate Drain Max. 230c 160 195 900 370 2.5 ± 20 14 -55 to + 175 300 10lbxin (1.1Nxm) 300 See Fig. 14, 15, 22a, 22b, Source Units A Absolute Maximum Ratings Symbol ID @ TC = 25°C ID @ TC = 100°C ID @ TC = 25°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG Parameter Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Wire Bond Limited) Pulsed Drain Current d Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery f Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw W W/°C V V/ns °C Avalanche Characteristics EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy e Avalanche Current d Repetitive Avalanche Energy g mJ A mJ Thermal Resistance Symbol RθJC RθJA Parameter Junction-to-Case kl Junction-to-Ambient (PCB Mount) jk Typ. ––– ––– Max. 0.40 40 Units °C/W www.irf.com 1 10/7/08 IRFS/SL3107PbF Static @ TJ = 25°C (unless otherwise specified) Symbol V(BR)DSS ΔV(BR)DSS/ΔTJ RDS(on) VGS(th) IDSS IGSS RG Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance Min. Typ. Max. Units 75 ––– ––– 2.0 ––– ––– ––– ––– ––– ––– 0.09 2.5 ––– ––– ––– ––– ––– 1.2 ––– ––– 3.0 4.0 20 250 100 -100 ––– Conditions V VGS = 0V, ID = 250μA V/°C Reference to 25°C, ID = 5mAd mΩ VGS = 10V, ID = 140A g V VDS = VGS, ID = 250μA μA VDS = 75V, VGS = 0V VDS = 75V, VGS = 0V, TJ = 125°C nA VGS = 20V VGS = -20V Ω Dynamic @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Min. Typ. Max. Units ––– 160 38 54 106 19 110 99 100 9370 840 580 1130 1500 ––– 240 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– S nC Conditions VDS = 50V, ID = 140A ID = 140A VDS =38V VGS = 10V g ID = 140A, VDS =0V, VGS = 10V VDD = 49V ID = 140A RG = 2.7Ω VGS = 10V g VGS = 0V VDS = 50V ƒ = 1.0 MHz, See Fig. 5 VGS = 0V, VDS = 0V to 60V i, See Fig. 11 VGS = 0V, VDS = 0V to 60V h 230 ––– ––– ––– ––– Turn-On Delay Time ––– Rise Time ––– Turn-Off Delay Time ––– Fall Time ––– Input Capacitance ––– Output Capacitance ––– Reverse Transfer Capacitance ––– Effective Output Capacitance (Energy Related) ––– Effective Output Capacitance (Time Related)h ––– ns pF Diode Characteristics Symbol IS ISM VSD trr Qrr IRRM ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) d Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time Min. Typ. Max. Units ––– ––– ––– 230c ––– 900 A A Conditions MOSFET symbol showing the integral reverse G S D ––– ––– 1.3 V ––– 54 ––– ns ––– 60 ––– ––– 103 ––– nC ––– 132 ––– ––– 3.6 ––– A Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) p-n junction diode. TJ = 25°C, IS = 140A, VGS = 0V g VR = 64V, TJ = 25°C IF = 140A TJ = 125°C di/dt = 100A/μs g TJ = 25°C TJ = 125°C TJ = 25°C Notes:  Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140) ‚ Repetitive rating; pulse width limited by max. junction temperature. ƒ Limited by TJmax, starting TJ = 25°C, L = 0.045mH RG = 25Ω, IAS = 140A, VGS =10V. Part not recommended for use above this value . „ ISD ≤ 140A, di/dt ≤ 1380A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. … Pulse width ≤ 400μs; duty cycle ≤ 2%. † Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. ‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom ‰ Rθ is measured at TJ approximately 90°C Š RθJC value shown is at time zero. Coss while VDS is rising from 0 to 80% VDSS. mended footprint and soldering techniques refer to application note #AN-994. 2 www.irf.com IRFS/SL3107PbF 1000 TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 4.8V 4.5V 1000 TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 4.8V 4.5V ID, Drain-to-Source Current (A) BOTTOM ID, Drain-to-Source Current (A) BOTTOM 100 100 4.5V 4.5V ≤ 60μs PULSE WIDTH Tj = 25°C 10 0.1 1 10 100 ≤ 60μs PULSE WIDTH Tj = 175°C 10 0.1 1 10 100 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 1000 2.5 Fig 2. Typical Output Characteristics RDS(on) , Drain-to-Source On Resistance ID = 140A 2.0 ID, Drain-to-Source Current(Α) VGS = 10V 100 TJ = 175°C (Normalized) TJ = 25°C 10 1.5 1.0 VDS = 25V 1 2.0 3.0 4.0 5.0 ≤ 60μs PULSE WIDTH 6.0 7.0 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 VGS, Gate-to-Source Voltage (V) TJ , Junction Temperature (°C) Fig 3. Typical Transfer Characteristics 16000 VGS = 0V, f = 100 kHz Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd Fig 4. Normalized On-Resistance vs. Temperature 16 VGS, Gate-to-Source Voltage (V) ID= 140A 12 VDS = 60V VDS = 38V 12000 C, Capacitance (pF) Ciss 8000 8 4000 4 Coss Crss 0 1 10 100 0 0 40 80 120 160 200 240 QG Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage www.irf.com 3 IRFS/SL3107PbF 1000 10000 ID, Drain-to-Source Current (A) ISD , Reverse Drain Current (A) TJ = 175°C 100 OPERATION IN THIS AREA LIMITED BY R DS (on) 100μsec 1000 100 1msec 10 LIMITED BY PACKAGE 10 TJ = 25°C 10msec 1 Tc = 25°C Tj = 175°C Single Pulse 0.1 1 10 1 VGS = 0V 0.1 0.0 0.5 1.0 1.5 2.0 2.5 DC 0.1 100 VSD, Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage V(BR)DSS , Drain-to-Source Breakdown Voltage Fig 8. Maximum Safe Operating Area 100 250 LIMITED BY PACKAGE 200 ID , Drain Current (A) ID = 5mA 90 150 100 80 50 0 25 50 75 100 125 150 175 TC , Case Temperature (°C) 70 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature (°C) Fig 9. Maximum Drain Current vs. Case Temperature 4.0 Fig 10. Drain-to-Source Breakdown Voltage 1400 EAS, Single Pulse Avalanche Energy (mJ) 1200 1000 800 600 400 200 0 3.0 ID 21A 49A BOTTOM 140A TOP Energy (μJ) 2.0 1.0 0.0 0 20 40 60 80 25 50 75 100 125 150 175 VDS, Drain-to-Source Voltage (V) Starting TJ, Junction Temperature (°C) Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy Vs. DrainCurrent 4 www.irf.com IRFS/SL3107PbF 1 Thermal Response ( Z thJC ) D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 τJ τJ τ1 τ1 R1 R1 τ2 R2 R2 R3 R3 τC τ2 τ3 τ3 τ 0.01 Ri (°C/W) τι (sec) 0.001 SINGLE PULSE ( THERMAL RESPONSE ) Ci= τi/Ri Ci= τi/Ri 0.047711 0.000071 0.16314 0.000881 0.189304 0.007457 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 0.001 0.01 0.1 0.0001 1E-006 1E-005 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔTj = 150°C and Tstart =25°C (Single Pulse) Avalanche Current (A) 100 0.01 0.05 10 0.10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔΤ j = 25°C and Tstart = 150°C. 1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current vs.Pulsewidth 350 300 EAR , Avalanche Energy (mJ) TOP Single Pulse BOTTOM 1% Duty Cycle ID = 140A 250 200 150 100 50 0 25 50 75 100 125 150 175 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Starting TJ , Junction Temperature (°C) Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com 5 IRFS/SL3107PbF 4.5 32 VGS(th) Gate threshold Voltage (V) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 -75 -50 -25 0 25 50 75 ID = 1.0A ID = 1.0mA ID = 250μA IRRM - (A) 24 16 8 IF = 90A VR = 64V TJ = 125°C TJ = 25°C 100 200 300 400 500 600 700 800 900 0 100 125 150 175 TJ , Temperature ( °C ) dif / dt - (A / μs) Fig 16. Threshold Voltage Vs. Temperature 32 Fig. 17 - Typical Recovery Current vs. dif/dt 800 24 600 QRR - (nC) IRRM - (A) 16 400 8 IF = 135A VR = 64V TJ = 125°C TJ = 25°C 100 200 300 400 500 600 700 800 900 200 IF = 90A VR = 64V TJ = 125°C TJ = 25°C 100 200 300 400 500 600 700 800 900 0 0 dif / dt - (A / μs) dif / dt - (A / μs) Fig. 18 - Typical Recovery Current vs. dif/dt 800 Fig. 19 - Typical Stored Charge vs. dif/dt 600 QRR - (nC) 400 200 IF = 135A VR = 64V TJ = 125°C TJ = 25°C 100 200 300 400 500 600 700 800 900 1000 0 dif / dt - (A / μs) 6 Fig. 20 - Typical Stored Charge vs. dif/dt www.irf.com IRFS/SL3107PbF D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt ‚ - - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD VDD + - Re-Applied Voltage Body Diode Forward Drop Inductor Curent Inductor Current Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V tp DRIVER VDS L RG VGS 20V D.U.T IAS tp + V - DD A 0.01Ω I AS Fig 22a. Unclamped Inductive Test Circuit VDS VGS RG RD Fig 22b. Unclamped Inductive Waveforms VDS 90% D.U.T. + - VDD V10V GS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 10% VGS td(on) tr t d(off) tf Fig 23a. Switching Time Test Circuit Current Regulator Same Type as D.U.T. Fig 23b. Switching Time Waveforms Id Vds Vgs 50KΩ 12V .2μF .3μF D.U.T. VGS 3mA + V - DS Vgs(th) IG ID Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr www.irf.com Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform 7 IRFS/SL3107PbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN T HE AS SEMBLY LINE "C" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C OR INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPT IONAL) YEAR 7 = 1997 WEEK 19 A = AS S EMBLY S IT E CODE Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 8 www.irf.com IRFS/SL3107PbF D2Pak (TO-263AB) Package Outline Dimensions are shown in millimeters (inches) D2Pak (TO-263AB) Part Marking Information T HIS IS AN IRF530S WIT H LOT CODE 8024 AS S EMBLED ON WW 02, 2000 IN T HE AS S EMBLY LINE "L" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER F530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L OR INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER F530S DAT E CODE P = DES IGNAT ES LEAD - FREE PRODUCT (OPT IONAL) YEAR 0 = 2000 WEEK 02 A = AS S EMBLY S IT E CODE Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 9 IRFS/SL3107PbF D2Pak (TO-263AB) Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION 1.85 (.073) 1.65 (.065) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 10/2008 10 www.irf.com