IRFSL3306PBF

PD - 97098 IRFB3306PbF IRFS3306PbF IRFSL3306PbF HEXFET® Power MOSFET Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free D G S VDSS RDS(on) typ. max. ID D 60V 3.3m: 4.2m: 160A D D G D S G D S G D S TO-220AB IRFB3306PbF G D2Pak IRFS3306PbF D TO-262 IRFSL3306PbF S Gate Drain Source Absolute Maximum Ratings Symbol ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG Parameter Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current d Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery f Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw Max. 160c 110c 620 230 1.5 ± 20 14 -55 to + 175 300 10lbxin (1.1Nxm) 200 See Fig. 14, 15, 22a, 22b, Units A W W/°C V V/ns °C Avalanche Characteristics EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy e Avalanche Current c Repetitive Avalanche Energy g mJ A mJ Thermal Resistance Symbol RθJC RθCS RθJA RθJA Parameter Junction-to-Case k Case-to-Sink, Flat Greased Surface , TO-220 Junction-to-Ambient, TO-220 k Junction-to-Ambient (PCB Mount) , D Pak jk 2 Typ. ––– 0.50 ––– ––– Max. 0.65 ––– 62 40 Units °C/W www.irf.com 1 6/5/06 IRFB/S/SL3306PbF Static @ TJ = 25°C (unless otherwise specified) Symbol V(BR)DSS RDS(on) VGS(th) IDSS IGSS RG Parameter Drain-to-Source Breakdown Voltage Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance Min. Typ. Max. Units 60 ––– ––– 2.0 ––– ––– ––– ––– ––– ––– 0.07 3.3 ––– ––– ––– ––– ––– 0.7 ––– ––– 4.2 4.0 20 250 100 -100 ––– Ω nA V Conditions VGS = 0V, ID = 250µA ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient V/°C Reference to 25°C, ID = 5mAd mΩ VGS = 10V, ID = 75A g V µA VDS = VGS, ID = 150µA VDS = 60V, VGS = 0V VDS = 48V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V Dynamic @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. Typ. Max. Units 230 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 85 20 26 59 15 76 40 77 4520 500 250 720 880 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– pF ns ––– 120 ––– S nC ID = 75A VDS =30V VGS = 10V g Conditions VDS = 50V, ID = 75A ID = 75A, VDS =0V, VGS = 10V VDD = 30V ID = 75A RG = 2.7Ω VGS = 10V g VGS = 0V VDS = 50V ƒ = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 0V to 48V i, See Fig. 11 VGS = 0V, VDS = 0V to 48V h Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– Coss eff. (TR) Effective Output Capacitance (Time Related)h ––– Diode Characteristics Symbol IS ISM VSD trr Qrr IRRM ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) d Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time Min. Typ. Max. Units ––– ––– ––– ––– ––– ––– ––– ––– ––– 160c ––– ––– 31 35 34 45 1.9 ––– A nC 620 1.3 A A V ns Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25°C, IS = 75A, VGS = 0V g TJ = 25°C TJ = 125°C TJ = 25°C TJ = 125°C TJ = 25°C VR = 51V, IF = 75A di/dt = 100A/µs g G S D Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes:  Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A ‚ Repetitive rating; pulse width limited by max. junction temperature. ƒ Limited by TJmax, starting TJ = 25°C, L = 0.07mH RG = 25Ω, IAS = 75A, VGS =10V. Part not recommended for use above this value. „ ISD ≤ 75A, di/dt ≤ 1400A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. … Pulse width ≤ 400µs; duty cycle ≤ 2%. † Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. ‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom ‰ Rθ is measured at TJ approximately 90°C Coss while VDS is rising from 0 to 80% VDSS. mended footprint and soldering techniques refer to application note #AN-994. 2 www.irf.com IRFB/S/SL3306PbF 1000 TOP 1000 VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V TOP VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) BOTTOM BOTTOM 100 100 4.5V 4.5V ≤ 60µs PULSE WIDTH Tj = 25°C 10 0.1 1 10 100 ≤ 60µs PULSE WIDTH Tj = 175°C 10 0.1 1 10 100 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 1000 2.5 Fig 2. Typical Output Characteristics RDS(on) , Drain-to-Source On Resistance ID = 75A 2.0 ID, Drain-to-Source Current(Α) VGS = 10V 100 TJ = 175°C 10 (Normalized) 1.5 TJ = 25°C 1 1.0 VDS = 25V 0.1 2.0 3.0 4.0 5.0 ≤ 60µs PULSE WIDTH 6.0 7.0 8.0 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 VGS, Gate-to-Source Voltage (V) TJ , Junction Temperature (°C) Fig 3. Typical Transfer Characteristics 8000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd Fig 4. Normalized On-Resistance vs. Temperature 20 VGS, Gate-to-Source Voltage (V) ID= 75A VDS = 48V VDS= 30V VDS= 12V 16 6000 C, Capacitance (pF) Ciss 4000 12 8 2000 4 Coss Crss 0 1 10 100 0 0 20 40 60 80 100 120 140 QG Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage www.irf.com 3 IRFB/S/SL3306PbF 1000 10000 ID, Drain-to-Source Current (A) OPERATION IN THIS AREA LIMITED BY R DS (on) ISD , Reverse Drain Current (A) 100 1000 1msec 100µsec TJ = 175°C 100 10 TJ = 25°C 10 10msec 1 1 VGS = 0V 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Tc = 25°C Tj = 175°C Single Pulse 0.1 1 DC 0.1 10 100 VSD , Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage V(BR)DSS , Drain-to-Source Breakdown Voltage Fig 8. Maximum Safe Operating Area 80 160 LIMITED BY PACKAGE 120 ID = 5mA ID , Drain Current (A) 70 80 60 40 0 25 50 75 100 125 150 175 TC , Case Temperature (°C) 50 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature (°C) Fig 9. Maximum Drain Current vs. Case Temperature 1.5 Fig 10. Drain-to-Source Breakdown Voltage 800 EAS, Single Pulse Avalanche Energy (mJ) 600 ID 13A 17A BOTTOM 75A TOP 1.0 Energy (µJ) 400 0.5 200 0.0 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 VDS, Drain-to-Source Voltage (V) Starting TJ, Junction Temperature (°C) Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy Vs. DrainCurrent 4 www.irf.com IRFB/S/SL3306PbF 1 D = 0.50 Thermal Response ( Z thJC ) 0.1 0.20 0.10 0.05 0.02 0.01 0.01 τJ R1 R1 τJ τ1 τ2 R2 R2 τC Ri (°C/W) 0.249761 τι (sec) 0.00028 τ1 τ2 0.001 SINGLE PULSE ( THERMAL RESPONSE ) Ci= τi/Ri 0.400239 0.005548 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 0.001 0.01 0.1 0.0001 1E-006 1E-005 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 100 Duty Cycle = Single Pulse 0.01 Avalanche Current (A) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆ Tj = 150°C and Tstart =25°C (Single Pulse) 0.05 10 0.10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and Tstart = 150°C. 1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current vs.Pulsewidth 200 EAR , Avalanche Energy (mJ) 160 TOP Single Pulse BOTTOM 1% Duty Cycle ID = 75A 120 80 40 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) 175 0 25 50 75 100 125 150 Starting TJ , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com 5 IRFB/S/SL3306PbF 4.5 16 VGS(th) Gate threshold Voltage (V) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 -75 -50 -25 0 25 50 75 ID = 1.0A ID = 1.0mA ID = 250µA ID = 150µA IRRM - (A) 12 8 4 IF = 30A VR = 51V TJ = 125°C TJ = 25°C 100 200 300 400 500 600 700 800 900 1000 0 100 125 150 175 TJ , Temperature ( °C ) dif / dt - (A / µs) Fig 16. Threshold Voltage Vs. Temperature 16 Fig. 17 - Typical Recovery Current vs. dif/dt 350 300 12 250 QRR - (nC) IF = 45A VR = 51V TJ = 125°C TJ = 25°C 100 200 300 400 500 600 700 800 900 1000 IRRM - (A) 200 150 100 50 0 IF = 30A VR = 51V TJ = 125°C TJ = 25°C 100 200 300 400 500 600 700 800 900 1000 8 4 0 dif / dt - (A / µs) dif / dt - (A / µs) Fig. 18 - Typical Recovery Current vs. dif/dt 350 300 250 Fig. 19 - Typical Stored Charge vs. dif/dt QRR - (nC) 200 150 100 50 0 IF = 45A VR = 51V TJ = 125°C TJ = 25°C 100 200 300 400 500 600 700 800 900 1000 dif / dt - (A / µs) 6 Fig. 20 - Typical Stored Charge vs. dif/dt www.irf.com IRFB/S/SL3306PbF D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt ‚ - - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD VDD + - Re-Applied Voltage Body Diode Forward Drop Inductor Curent Inductor Current Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V tp DRIVER VDS L RG VGS 20V D.U.T IAS tp + V - DD A 0.01Ω I AS Fig 22a. Unclamped Inductive Test Circuit LD VDS Fig 22b. Unclamped Inductive Waveforms + VDD D.U.T VGS Pulse Width < 1µs Duty Factor < 0.1% 90% VDS 10% VGS td(on) tr td(off) tf Fig 23a. Switching Time Test Circuit Current Regulator Same Type as D.U.T. Fig 23b. Switching Time Waveforms Id Vds Vgs 50KΩ 12V .2µF .3µF D.U.T. VGS 3mA + V - DS Vgs(th) IG ID Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr www.irf.com Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform 7 IRFB/S/SL3306PbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information EXAMPLE: T HIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 2000 IN T HE AS S EMBLY LINE "C" Note: "P" in ass embly line pos ition indicates "Lead - Free" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 0 = 2000 WEEK 19 LINE C TO-220AB packages are not recommended for Surface Mount Application. 8 www.irf.com IRFB/S/SL3306PbF TO-262 Package Outline (Dimensions are shown in millimeters (inches)) TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL3103L LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN T HE AS S EMBLY LINE "C" INT ERNATIONAL RECTIFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C OR INT ERNATIONAL RECTIFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE P = DES IGNATES LEAD-FREE PRODUCT (OPT IONAL) YEAR 7 = 1997 WEEK 19 A = AS S EMBLY S ITE CODE www.irf.com 9 IRFB/S/SL3306PbF D2Pak Package Outline (Dimensions are shown in millimeters (inches)) D2Pak Part Marking Information T HIS IS AN IRF530S WIT H LOT CODE 8024 ASS EMBLED ON WW 02, 2000 IN T HE AS S EMBLY LINE "L" INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER F530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L OR INT ERNAT IONAL RECT IFIER LOGO AS SEMBLY LOT CODE PART NUMBER F530S DAT E CODE P = DES IGNAT ES LEAD - FREE PRODUCT (OPT IONAL) YEAR 0 = 2000 WEEK 02 A = AS S EMBLY SIT E CODE 10 www.irf.com IRFB/S/SL3306PbF D2Pak Tape & Reel Information TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION 1.85 (.073) 1.65 (.065) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 06/06 www.irf.com 11