IRL1404S

PD - 93854A Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l 175°C Operating Temperature l Fast Switching l Fully Avalanche Rated Description l HEXFET® Power MOSFET D IRL1404S IRL1404L VDSS = 40V G S RDS(on) = 0.004Ω ID = 160A† Seventh Generation HEXFET® power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL1404L) is available for lowprofile applications. D2Pak IRL1404S TO-262 IRL1404L Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TA = 25°C PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy‚ Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt ƒ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 160† 110† 640 3.8 200 1.3 ± 20 520 95 20 5.0 -55 to + 175 300 (1.6mm from case) Units A W W W/°C V mJ A mJ V/ns °C Thermal Resistance Parameter RθJC RθCS RθJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient (PCB Mounted)‡ Typ. ––– 0.50 ––– Max. 0.75 ––– 40 Units °C/W www.irf.com 1 02/22/02 IRL1404S/IRL1404L Electrical Characteristics @ TJ = 25°C (unless otherwise specified) V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance … Min. Typ. Max. Units Conditions 40 ––– ––– V VGS = 0V, I D = 250µA ––– 0.038 ––– V/°C Reference to 25°C, D = 1mA ––– ––– 0.004 Ω VGS = 10V, ID = 95A „ 0.0059 VGS = 4.3V, ID = 40A „ 1.0 ––– 3.0 V VDS = VGS, ID = 250µA 93 ––– ––– S VDS = 25V, ID = 95A ––– ––– 20 VDS = 40V, VGS = 0V µA ––– ––– 250 VDS = 32V, VGS = 0V, TJ = 150°C ––– ––– 200 VGS = 20V nA ––– ––– -200 VGS = -20V ––– ––– 140 ID = 95A ––– ––– 48 nC VDS = 32V ––– ––– 60 VGS = 5.0V, See Fig. 6 „ ––– 18 ––– VDD = 20V ns ––– 270 ––– ID = 95A ––– 38 ––– RG = 2.5Ω VGS = 4.5V ––– 130 ––– RD = 0.25Ω „ D Between lead, 4.5 ––– nH ––– 6mm (0.25in.) G from package 7.5 ––– ––– and center of die contact S ––– 6600 ––– VGS = 0V ––– 1700 ––– pF VDS = 25V ––– 350 ––– ƒ = 1.0MHz, See Fig. 5 ––– 6700 ––– VGS = 0V, V DS = 1.0V, ƒ = 1.0MHz ––– 1500 ––– VGS = 0V, VDS = 32V, ƒ = 1.0MHz ––– 1500 ––– VGS = 0V, VDS = 0V to 32V Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 160† showing the A G integral reverse ––– ––– 640 S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 95A, VGS = 0V „ ––– 63 94 ns TJ = 25°C, IF = 95A ––– 170 250 nC di/dt = 100A/µs „ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2 www.irf.com IRL1404S/IRL1404L 1000 I D , Drain-to-Source Current (A) 4.3V I D , Drain-to-Source Current (A)  VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.3V TOP 1000  VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.3V TOP 4.3V 100 100 10 0.1 20µs PULSE WIDTH  T = 25 C J ° 1 10 100 10 0.1 20µs PULSE WIDTH  T = 175 C J ° 1 10 100 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 2.5 TJ = 25 ° C  TJ = 175 ° C  R DS(on) , Drain-to-Source On Resistance (Normalized) ID = 160A  I D , Drain-to-Source Current (A) 2.0 1.5 1.0 0.5 100 4.0  V DS = 15V 20µs PULSE WIDTH 7.0 5.0 6.0 8.0 0.0 -60 -40 -20 VGS = 10V  0 20 40 60 80 100 120 140 160 180 VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( ° C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRL1404S/IRL1404L 10000 VGS , Gate-to-Source Voltage (V) 8000  VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd 20 ID = 95A  16  VDS = 32V VDS = 20V C, Capacitance (pF) Ciss  6000 12 4000 8 2000 C oss C rss 1 10 100 4 0 0 0 100 200 FOR TEST CIRCUIT  SEE FIGURE 13 300 400 500 VDS , Drain-to-Source Voltage (V) QG , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 10000 ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY R  DS(on) 100 TJ = 175 ° C  I D , Drain Current (A) 1000  10us  100us  1ms 10 TJ = 25 ° C  100 1 0.0 V GS = 0 V  0.5 1.0 1.5 2.0 2.5 3.0 10  TC = 25 ° C TJ = 175 ° C Single Pulse 1 10  10ms 100 VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRL1404S/IRL1404L 160  PACKAGE LIMITED BY VGS 120 VDS RD D.U.T. + I D , Drain Current (A) RG -VDD 10V 80 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 40 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS td(on) tr t d(off) tf Fig 9. Maximum Drain Current Vs. Case Temperature 1 D = 0.50 Thermal Response (Z thJC ) 0.20 0.1 0.10 0.05 0.02 0.01 0.01 SINGLE PULSE  (THERMAL RESPONSE) 0.001 0.00001  Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.1 0.0001 0.001 0.01  PDM t1 t2 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRL1404S/IRL1404L 1 5V EAS , Single Pulse Avalanche Energy (mJ) 1200 1000 VDS L D R IV E R  TOP BOTTOM ID 39A 67A 95A 800 RG 20V tp D .U .T IA S + V - DD A 600 0 .0 1 Ω Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp 400 200 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature( ° C) IAS Fig 12b. Unclamped Inductive Waveforms Fig 12c. Maximum Avalanche Energy Vs. Drain Current QG Current Regulator Same Type as D.U.T. 10 V QGS VG QGD 12V .2µF 50KΩ .3µF D.U.T. VGS 3mA + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 6 www.irf.com IRL1404S/IRL1404L Peak Diode Recovery dv/dt Test Circuit D.U.T* + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG VGS • dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test + VDD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt [VDD] Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% [ ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET® power MOSFETs www.irf.com 7 IRL1404S/IRL1404L D2Pak Package Outline Dimensions are shown in millimeters (inches) 1 0.54 (.4 15) 1 0.29 (.4 05) 1.4 0 (.055 ) M AX. -A2 4.69 (.1 85) 4.20 (.1 65) -B 1.3 2 (.05 2) 1.2 2 (.04 8) 1 0.16 (.4 00 ) RE F. 6.47 (.2 55 ) 6.18 (.2 43 ) 15 .4 9 (.6 10) 14 .7 3 (.5 80) 5 .28 (.20 8) 4 .78 (.18 8) 2.7 9 (.110 ) 2.2 9 (.090 ) 2.61 (.1 03 ) 2.32 (.0 91 ) 1.3 9 (.0 5 5) 1.1 4 (.0 4 5) 8.8 9 (.3 50 ) R E F. 1.7 8 (.07 0) 1.2 7 (.05 0) 1 3 3X 1.40 (.0 55) 1.14 (.0 45) 5 .08 (.20 0) 0 .93 (.03 7 ) 3X 0 .69 (.02 7 ) 0 .25 (.01 0 ) M BAM 0.5 5 (.022 ) 0.4 6 (.018 ) M IN IM U M R E CO M M E ND E D F O O TP R IN T 1 1.43 (.4 50 ) NO TE S: 1 D IM EN S IO N S A FTER SO L D ER D IP. 2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2. 3 C O N TRO L LIN G D IM EN SIO N : IN C H . 4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S. LE A D A SS IG N M E N TS 1 - G A TE 2 - D R AIN 3 - S O U RC E 8.89 (.3 50 ) 17 .78 (.70 0) 3 .8 1 (.15 0) 2 .08 (.08 2) 2X 2.5 4 (.100 ) 2X D2Pak Part Marking Information THIS IS AN IRF530S WITH LOT CODE 8024 ASSEMBLED ON WW 02, 2000 IN THE ASSEMBLY LINE "L" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER F530S DATE CODE YEAR 0 = 2000 WEEK 02 LINE L 8 www.irf.com IRL1404S/IRL1404L TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL3103L LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C www.irf.com 9 IRL1404S/IRL1404L D2Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TR R 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 ( .16 1 ) 3 .9 0 ( .15 3 ) 1.6 0 ( .06 3) 1.5 0 ( .05 9) 0 .3 6 8 (.0 14 5) 0 .3 4 2 (.0 13 5) F EED D IRE CTION 1 .8 5 ( .0 73 ) 1 .6 5 ( .0 65 ) 11 .60 (.4 57 ) 11 .40 (.4 49 ) 15 .42 (.6 09 ) 15 .22 (.6 01 ) 24 .30 (.9 57 ) 23 .90 (.9 41 ) TRL 1 0.9 0 (. 42 9) 1 0.7 0 (. 42 1) 1.7 5 ( .06 9) 1.2 5 ( .04 9) 16 .10 (.6 34 ) 15 .90 (.6 26 ) 4.7 2 (.1 36 ) 4.5 2 (.1 78 ) FE ED D IRE CT ION 13 .50 ( .532) 12 .80 ( .504) 27.40 (1 .079) 23.90 (.9 41) 4 330 .00 (14.173) MA X. 60.00 (2 .362) M IN . N OTES : 1. C O M F O R M S T O E IA - 418. 2. C O N T R O LLIN G D IM E N S IO N : M ILLIM E T ER . 3. D IM E N S IO N M E A S U R E D @ H U B . 4. IN C LU D E S F LA N G E D IS T O R T IO N @ O U T E R E D G E . 2 6.40 (1.03 9) 2 4.40 (.961 ) 3 0.40 (1.197) MAX. 4 3 Notes:  Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ‚ Starting TJ = 25°C, L = 0.35mH RG = 25Ω, I AS = 95A. (See Figure 12) ƒ ISD ≤ 95A, di/dt ≤ 160A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C „ Pulse width ≤ 300µs; duty cycle ≤ 2%. † Calculated continuous current based on maximum allowable junction temperature; for recommended current-handing of the package refer to Design Tip # 93-4. This is applied to D2Pak, When mounted on 1" square PCB (FR-4 or G-10 Material) . For recommended footprint and soldering techniques refer to application note #AN-994. ‡ … Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.02/02 10 www.irf.com