IRLI2910

PD - 9.1384B PRELIMINARY Logic-Level Gate Drive Advanced Process Technology l Ultra Low On-Resistance l Isolated Package l High Voltage Isolation = 2.5KVRMS … l Sink to Lead Creepage Dist. = 4.8mm l Fully Avalanche Rated Description l l IRLI2910 HEXFET® Power MOSFET D VDSS = 100V RDS(on) = 0.026Ω G ID = 31A S Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing. TO-220 FULLPAK Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current † Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy‚† Avalanche Current† Repetitive Avalanche Energy Peak Diode Recovery dv/dt ƒ† Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew Max. 31 22 190 63 0.42 ±16 520 29 6.3 5.0 -55 to + 175 300 (1.6mm from case ) 10 lbf•in (1.1N•m) Units A W W/°C V mJ A mJ V/ns °C Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient Typ. ––– ––– Max. 2.4 65 Units °C/W °C/W 3/16/98 IRLI2910 Electrical Characteristics @ TJ = 25°C (unless otherwise specified) V(BR)DSS ∆V(BR)DSS/∆TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Drain to Sink Capacitance RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss C Min. Typ. Max. Units Conditions 100 ––– ––– V VGS = 0V, ID = 250µA ––– 0.12 ––– V/°C Reference to 25°C, ID = 1mA† ––– ––– 0.026 VGS = 10V, ID = 16A „ ––– ––– 0.030 Ω VGS = 5.0V, ID = 16A „ ––– ––– 0.040 VGS = 4.0V, ID = 14A „ 1.0 ––– 2.0 V VDS = VGS, ID = 250µA 28 ––– ––– S VDS = 50V, ID = 29A† ––– ––– 25 VDS = 100V, VGS = 0V µA ––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C ––– ––– 100 VGS = 16V nA ––– ––– -100 VGS = -16V ––– ––– 140 ID = 29A ––– ––– 20 nC VDS = 80V ––– ––– 81 VGS = 5.0V, See Fig. 6 and 13 „† ––– 11 ––– VDD = 50V ––– 100 ––– ID = 29A ns ––– 49 ––– RG = 1.4Ω, VGS = 5.0V ––– 55 ––– RD = 1.7Ω, See Fig. 10 „† Between lead, ––– 4.5 ––– 6mm (0.25in.) nH G from package ––– 7.5 ––– and center of die contact ––– 3700 ––– VGS = 0V ––– 630 ––– VDS = 25V pF ––– 330 ––– ƒ = 1.0MHz, See Fig. 5† ––– 12 ––– ƒ = 1.0MHz D S Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) † Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Min. Typ. Max. Units ––– ––– ––– ––– ––– ––– ––– ––– 240 1.8 31 A 190 1.3 350 2.7 V ns µC Conditions MOSFET symbol showing the G integral reverse p-n junction diode. TJ = 25°C, IS = 16A, VGS = 0V „ TJ = 25°C, IF = 29A di/dt = 100A/µs „† D S Notes:  Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ‚ VDD = 25V, starting TJ = 25°C, L = 1.2mH RG = 25Ω, IAS = 29A. (See Figure 12) ƒ ISD ≤ 29A, di/dt ≤ 490A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C „ Pulse width ≤ 300µs; duty cycle ≤ 2%. … t=60s, ƒ=60Hz † Uses IRL2910 data and test conditions IRLI2910 1000 V GS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP 1000 ID , D rain-to-S ource C urrent (A ) 100 ID , D rain-to-S ource C urrent (A ) V GS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP 100 10 10 2.5V 2.5V 1 0.1 1 2 0µ s P U LS E W ID TH T J = 25°C 10 A 1 0.1 1 2 0µ s P U LS E W ID TH T J = 175°C 10 100 A 100 V D S , D rain-to-S ource V oltage (V ) V D S , D rain-to-S ource V oltage (V ) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 3.0 R D S (on ) , D rain-to -S ource O n R esistance (N orm alized) I D = 4 8A I D , D ra in -to-S o urc e C urren t (A ) 2.5 100 TJ = 2 5 °C TJ = 1 7 5 °C 2.0 1.5 10 1.0 0.5 1 2.0 2.5 3.0 3.5 4.0 V DS = 50V 2 0 µ s P U L S E W ID T H 4.5 5.0 5.5 6.0 A 0.0 -60 -40 -20 0 20 40 60 80 V G S = 1 0V 100 120 140 160 180 A V G S , G a te -to -S o u rc e V o lta g e ( V ) T J , Junction T em perature (°C ) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature IRLI2910 6000 15 5000 V G S , G ate-to-S ource V oltage (V ) V GS C iss C rss C i s s C oss = = = = 0V , f = 1M H z C gs + C gd , C ds S H O R TE D C gd C ds + C gd I D = 29A V D S = 8 0V V D S = 50V V D S = 20V 12 C , C apacitanc e (pF ) 4000 9 3000 C oss 2000 6 C rs s 1000 3 0 1 10 100 A 0 0 40 80 F O R TE S T C IR C U IT S E E FIG U R E 1 3 120 160 A 200 V D S , D rain-to-S ource V oltage (V ) Q G , T otal G ate C harge (nC ) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 1000 I S D , R everse D rain C urrent (A ) O P E R A TIO N IN TH IS A R E A LIM ITE D B Y R D S (on) I D , D rain C urrent (A ) 100 10µ s 100 100µ s T J = 175°C T J = 25°C 10 1m s 10m s 10 0.4 0.8 1.2 1.6 V G S = 0V A 1 1 T C = 2 5°C T J = 175°C S ingle P ulse 10 100 2.0 A 1000 V S D , S ource-to-D rain V olta g e (V ) V D S , D rain-to-S ource V oltage (V ) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area IRLI2910 35 VDS 30 RD VGS RG D.U.T. + I D , Drain Current (A) 25 -VDD 20 5.0V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 15 10 Fig 10a. Switching Time Test Circuit VDS 90% 5 0 25 50 75 100 125 150 175 TC , Case Temperature ( ° C) 10% VGS td(on) tr t d(off) tf Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms 10 Thermal Response (Z thJC ) D = 0.50 1 0.20 0.10 0.05 0.1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.01 0.1 1 10 P DM t1 t2 0.01 0.00001 0.0001 0.001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case IRLI2910 1400 E A S , S ingle P ulse A valanc he E nergy (m J) TO P 1200 1 5V B O TTO M 1000 ID 12A 20A 29 A VD S L D R IV E R 800 RG 20V D .U .T IA S tp + V - DD 600 A 0 .0 1 Ω 400 Fig 12a. Unclamped Inductive Test Circuit V (B R )D S S tp 200 0 V D D = 2 5V 25 50 75 100 125 150 A 175 S tarting T J , Junction T em perature (°C ) Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 5.0 V QGS VG QGD VGS 3mA D.U.T. + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit IRLI2910 Peak Diode Recovery dv/dt Test Circuit D.U.T + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS IRLI2910 Package Outline TO-220 Fullpak Outline Dimensions are shown in millimeters (inches) 10.60 (.417) 10.40 (.409) ø 3.40 (.133) 3.10 (.123) -A3.70 (.145) 3.20 (.126) 4.80 (.189) 4.60 (.181) 2.80 (.110) 2.60 (.102) LE A D A S S IG N ME N TS 1 - G A TE 2 - D R A IN 3 - SOURCE 7.10 (.280) 6.70 (.263) 16.00 (.630) 15.80 (.622) 1.15 (.045) M IN . 1 2 3 NOTES: 1 D IME N S IO N IN G & TO LE R A N C IN G P E R A N S I Y 14.5M , 1982 2 C O N TR O LLIN G D IM E N S IO N : IN C H . 3.30 (.130) 3.10 (.122) -B13.70 (.540) 13.50 (.530) C D A 1.40 (.055) 3X 1.05 (.042) 2.54 (.100) 2X 0.90 (.035) 3X 0.70 (.028) 0.25 (.010) M AM B 3X 0.48 (.019) 0.44 (.017) B 2.85 (.112) 2.65 (.104) M IN IM U M C R E E P A G E D IS TA N C E B E TW E E N A -B -C -D = 4.80 (.189) Part Marking Information TO-220 Fullpak E X A E X A M P L E : IS HIS A N A N F 1 0F I8 4 0 G M P L E : TH T IS IS IR IR 1 0 W AS EM EM W ITH ITH SA S SB L YB L Y L O TL O T D E D E 1E 4 0 1 CO CO 9B M A A IN TE R N A T IO N A L IN T E R N A T IO N A L R E C TIF IE R IR F F I81 0 G R E C T IF IE R IR 1 0 4 0 LOGO 9246 LOGO E 9 B 40 1 192 45 M ASSEMBL ASSEMBLY Y LO COD LOT T CODE E PART NUMBER PART NUMBER D A TE C O D E D WW (Y YA T E )C O D E (Y = W Y Y Y W Y E)A R Y = W AR WYW = YEE E K W W = W EEK WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T 3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: 171 (K&H Bldg.) 30-4 Nishi-ikebukuro 3-chome, Toshima-ku, Tokyo Japan Tel: 81 33 983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 16907 Tel: 65 221 8371 Data and specifications subject to change without notice. 3/98