PD - 97175A
AUTOMOTIVE MOSFET
Features
l l l l l
IRLR3110ZPbF IRLU3110ZPbF
HEXFET® Power MOSFET
D
Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
G
VDSS = 100V RDS(on) = 14mΩ
S
Description
Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
D-Pak I-Pak IRLR3110ZPbF IRLU3110ZPbF
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C ID @ TC = 100°C ID @ TC = 25°C IDM PD @TC = 25°C VGS EAS (Thermally limited) EAS (Tested ) IAR EAR TJ TSTG Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Single Pulse Avalanche Energy Tested Value Avalanche Current Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Reflow Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
Max.
63 45 42 250 140 0.95 ±16 110 140 See Fig.12a, 12b, 15, 16 -55 to + 175
Units
A
W W/°C V mJ A mJ °C
d
Ã
h
g
Thermal Resistance
RθJC RθJA RθJA
300 10 lbf in (1.1N m)
y
y
Junction-to-Case Junction-to-Ambient (PCB mount) Junction-to-Ambient
j
Parameter
Typ.
Max.
1.05 40 110
Units
°C/W
j
ij
––– ––– –––
HEXFET® is a registered trademark of International Rectifier.
www.irf.com
1
03/09/06
IRLR/U3110ZPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
100 ––– ––– ––– 1.0 52 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 0.077 11 12 ––– ––– ––– ––– ––– ––– 34 10 15 24 110 33 48 4.5 7.5 3980 310 130 1820 170 320 ––– ––– 14 16 2.5 ––– 20 250 200 -200 48 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– –––
Conditions
V VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 38A VGS = 4.5V, ID = 32A V VDS = VGS, ID = 100µA S VDS = 25V, ID = 38A µA VDS = 100V, VGS = 0V VDS = 100V, VGS = 0V, TJ = 125°C nA VGS = 16V VGS = -16V ID = 38A nC VDS = 50V VGS = 4.5V VDD = 50V ID = 38A ns RG = 3.7Ω VGS = 4.5V D Between lead,
e e
e e
nH
6mm (0.25in.) from package
G
pF
S and center of die contact VGS = 0V VDS = 25V ƒ = 1.0MHz VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz VGS = 0V, VDS = 80V, ƒ = 1.0MHz VGS = 0V, VDS = 0V to 80V
f
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
––– ––– ––– ––– ––– ––– ––– ––– 34 42 63 A 250 1.3 51 63 V ns nC
Conditions
MOSFET symbol showing the integral reverse
G D
Ã
S p-n junction diode. TJ = 25°C, IS = 38A, VGS = 0V TJ = 25°C, IF = 38A, VDD = 50V di/dt = 100A/µs
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
www.irf.com
IRLR/U3110ZPbF
1000
TOP VGS 15V 10V 8.0V 4.5V 3.5V 3.0V 2.7V 2.5V
1000
TOP VGS 15V 10V 8.0V 4.5V 3.5V 3.0V 2.7V 2.5V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
100
BOTTOM
10
BOTTOM
1
10 2.5V
0.1
2.5V
≤60µs PULSE WIDTH
0.01 0.1 1 Tj = 25°C 10
1
≤60µs PULSE WIDTH
Tj = 175°C 0.1 1 10 100 1000
100
1000
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
150
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current (Α)
125 100 75 50 25 0
T J = 25°C
100
T J = 175°C
10
T J = 175°C
1
T J = 25°C VDS = 25V ≤60µs PULSE WIDTH
V DS = 10V 300µs PULSE WIDTH 0 25 50 75
0.1 0 2 4 6 8 10 12 14 16
VGS, Gate-to-Source Voltage (V)
ID,Drain-to-Source Current (A)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance vs. Drain Current
www.irf.com
3
IRLR/U3110ZPbF
100000
VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd
5.0 ID= 38A
VGS, Gate-to-Source Voltage (V)
10000
C, Capacitance(pF)
4.0
Ciss 1000
VDS= 80V VDS= 50V
3.0
Coss Crss
2.0
100
1.0
10 1 10 VDS, Drain-to-Source Voltage (V) 100
0.0 0 10 20 30 40 QG Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED BY R DS(on)
100
T J = 175°C
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
100µsec
10
T J = 25°C
1msec 10msec DC
10
1 VGS = 0V 0.1 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VSD, Source-to-Drain Voltage (V)
Tc = 25°C Tj = 175°C Single Pulse 1 0 1 10 100 1000 VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
www.irf.com
IRLR/U3110ZPbF
70
RDS(on) , Drain-to-Source On Resistance (Normalized)
3.0 ID = 63A 2.5 Limited By Package VGS = 10V
60
ID, Drain Current (A)
50 40 30 20 10 0 25 50 75 100 125 150 175 T C , Case Temperature (°C)
2.0
1.5
1.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 T J , Junction Temperature (°C)
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10. Normalized On-Resistance vs. Temperature
10
Thermal Response ( Z thJC )
1
D = 0.50 0.20
0.1
0.10 0.05 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE )
τJ
R1 R1 τJ τ1 τ2
R2 R2 τC τ τ2
Ri (°C/W) τi (sec) 0.383 0.000267 0.667 0.003916
τ1
0.01
Ci= τi/Ri Ci i/Ri
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.01 0.1
0.001 1E-006 1E-005 0.0001 0.001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.irf.com
5
IRLR/U3110ZPbF
EAS , Single Pulse Avalanche Energy (mJ)
15V
300 250 200 150 100 50 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) ID 4.4A 6.5A BOTTOM 38A TOP
VDS
L
DRIVER
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy vs. Drain Current
10 V
QGS
QGD
VGS(th) Gate threshold Voltage (V)
3.0 2.5 2.0 1.5 1.0 0.5 0.0 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( °C )
VG
Charge
Fig 13a. Basic Gate Charge Waveform
ID = 100µA
ID = 250µA ID = 1.0A
ID = 1.0mA
L
0
DUT 1K
VCC
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage vs. Temperature
6
www.irf.com
IRLR/U3110ZPbF
100 Duty Cycle = Single Pulse
Avalanche Current (A)
10
0.01 0.05 0.10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and Tstart = 150°C.
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆ Tj = 150°C and Tstart =25°C (Single Pulse)
1
0.1 1.0E-06
1.0E-05
1.0E-04 tav (sec)
1.0E-03
1.0E-02
1.0E-01
Fig 15. Typical Avalanche Current vs.Pulsewidth
150 125 100 75 50 25 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) TOP Single Pulse BOTTOM 1% Duty Cycle ID = 38A
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as neither Tjmax nor Iav (max) is exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav
EAR , Avalanche Energy (mJ)
Fig 16. Maximum Avalanche Energy vs. Temperature
www.irf.com
7
IRLR/U3110ZPbF
Driver Gate Drive
D.U.T
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
• • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
RD
VDS VGS RG 10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
D.U.T.
+
-VDD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
www.irf.com
IRLR/U3110ZPbF
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
@Y6HQG@) UCDTÃDTÃ6IÃDSAS ! XDUCÃ6TT@H7G` GPUÃ8P9@Ã !"# 6TT@H7G@9ÃPIÃXXÃ %Ã! DIÃUC@Ã6TT@H7G`ÃGDI@ÃÅ6Å Ir)ÃÅQÅÃvÃhriyÃyvrÃvv vqvphrÃÅGrhqA
rrÅ DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S
,5)5 $
96U@Ã8P9@ `@6SÃ Ã2Ã! X@@FÃ % GDI@Ã6
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S
,5)5
96U@Ã8P9@ QÃ2Ã9@TDBI6U@TÃG@69AS@@ QSP9V8UÃPQUDPI6G `@6SÃ Ã2Ã! X@@FÃ % 6Ã2Ã6TT@H7G`ÃTDU@Ã8P9@
www.irf.com
9
IRLR/U3110ZPbF
I-Pak (TO-251AA) Package Outline
I-Pak (TO-251AA) Part Marking Information
@Y6HQG@) UCDTÃDTÃ6IÃDSAV ! XDUCÃ6TT@H7G` GPUÃ8P9@Ã$%&' 6TT@H7G@9ÃPIÃXXÃ (Ã! DIÃUC@Ã6TT@H7G`ÃGDI@ÃÅ6Å Ir)ÃÅQÅÃvÃhriyÃyvrÃvv vqvphrÃGrhqA
rrÅ DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S
,5)8 $
96U@Ã8P9@ `@6SÃ Ã2Ã! X@@FÃ ( GDI@Ã6
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S
,5)8
96U@Ã8P9@ QÃ2Ã9@TDBI6U@TÃG@69AS@@ QSP9V8UÃPQUDPI6G `@6SÃ Ã2Ã! X@@FÃ ( 6Ã2Ã6TT@H7G`ÃTDU@Ã8P9@
10
www.irf.com
IRLR/U3110ZPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL
16.3 ( .641 ) 15.7 ( .619 )
16.3 ( .641 ) 15.7 ( .619 )
12.1 ( .476 ) 11.9 ( .469 )
FEED DIRECTION
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.
Repetitive rating; pulse width limited by
Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25°C, L = 0.16mH
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive RG = 25Ω, IAS = 38A, VGS =10V. Part not avalanche performance. recommended for use above this value. This value determined from sample failure population. 100% Pulse width ≤ 1.0ms; duty cycle ≤ 2%. tested to this value in production. When mounted on 1" square PCB (FR-4 or G-10 Material). Rθ is measured at TJ approximately 90°C. Data and specifications subject to change without notice. This product has been designed for the Automotive [Q101] market. Qualification Standards can be found on IR’s Web site.
Notes:
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.03/06
www.irf.com
11