IRLU3636PBF

PD - 96224 Applications l DC Motor Drive l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits G IRLR3636PbF IRLU3636PbF HEXFET® Power MOSFET D Benefits l Optimized for Logic Level Drive l Very Low RDS(ON) at 4.5V VGS l Superior R*Q at 4.5V V GS l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free G S VDSS RDS(on) typ. max. ID (Silicon Limited) ID (Package Limited) D 60V 5.4m: 6.8m: 99A 50A c S G S D G D-Pak I-Pak IRLR3636PbF IRLU3636PbF D S Gate Drain Source Absolute Maximum Ratings Symbol ID @ TC = 25°C ID @ TC = 100°C ID @ TC = 25°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG Parameter Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 99 70 50 396 143 0.95 ±16 22 c c Units A d W W/°C V V/ns °C f -55 to + 175 300 (1.6mm from case) 170 See Fig.14, 15, 22a, 22b Avalanche Characteristics EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy d e d j mJ A mJ Thermal Resistance Symbol RθJC RθJA RθJA Junction-to-Case Junction-to-Ambient (PCB Mount) Junction-to-Ambient k Parameter Typ. ––– ––– ––– Max. 1.05 50 110 Units °C/W www.irf.com 1 02/06/09 IRLR/U3636PbF Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units 60 ––– ––– ––– 1.0 ––– ––– ––– ––– ––– Conditions V(BR)DSS Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient RDS(on) VGS(th) IDSS IGSS RG(int) Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance ––– 0.07 5.4 6.6 ––– ––– ––– ––– ––– 0.6 ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 5mA 6.8 VGS = 10V, ID = 50A mΩ 8.3 VGS = 4.5V, ID = 50A 2.5 V VDS = VGS, ID = 100µA VDS = 60V, VGS = 0V 20 µA 250 VDS = 60V, VGS = 0V, TJ = 125°C VGS = 16V 100 nA -100 VGS = -16V g g d ––– Ω Dynamic @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. Typ. Max. Units 31 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 33 11 15 18 45 216 43 69 3779 332 163 437 636 ––– 49 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– S Conditions Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related) ià h VDS = 25V, ID = 50A ID = 50A VDS = 30V nC VGS = 4.5V ID = 50A, VDS =0V, VGS = 4.5V VDD = 39V ID = 50A ns RG = 7.5 Ω VGS = 4.5V VGS = 0V VDS = 50V pF ƒ = 1.0MHz VGS = 0V, VDS = 0V to 48V ,See Fig.11 VGS = 0V, VDS = 0V to 48V g g i h Diode Characteristics Symbol IS ISM VSD trr Qrr IRRM ton Notes: Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Min. Typ. Max. Units ––– ––– ––– ––– 99 Conditions MOSFET symbol D ™ A Ãd Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 50A, VGS = 0V TJ = 25°C VR = 51V, ––– 27 ––– ns TJ = 125°C IF = 50A ––– 32 ––– di/dt = 100A/µs TJ = 25°C ––– 31 ––– nC TJ = 125°C ––– 43 ––– ––– 2.1 ––– A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 396 showing the integral reverse G g g  Calcuted continuous current based on maximum allowable junction temperature Bond wire current limit is 50A. Note that current limitation arising from heating of the device leds may occur with some lead mounting arrangements. ‚ Repetitive rating; pulse width limited by max. junction temperature. ƒ Limited by TJmax, starting TJ = 25°C, L = 0.136 mH RG = 25 Ω, IAS = 50A, VGS =10V. Part not recommended for use above this value . „ ISD ≤ 50A, di/dt ≤ 1109 A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. … Pulse width ≤ 400µs; duty cycle ≤ 2%. † Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . ‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For Coss while VDS is rising from 0 to 80% VDSS. recommended footprint and soldering techniquea refer to applocation note # AN- 994 echniques refer to application note #AN-994. ‰ Rθ is measured at TJ approximately 90°C. 2 www.irf.com IRLR/U3636PbF 1000 TOP VGS 15V 10V 4.5V 4.0V 3.5V 3.3V 3.0V 2.7V 1000 TOP VGS 15V 10V 4.5V 4.0V 3.5V 3.3V 3.0V 2.7V ID, Drain-to-Source Current (A) 100 BOTTOM ID, Drain-to-Source Current (A) 100 BOTTOM 10 10 2.7V 1 2.7V ≤60µs PULSE WIDTH Tj = 25°C ≤60µs PULSE WIDTH Tj = 175°C 1 0.1 1 10 100 0.1 0.1 1 10 100 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 1000 RDS(on) , Drain-to-Source On Resistance (Normalized) Fig 2. Typical Output Characteristics 2.5 ID = 50A VGS = 10V 2.0 ID, Drain-to-Source Current (A) 100 T J = 175°C T J = 25°C 10 1.5 1 VDS = 25V ≤60µs PULSE WIDTH 0.1 1 2 3 4 5 6 7 1.0 0.5 -60 -40 -20 0 20 40 60 80 100 120140 160180 T J , Junction Temperature (°C) VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 100000 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd Fig 4. Normalized On-Resistance vs. Temperature 5.0 4.5 VGS, Gate-to-Source Voltage (V) ID= 50A 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 VDS= 48V VDS= 30V VDS= 12V C, Capacitance (pF) 10000 Ciss 1000 Coss Crss 100 1 10 VDS, Drain-to-Source Voltage (V) 100 0.0 0 5 10 15 20 25 30 35 40 QG, Total Gate Charge (nC) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage www.irf.com 3 IRLR/U3636PbF 1000 1000 OPERATION IN THIS AREA LIMITED BY R (on) DS 100 T J = 175°C ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 100 100µsec 10 T J = 25°C 10 LIMITED BY PACKAGE 1msec 10msec 1 VGS = 0V 0.1 0.1 0.4 0.7 1 1.3 1.6 1.9 VSD, Source-to-Drain Voltage (V) 1 Tc = 25°C Tj = 175°C Single Pulse 0.1 1 10 DC 0.1 100 VDS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage V(BR)DSS , Drain-to-Source Breakdown Voltage (V) Fig 8. Maximum Safe Operating Area 80 Id = 5mA 75 70 65 60 55 50 -60 -40 -20 0 20 40 60 80 100 120140 160180 T J , Temperature ( °C ) 110 100 90 Limited By Package ID, Drain Current (A) 80 70 60 50 40 30 20 10 0 25 50 75 100 125 150 175 T C , Case Temperature (°C) Fig 9. Maximum Drain Current vs. Case Temperature 0.8 Fig 10. Drain-to-Source Breakdown Voltage 800 EAS , Single Pulse Avalanche Energy (mJ) 700 600 500 400 300 200 100 0 0.6 ID 5.69A 10.64A BOTTOM 50A TOP Energy (µJ) 0.4 0.2 0.0 0 5 10 15 20 25 30 35 40 45 50 55 60 65 VDS, Drain-to-Source Voltage (V) 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy vs. DrainCurrent 4 www.irf.com IRLR/U3636PbF 10 Thermal Response ( Z thJC ) °C/W 1 D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 0.1 τJ R1 R1 τJ τ1 τ2 R2 R2 R3 R3 τ3 R4 R4 τC τ τ4 Ri (°C/W) 0.02028 0.29406 0.49179 0.24336 τi (sec) 0.000011 0.000158 0.001393 0.00725 τ1 τ2 τ3 τ4 0.01 Ci= τi/Ri Ci i/Ri Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.001 0.01 0.1 0.001 1E-006 1E-005 0.0001 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Duty Cycle = Single Pulse Avalanche Current (A) 100 0.01 10 0.05 0.10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆ Tj = 150°C and Tstart =25°C (Single Pulse) 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and Tstart = 150°C. 0.1 1.0E-06 1.0E-05 1.0E-04 tav (sec) 1.0E-03 1.0E-02 1.0E-01 Fig 14. Typical Avalanche Current vs.Pulsewidth 200 TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 50A 150 100 50 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) 175 EAR , Avalanche Energy (mJ) 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com 5 IRLR/U3636PbF 3.0 VGS(th) , Gate threshold Voltage (V) 14 12 10 IRRM (A) 2.5 2.0 1.5 1.0 0.5 0.0 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) ID = 100µA ID = 250µA ID = 1.0mA ID = 1.0A IF = 20A V R = 51V TJ = 25°C TJ = 125°C 8 6 4 2 0 0 200 400 600 800 1000 diF /dt (A/µs) Fig 16. Threshold Voltage vs. Temperature 16 14 12 10 8 6 4 2 0 0 200 400 600 800 1000 diF /dt (A/µs) IF = 30A V R = 51V TJ = 25°C TJ = 125°C QRR (A) Fig. 17 - Typical Recovery Current vs. dif/dt 350 300 250 200 150 100 50 0 0 200 400 600 800 1000 diF /dt (A/µs) IF = 20A V R = 51V TJ = 25°C TJ = 125°C IRRM (A) Fig. 18 - Typical Recovery Current vs. dif/dt 350 300 250 QRR (A) Fig. 19 - Typical Stored Charge vs. dif/dt IF = 30A V R = 51V TJ = 25°C TJ = 125°C 200 150 100 50 0 0 200 400 600 800 1000 diF /dt (A/µs) 6 Fig. 20 - Typical Stored Charge vs. dif/dt www.irf.com IRLR/U3636PbF D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt ‚ - - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD VDD + - Re-Applied Voltage Body Diode Forward Drop Inductor Curent Inductor Current Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V tp DRIVER VDS L RG VGS 20V D.U.T IAS tp + V - DD A 0.01Ω I AS Fig 22a. Unclamped Inductive Test Circuit VDS VGS RG RD Fig 22b. Unclamped Inductive Waveforms VDS 90% D.U.T. + - VDD V10V GS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 10% VGS td(on) tr t d(off) tf Fig 23a. Switching Time Test Circuit Current Regulator Same Type as D.U.T. Fig 23b. Switching Time Waveforms Id Vds Vgs 50KΩ 12V .2µF .3µF D.U.T. VGS 3mA + V - DS Vgs(th) IG ID Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr www.irf.com Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform 7 IRLR/U3636PbF Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Package Outline D-Pak (TO-252AA) Part Marking Information @Y6HQG@) UCDTÃDTÃ6IÃDSAS XDUCÃ6TT@H7G` GPUÃ8P9@à !"# %Ã! ! Q6SUÃIVH7@S DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G@9ÃPIÃXXà DIÃUC@Ã6TT@H7G`ÃGDI@ÃÅ6Å ,5)5 $   96U@Ã8P9@ `@6Sà X@@Fà GDI@Ã6 Ã2Ã! % I‚‡r)ÃÅQÅÃvÃh††r€iy’Ãyvr†v‡v‚ vqvph‡r†ÃÅGrhqA…rrÅ 6TT@H7G` GPUÃ8P9@ ÅQÅÃvÃh††r€iy’Ãyvr†v‡v‚Ãvqvph‡r† ÅGrhqA…rrÅĈhyvsvph‡v‚Ã‡‚ÇurÃp‚†ˆ€r…yr‰ry 25 Q6SUÃIVH7@S DIU@SI6UDPI6G S@8UDAD@S GPBP 9 6U@Ã8P9@ QÃ2Ã9@TDBI6U@TÃG@69AS@@ QSP9V8UÃPQUDPI6G QÃ2Ã9@TDBI6U@TÃG@69AS@@ QSP9V8UÃRV6GDAD@9ÃUPÃUC@ 8PITVH@SÃG@W@GÃPQUDPI6G `@6Sà X@@Fà Ã2Ã! % ,5)5   6TT@H7G` GPUÃ8P9@ 6Ã2Ã6TT@H7G`ÃTDU@Ã8P9@ Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 8 www.irf.com IRLR/U3636PbF I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches) I-Pak (TO-251AA) Part Marking Information @Y6HQG@) UCDTÃDTÃ6IÃDSAV ! XDUCÃ6TT@H7G` GPUÃ8P9@Ã$%&' 6TT@H7G@9ÃPIÃXXà (Ã! DIÃUC@Ã6TT@H7G`ÃGDI@ÃÅ6Å I‚‡r)ÃÅQÅÃvÃh††r€iy’Ãyvr†v‡v‚ vqvph‡r†ÃGrhqA…rrÅ DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S ,5)8 $   96U@Ã8P9@ `@6Sà Ã2Ã! X@@Fà ( GDI@Ã6 25 DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S ,5)8   96U@Ã8P9@ QÃ2Ã9@TDBI6U@TÃG@69AS@@ QSP9V8UÃPQUDPI6G `@6Sà Ã2Ã! X@@Fà ( 6Ã2Ã6TT@H7G`ÃTDU@Ã8P9@ Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 9 IRLR/U3636PbF D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 16.3 ( .641 ) 15.7 ( .619 ) 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 02/2009 10 www.irf.com