$GYDQFHG 3RZHU 026)(7
FEATURES
♦ Avalanche Rugged Technology ♦ Rugged Gate Oxide Technology ♦ Lower Input Capacitance ♦ Improved Gate Charge ♦ Extended Safe Operating Area ♦ 150° C Operating Temperature ♦ Lower Leakage Current: 10µA (Max.) @ VDS = 200V ♦ Lower RDS(ON): 0.335Ω (Typ.)
IRLW/I630A
BVDSS = 200 V RDS(on) = 0.4Ω ID = 9 A
D2-PAK
2
I2-PAK
1 1 3 2 3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol VDSS ID IDM VGS EAS IAR EAR dv/dt PD Characteristic Drain-to-Source Voltage Continuous Drain Current (TC=25°C) Continuous Drain Current (TC=100°C) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TA=25°C) * Total Power Dissipation (TC=25°C) Linear Derating Factor TJ , TSTG TL Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8 from case for 5-seconds
(2) (1) (1) (3) (1)
Value 200 9 5.7 32 ±20 54 9 6.9 5 3.1 69 0.55 - 55 to +150
Units V A A V mJ A mJ V/ns W W W/°C
°C 300
Thermal Resistance
Symbol RθJC RθJA RθJA Characteristic Junction-to-Case Junction-to-Ambient * Junction-to-Ambient Typ. ---Max. 1.81 40 62.5 °C/W Units
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B
©1999 Fairchild Semiconductor Corporation
1
IRLW/I630A
Electrical Characteristics (TC=25°C unless otherwise specified)
Symbol BVDSS ∆BV/∆TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Characteristic Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain ( Miller ) Charge Min. Typ. Max. Units 200 -1.0 -----------------0.18 ------4.5 580 90 44 8 6 30 9 18.6 3.5 8.3 --2.0 100 -100 10 100 0.4 -755 115 55 25 20 70 30 27 --nC ns pF µA Ω Ω V V nA
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Test Condition VGS=0V,ID=250µA
V/° C ID=250µA VGS=20V VGS=-20V VDS=200V
See Fig 7
VDS=5V,ID=250µA
VDS=160V,TC=125°C VGS=5V,ID=4.5A VDS=40V,ID=4.5A
(4) (4)
VGS=0V,VDS=25V,f =1MHz
See Fig 5
VDD=100V,ID=9A, RG=6Ω
See Fig 13
VDS=160V,VGS=5V, ID=9A
(4) (5)
See Fig 6 & Fig 12 (4) (5)
Source-Drain Diode Ratings and Characteristics
Symbol IS ISM VSD trr Qrr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
(1) (4)
Min. Typ. Max. Units --------158 0.78 9 32 1.5 --A V ns µC
Test Condition Integral reverse pn-diode in the MOSFET TJ=25°C,IS=9A,VGS=0V TJ=25°C,IF=9A diF/dt=100A/µs
(4)
Notes; (1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature (2) L=1mH, IAS=9A, VDD=50V, RG=27Ω, Starting TJ =25°C (3) ISD ≤ 9A, di/dt ≤ 220A/µs, VDD ≤ BVDSS , Starting TJ =25°C (4) Pulse Test: Pulse Width = 250µ s, Duty Cycle ≤ 2% (5) Essentially Independent of Operating Temperature
2
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Fig 1. Output Characteristics
V Top :
GS
IRLW/I630A
Fig 2. Transfer Characteristics
7.0V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V
ID , Drain Current [A]
Bottom : 3.0V
ID , Drain Current [A]
11 0
5.5 V
11 0
1 0 oC 5 10 0 2 oC 5 @ Nt s : oe 1 V = 0V . GS 2 V =4 V . DS 0 3 2 0 µs P l e T s .5 us et 6 8 1 0
1 0
0
1 -1 -1 0 1 0
@Nts: oe 1 2 0 µs P l e T s .5 us et 2 T = 2 oC .C 5 10 0 11 0
- 5 oC 5 1 -1 0 0 2 4
VDS , Drain-Source Voltage [V]
VGS , Gate-Source Voltage [V]
10 .0
Fig 3. On-Resistance vs. Drain Current
IDR , Reverse Drain Current [A]
Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance
07 .5 V =5 V GS 05 .0
11 0
RDS(on) , [ Ω ]
10 0 @ Nt s: oe 1 V =0 V . GS us et 2 2 0 µs P l e T s .5 08 . 10 . 12 . 14 . 16 . 18 .
02 .5
V =1 V 0
GS
1 0 oC 5 2C 5 1 -1 0 04 . 06 .
o
@ Nt :T =2 C oe J 5 00 .0 0 5 1 0
D
o
1 5
2 0
2 5
3 0
I , Drain Current [A]
VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
90 0 C = C + C (C = so td ) iss gs gd ds h r e C =C +C oss ds gd C =C rss gd 6
Fig 6. Gate Charge vs. Gate-Source Voltage
70 2
C iss
V =4 V 0
VGS , Gate-Source Voltage [V]
DS
Capacitance [pF]
V =1 0 V 0 DS 4 V =1 0 V 6 DS
50 4
30 6
C oss
10 8
C rss
@ Nt s: oe 1 V =0 V . GS 2 f =1 M z . H
2
@ Nt s: I =9 A oe D 0 0 4
G
0 10 0
1 0
1
8
1 2
1 6
2 0
VDS , Drain-Source Voltage [V]
Q , Total Gate Charge [nC]
IRLW/I630A
Fig 7. Breakdown Voltage vs. Temperature
12 . 30 .
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Fig 8. On-Resistance vs. Temperature
Drain-Source Breakdown Voltage
11 .
RDS(on) , (Normalized) Drain-Source On-Resistance
25 .
BVDSS , (Normalized)
20 .
10 .
15 .
10 . @Nts: oe 1 V =5V . GS 2 I =45A .D . -0 5 -5 2 0 2 5 5 0 7 5 10 0 15 2 10 5 15 7
09 .
@ Nt s: oe 1 V =0 V . GS 2 I = 2 0 µA .D 5
05 .
08 . -5 7
-0 5
-5 2
0
2 5
5 0
7 5
10 0
15 2
10 5
15 7
00 . -5 7
TJ , Junction Temperature [oC]
TJ , Junction Temperature [oC]
Fig 9. Max. Safe Operating Area
12 0 O ea in i Ti Ae pr t o n h s r a i L m t d b R DS(on) s i ie y
Fig 10. Max. Drain Current vs. Case Temperature
1 0
ID , Drain Current [A]
1 0 µs 0 11 0 1m 0s D C 1 0
0
1m s
ID , Drain Current [A]
8
6
4
@ Nt s: oe 1 T = 2 oC .C 5 2 T = 1 0 oC .J 5 3 S nl Pl e . ig e us
2
1 -1 0 0 1 0
11 0
12 0
0 2 5
5 0
c
7 5
10 0
15 2
10 5
VDS , Drain-Source Voltage [V]
T , Case Temperature [oC]
Fig 11. Thermal Response
Thermal Response
100
D=0.5 0.2 0.1 @ Notes : 1. Z (t)=1.81 o C/W Max.
θ JC
2. Duty Factor, D=t1 /t2 3. TJ M -TC =PD M *Z
PDM t1 t2
θ JC
10- 1
0.05 0.02 0.01
(t)
Z (t) ,
θJC
single pulse
10- 2 - 5 10
10- 4
10- 3
10- 2
10- 1
100
101
t
1
, Square Wave Pulse Duration
[sec]
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Fig 12. Gate Charge Test Circuit & Waveform
IRLW/I630A
Current Regulator
50kΩ 12V 200nF 300nF
Same Type as DUT
VGS Qg
5V
VDS VGS DUT
3mA
Qgs
Qgd
R1
Current Sampling (IG) Resistor
R2
Current Sampling (ID) Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL Vout Vin RG DUT Vin 5V
td(on) t on tr td(off) t off tf 10%
Vout VDD
( 0.5 rated VDS )
90%
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
LL VDS
Vary tp to obtain required peak ID
BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD BVDSS IAS C VDD VDD
tp
ID
RG DUT 5V
tp
ID (t) VDS (t) Time
5
IRLW/I630A
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
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DUT
+ VDS --
IS L Driver RG VGS
Same Type as DUT
VGS
VDD
dv/dt controlled by RG IS controlled by Duty Factor D
VGS ( Driver )
Gate Pulse Width D = -------------------------Gate Pulse Period
5V
IFM , B ody Diode Forward Current
IS ( DUT ) IRM
di/dt
Body Diode Reverse Current
VDS ( DUT )
Body Diode Recovery dv/dt
Vf
VDD
Body Diode Forward Voltage Drop
6
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