IRLZ24N

PD - 91357C HEXFET® Power MOSFET l l l l l l IRLZ24N VDSS = 55V Logic-Level Gate Drive Advanced Process Technology Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Fully Avalanche Rated D G S RDS(on) = 0.06Ω ID = 18A Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry. TO-220AB Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy ‚ Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt ƒ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw. Max. 18 13 72 45 0.30 ±16 68 11 4.5 5.0 -55 to + 175 300 (1.6mm from case) 10 lbf•in (1.1N•m) Units A W W/°C V mJ A mJ V/ns °C Thermal Resistance Parameter RθJC RθCS RθJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Min. –––– –––– –––– Typ. –––– 0.50 –––– Max. 3.3 –––– 62 Units °C/W 07/12/02 IRLZ24N Electrical Characteristics @ TJ = 25°C (unless otherwise specified) V(BR)DSS ∆V(BR)DSS/∆TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Min. 55 ––– ––– ––– ––– 1.0 8.3 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.061 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 7.1 74 20 29 Max. Units Conditions ––– V V GS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA 0.060 V GS = 10V, ID = 11A „ 0.075 Ω V GS = 5.0V, ID = 11A „ 0.105 V GS = 4.0V, ID = 9.0A „ 2.0 V V DS = V GS, ID = 250µA ––– S V DS = 25V, ID = 11A 25 V DS = 55V, VGS = 0V µA 250 V DS = 44V, VGS = 0V, TJ = 150°C 100 V GS = 16V nA -100 V GS = -16V 15 ID = 11A 3.7 nC V DS = 44V 8.5 V GS = 5.0V, See Fig. 6 and 13 „ ––– V DD = 28V ––– ID = 11A ns ––– RG = 12Ω, VGS = 5.0V ––– RD = 2.4Ω, See Fig. 10 „ Between lead, 4.5 ––– 6mm (0.25in.) nH from package 7.5 ––– and center of die contact 480 ––– V GS = 0V 130 ––– pF V DS = 25V 61 ––– ƒ = 1.0MHz, See Fig. 5 D G S Source-Drain Ratings and Characteristics IS I SM VSD t rr Q rr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions MOSFET symbol ––– ––– 18 showing the A G integral reverse ––– ––– 72 p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 11A, VGS = 0V „ ––– 60 90 ns TJ = 25°C, IF = 11A ––– 130 200 nC di/dt = 100A/µs „ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) D S Notes:  Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ‚ VDD = 25V, starting TJ = 25°C, L = 790µH RG = 25Ω, IAS = 11A. (See Figure 12) ƒ ISD ≤ 11A, di/dt ≤ 290A/µs, VDD ≤ V(BR)DSS, „ Pulse width ≤ 300µs; duty cycle ≤ 2%. TJ ≤ 175°C IRLZ24N 100 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP 100 ID , Drain-to-Source Current (A) 10 ID , Drain-to-Source Current (A) VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP 10 2.5V 1 1 2.5V 20µs PULSE WIDTH T J = 25°C 1 10 0.1 0.1 A 100 0.1 0.1 20µs PULSE WIDTH T J = 175°C 1 10 A 100 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 100 3.0 TJ = 25°C R DS(on) , Drain-to-Source On Resistance (Normalized) I D = 18A I D , Drain-to-Source Current (A) 2.5 TJ = 175°C 10 2.0 1.5 1 1.0 0.5 0.1 2 3 4 5 6 V DS = 15V 20µs PULSE WIDTH 7 8 9 10 A 0.0 -60 -40 -20 0 20 40 60 VGS = 10V 80 100 120 140 160 180 A VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature (°C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature IRLZ24N 800 VGS , Gate-to-Source Voltage (V) C, Capacitance (pF) 600 Ciss V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd 15 I D = 11A V DS = 44V V DS = 28V 12 9 400 Coss 6 200 Crss 3 0 1 10 100 A 0 0 4 8 FOR TEST CIRCUIT SEE FIGURE 13 12 16 20 A VDS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 1000 ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY R DS(on) I D , Drain Current (A) 100 10µs TJ = 175°C TJ = 25°C 10 10 100µs 1 0.4 0.8 1.2 1.6 VGS = 0V A 1 1 TC = 25°C TJ = 175°C Single Pulse 10 1ms 10ms A 100 2.0 VSD , Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area IRLZ24N 20 VDS 16 RD V GS RG ID, Drain Current (Amps) D.U.T. + -V DD 12 5.0V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 8 Fig 10a. Switching Time Test Circuit 4 VDS 90% 0 25 50 75 100 125 150 A 175 TC , Case Temperature (°C) Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 10 Thermal Response (ZthJC ) D = 0.50 1 0.20 0.10 0.05 0.02 0.01 0.1 P DM SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t t 1 t2 1 /t 2 0.01 0.00001 2. Peak TJ = PDM x Z thJC + T C A 1 0.0001 0.001 0.01 0.1 t 1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case IRLZ24N VDS D.U.T. RG + V - DD 5.0 V EAS , Single Pulse Avalanche Energy (mJ) L 140 TOP 120 BOTTOM 100 ID 4.5A 7.8A 11A IAS tp 0.01Ω 80 60 Fig 12a. Unclamped Inductive Test Circuit 40 20 V(BR)DSS tp VDD VDS 0 VDD = 25V 25 50 75 100 125 150 A 175 Starting TJ , Junction Temperature (°C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 5.0 V QGS VG QGD VGS 3mA D.U.T. + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit IRLZ24N Peak Diode Recovery dv/dt Test Circuit D.U.T + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS IRLZ24N Package Outline TO-220AB Outline Dimensions are shown in millimeters (inches) 2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048) 4 15.24 (.600) 14.84 (.584) 1.15 (.045) MIN 1 2 3 LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN 14.09 (.555) 13.47 (.530) 4.06 (.160) 3.55 (.140) 3X 3X 1.40 (.055) 1.15 (.045) 0.93 (.037) 0.69 (.027) M BAM 3X 0.55 (.022) 0.46 (.018) 0.36 (.014) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 2.92 (.115) 2.64 (.104) 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220-AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. Part Marking Information TO-220AB EXAMPLE : THIS IS AN IRF1010 WITH ASSEMBLY LOT CODE 9B1M A INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER IRF1010 9246 9B 1M DATE CODE (YYWW) YY = YEAR WW = WEEK Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 07/02