IRLZ24NS

PD - 91358E IRLZ24NS/L Logic-Level Gate Drive l Advanced Process Technology l Surface Mount (IRLZ24NS) l Low-profile through-hole (IRLZ24NL) l 175°C Operating Temperature l Fast Switching l Fully Avalanche Rated Description l HEXFET® Power MOSFET D VDSS = 55V RDS(on) = 0.06Ω G ID = 18A S Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRLZ24NL) is available for lowprofile applications. D 2 P ak T O -26 2 Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TA = 25°C PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V… Continuous Drain Current, VGS @ 10V… Pulsed Drain Current  … Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy‚… Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt ƒ … Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 18 13 72 3.8 45 0.30 ±16 68 11 4.5 5.0 -55 to + 175 300 (1.6mm from case ) Units A W W W/°C V mJ A mJ V/ns °C Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)** Typ. ––– ––– Max. 3.3 40 Units °C/W 5/12/98 IRLZ24NS/L Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient V(BR)DSS RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. 55 ––– ––– ––– ––– 1.0 8.3 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.061 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 7.1 74 20 29 Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA… 0.060 VGS = 10V, ID = 11A „ 0.075 Ω VGS = 5.0V, ID = 11A „ 0.105 VGS = 4.0V, ID = 9.0A „ 2.0 V V DS = V GS, ID = 250µA ––– S VDS = 25V, ID = 11A… 25 VDS = 55V, VGS = 0V µA 250 VDS = 44V, VGS = 0V, TJ = 150°C 100 VGS = 16V nA -100 VGS = -16V 15 ID = 11A 3.7 nC VDS = 44V 8.5 VGS = 5.0V, See Fig. 6 and 13 „ … ––– VDD = 28V ––– ID = 11A ns ––– R G = 12Ω, VGS = 5.0V ––– RD = 2.4Ω, See Fig. 10 „ … Between lead, 7.5 ––– nH and center of die contact 480 ––– VGS = 0V 130 ––– pF VDS = 25V 61 ––– ƒ = 1.0MHz, See Fig. 5… Source-Drain Ratings and Characteristics IS I SM V SD trr Q rr ton P arameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 18 showing the A G integral reverse ––– ––– 72 S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 11A, VGS = 0V „ ––– 60 90 ns TJ = 25°C, IF = 11A ––– 130 200 nC di/dt = 100A/µs „ … Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes:  Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ƒ ISD ≤ 11A, di/dt ≤ 290A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C ‚ VDD = 25V, starting TJ = 25°C, L = 790µH RG = 25Ω, IAS = 11A. (See Figure 12) „ Pulse width ≤ 300µs; duty cycle ≤ 2%. … Uses IRLZ24N data and test conditions ** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. IRLZ24NS/L 100 TOP VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V 100 ID , D rain-to-S ource C urrent (A ) 10 ID , D rain-to-S ource C urrent (A ) V GS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP 10 2 .5V 1 1 2 .5V 2 0 µ s P U LS E W ID T H T J = 2 5°C 0.1 1 10 0.1 A 0.1 0.1 1 2 0 µ s P U LS E W ID T H T J = 1 75 °C 10 100 A 100 V D S , D rain-to-S ource V olta g e ( V ) V D S , D rain-to-S ource V olta g e ( V ) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 100 3.0 TJ = 2 5 °C R D S (on ) , D rain-to-S ource O n R esistance (N orm alized) I D = 1 8A I D , D ra in -to-S ourc e C urrent (A) 2.5 TJ = 1 7 5 °C 10 2.0 1.5 1 1.0 0.5 0.1 2 3 4 5 6 V D S = 1 5V 2 0µ s P U L S E W ID TH 7 8 9 10 A 0.0 -60 -40 -20 0 20 40 60 80 V G S = 10 V 100 120 140 160 180 A V G S , G ate-to -So urce Volta g e (V) T J , Junction T em perature (°C ) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature IRLZ24NS/L 800 C , Capacitance (pF) 600 C i ss V G S , G a te-to-S ou rc e V o ltag e (V ) V GS C is s C rs s C o ss = = = = 0V , f = 1M H z C g s + C g d , Cd s S H O R T E D C gd C d s + C gd 15 I D = 1 1A V D S = 44 V V D S = 28 V 12 9 400 C o ss 6 200 C r ss 3 0 1 10 100 A 0 0 4 8 F O R TE S T CIR C U IT S E E FIG U R E 1 3 12 16 20 A V D S , D rain-to-S ourc e V olta g e ( V ) Q G , T otal G ate C har g e ( nC ) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 1000 I S D , R everse Drain C urrent (A ) O P E R A T IO N IN T H IS A R E A L IM ITE D B Y R D S (o n) I D , D rain Current (A ) 100 10µ s T J = 1 75 °C T J = 2 5°C 10 10 100µ s 1 0.4 0.8 1.2 1.6 VG S = 0 V A 1 1 T C = 2 5 °C T J = 17 5°C S in g le P u lse 10 1m s 10m s 100 2.0 A V S D , S ourc e-to-D rain V oltage (V ) V D S , D rain-to-S ource V olta g e ( V ) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area IRLZ24NS/L 20 VDS 16 RD VGS RG D.U.T. V DD + I D , D rain C u rren t (A m ps ) 12 5.0V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 8 Fig 10a. Switching Time Test Circuit 4 VDS 90% 0 25 50 75 100 125 150 A 175 TC , C ase T em perature (°C ) Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 10 T he rm al R es p ons e (Z th J C ) D = 0 .50 1 0 .2 0 0 .1 0 0 .0 5 0 .0 2 0 .01 0.1 PD M S IN G LE P U LSE (TH ER M AL R ES PO N SE ) N o te s : 1 . D u ty fa c to r D = t t 1 t2 1 /t 2 0.01 0.00001 2 . P e a k TJ = P D M x Z th J C + T C A 1 0.0001 0.001 0.01 0.1 t 1 , R ectan g u lar P ulse D u ratio n (se c) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case IRLZ24NS/L 140 L VDS D.U.T. RG + V - DD 5.0 V E A S , S ingle Pulse Avalanc he E nergy (m J) TO P 120 B OTTOM 100 ID 4 .5 A 7.8 A 1 1A IAS tp 0.01Ω 80 60 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp VDD VDS 40 20 0 V DD = 25 V 25 50 75 100 125 150 A 175 S tartin g T J , J unc tion T em perature ( °C ) IAS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 10 V QGS VG QGD VGS 3mA D.U.T. + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit IRLZ24NS/L Peak Diode Recovery dv/dt Test Circuit D.U.T + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + V DD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS IRLZ24NS/L D2Pak Package Outline 1 0.54 (.4 15) 1 0.29 (.4 05) 1.4 0 (.055 ) M AX. -A2 4.69 (.1 85) 4.20 (.1 65) -B 1.3 2 (.05 2) 1.2 2 (.04 8) 1 0.16 (.4 00 ) RE F. 6.47 (.2 55 ) 6.18 (.2 43 ) 15 .4 9 (.6 10) 14 .7 3 (.5 80) 5 .28 (.20 8) 4 .78 (.18 8) 2.7 9 (.110 ) 2.2 9 (.090 ) 2.61 (.1 03 ) 2.32 (.0 91 ) 1.3 9 (.0 5 5) 1.1 4 (.0 4 5) 8.8 9 (.3 50 ) R E F. 1.7 8 (.07 0) 1.2 7 (.05 0) 1 3 3X 1.40 (.0 55) 1.14 (.0 45) 5 .08 (.20 0) 0 .93 (.03 7 ) 3X 0 .69 (.02 7 ) 0 .25 (.01 0 ) M BAM 0.5 5 (.022 ) 0.4 6 (.018 ) M IN IM U M R E CO M M E ND E D F O O TP R IN T 1 1.43 (.4 50 ) NO TE S: 1 D IM EN S IO N S A FTER SO L D ER D IP. 2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2. 3 C O N TRO L LIN G D IM EN SIO N : IN C H . 4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S. LE A D A SS IG N M E N TS 1 - G A TE 2 - D R AIN 3 - S O U RC E 8.89 (.3 50 ) 17 .78 (.70 0) 3 .8 1 (.15 0) 2 .08 (.08 2) 2X 2.5 4 (.100 ) 2X Part Marking Information D2Pak IN TE R N A TIO N A L R E C T IF IE R LO G O A S S E M B LY LO T C O D E PART NUM BER F530S 9 24 6 9B 1M A DATE CODE (Y YW W ) YY = Y E A R W W = W EEK IRLZ24NS/L Package Outline TO-262 Outline Part Marking Information TO-262 IRLZ24NS/L Tape & Reel Information D2Pak TR R 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 (.1 6 1 ) 3 .9 0 (.1 5 3 ) 1 .60 (.06 3) 1 .50 (.05 9) 0 .3 68 (.0 1 4 5 ) 0 .3 42 (.0 1 3 5 ) F E E D D IRE CTIO N 1 .8 5 (.0 7 3 ) 1 .6 5 (.0 6 5 ) 1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 ) 1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 ) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) TR L 10 .9 0 (.42 9) 10 .7 0 (.42 1) 1 .75 (.06 9 ) 1 .25 (.04 9 ) 16 .10 (.63 4 ) 15 .90 (.62 6 ) 4 .7 2 (.1 3 6) 4 .5 2 (.1 7 8) F E E D D IRE C TIO N 13.50 (.532 ) 12.80 (.504 ) 2 7.4 0 (1.079) 2 3.9 0 (.9 41) 4 33 0.00 (1 4.1 73) MA X. 60.00 (2.3 62) MIN . NO TES : 1. C O M F O R M S TO E IA -4 18. 2. C O N TR O LLIN G D IM E N S IO N : M ILL IM ET ER . 3. D IM E N S IO N ME A S U R E D @ H U B . 4. IN C LU D E S F LA N G E D IS TO R T IO N @ O U T E R E D G E . 26 .40 (1.03 9) 24 .40 (.961 ) 3 3 0.40 (1.1 97) MAX. 4 WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 5/98