IRMCF311TY

Data Sheet No. PD60312 IRMCF311 Dual Channel Sensorless Motor Control IC for Appliances Features MCE (Motion Control Engine) - Hardware based computation engine for high efficiency sinusoidal sensorless control of permanent magnet AC motor Integrated Power Factor Correction control Supports both interior and surface permanent magnet motors Built-in hardware peripheral for single shunt current feedback reconstruction No external current or voltage sensing operational amplifier required Dual channel three/two-phase Space Vector PWM Two-channel analog output (PWM) Embedded 8-bit high speed microcontroller (8051) for flexible I/O and man-machine control JTAG programming port for emulation/debugger Two serial communication interface (UART) I2C/SPI serial interface Watchdog timer with independent analog clock Three general purpose timers Two special timers: periodic timer, capture timer External EEPROM and internal RAM facilitate debugging and code development Pin compatible with IRMCK311, OTP-ROM version 1.8V/3.3V CMOS TM Product Summary Maximum crystal frequency Maximum internal clock (SYSCLK) frequency Sensorless control computation time MCE TM 60 MHz 128 MHz 11 μsec typ 16 bit signed 8K bytes 2 μsec 16 bits/ SYSCLK 6 12 bits 2 μsec 2 SYSCLK 8 bits 57.6K bps 14 QFP64 computation data range Program RAM loaded from external EEPROM 48K bytes Data RAM GateKill latency (digital filtered) PWM carrier frequency counter A/D input channels A/D converter resolution A/D converter conversion speed 8051 instruction execution speed Analog output (PWM) resolution UART baud rate (typ) Number of I/O (max) Package (lead-free) Description IRMCF311 is a high performance RAM based motion control IC designed primarily for appliance applications. IRMCF311 is designed to achieve low cost and high performance control solutions for advanced inverterized appliance motor control. IRMCF311 contains two computation engines. One is Motion Control Engine (MCETM) for sensorless control of permanent magnet motors; the other is an 8-bit high-speed microcontroller (8051). Both computation engines are integrated into one monolithic chip. The MCETM contains a collection of control elements such as Proportional plus Integral, Vector rotator, Angle estimator, Multiply/Divide, Low loss SVPWM, Single Shunt IFB. The user can program a motion control algorithm by connecting these control elements using a graphic compiler. Key components of the sensorless control algorithms, such as the Angle Estimator, are provided as complete pre-defined control blocks implemented in hardware. A unique analog/digital circuit and algorithm to fully support single shunt current reconstruction is also provided. The 8051 microcontroller performs 2-cycle instruction execution (60MIPS at 120MHz). The MCE and 8051 microcontroller are connected via dual port RAM to process signal monitoring and command input. An advanced graphic compiler for the MCETM is seamlessly integrated into the MATLAB/Simulink environment, while third party JTAG based emulator tools are supported for 8051 developments. IRMCF311 comes with a small QFP64 pin lead-free package. Rev 1.1 IRMCF311 TABLE OF CONTENTS 1 2 3 4 Overview...................................................................................................................................... 4 IRMCF311 Block Diagram and Main Functions ........................................................................ 5 Pinout........................................................................................................................................... 7 Input/Output of IRMCF311......................................................................................................... 8 4.1 8051 Peripheral Interface Group........................................................................................... 8 4.2 Motion Peripheral Interface Group ....................................................................................... 9 4.3 Analog Interface Group ...................................................................................................... 10 4.4 Power Interface Group ........................................................................................................ 11 4.5 Test Interface Group ........................................................................................................... 11 5 Application Connections ........................................................................................................... 12 6 DC Characteristics ..................................................................................................................... 13 6.1 Absolute Maximum Ratings ............................................................................................... 13 6.2 System Clock Frequency and Power Consumption............................................................ 13 6.3 Digital I/O DC Characteristics............................................................................................ 14 6.4 PLL and Oscillator DC Characteristics............................................................................... 15 6.5 Analog I/O DC Characteristics ........................................................................................... 15 6.6 Analog I/O DC Characteristics ........................................................................................... 16 6.7 Under Voltage Lockout DC Characteristics ....................................................................... 17 6.8 CMEXT and AREF Characteristics.................................................................................... 17 7 AC Characteristics ..................................................................................................................... 18 7.1 PLL AC Characteristics ...................................................................................................... 18 7.2 Analog to Digital Converter AC Characteristics ................................................................ 19 7.3 Op amp AC Characteristics................................................................................................. 20 7.4 Op Amp AC Characteristics ............................................................................................... 20 7.5 SYNC to SVPWM and A/D Conversion AC Timing......................................................... 21 7.6 GATEKILL to SVPWM AC Timing.................................................................................. 22 7.7 Interrupt AC Timing ........................................................................................................... 22 7.8 I2C AC Timing .................................................................................................................... 23 7.9 SPI AC Timing.................................................................................................................... 24 7.9.1 SPI Write AC timing .................................................................................................... 24 7.9.2 SPI Read AC Timing.................................................................................................... 25 7.10 UART AC Timing ........................................................................................................... 26 7.11 CAPTURE Input AC Timing .......................................................................................... 27 7.12 JTAG AC Timing ............................................................................................................ 28 8 Pin List....................................................................................................................................... 29 9 Package Dimensions.................................................................................................................. 32 10 Part Marking Information....................................................................................................... 33 2 IRMCF311 TABLE OF FIGURES Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Typical Application Block Diagram Using IRMCF311.................................................. 4 IRMCF311 Internal Block Diagram ................................................................................ 5 IRMCF311 Pin Configuration ......................................................................................... 7 Input/Output of IRMCF311 ............................................................................................. 8 Application Connection of IRMCF311 ......................................................................... 12 Clock Frequency vs. Power Consumption..................................................................... 13 TABLE OF TABLES Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Absolute Maximum Ratings............................................................................................ 13 System Clock Frequency................................................................................................. 13 Digital I/O DC Characteristics ........................................................................................ 14 PLL DC Characteristics .................................................................................................. 15 Analog I/O DC Characteristics ....................................................................................... 15 Analog I/O DC Characteristics ....................................................................................... 16 UVcc DC Characteristics ................................................................................................ 17 CMEXT and AREF DC Characteristics.......................................................................... 17 PLL AC Characteristics .................................................................................................. 18 A/D Converter AC Characteristics................................................................................ 19 Current Sensing OP Amp AC Characteristics............................................................... 20 Voltage sensing OP Amp AC Characteristics............................................................... 20 SYNC AC Characteristics............................................................................................. 21 GATEKILL to SVPWM AC Timing ............................................................................ 22 Interrupt AC Timing...................................................................................................... 22 I2C AC Timing .............................................................................................................. 23 SPI Write AC Timing.................................................................................................... 24 SPI Read AC Timing..................................................................................................... 25 UART AC Timing......................................................................................................... 26 CAPTURE AC Timing ................................................................................................. 27 JTAG AC Timing.......................................................................................................... 28 Pin List .......................................................................................................................... 31 3 IRMCF311 1 Overview IRMCF311 is a new International Rectifier integrated circuit device primarily designed as a onechip solution for complete inverter controlled air conditioner motor control applications. Unlike a traditional microcontroller or DSP, the IRMCF311 provides a built-in closed loop sensorless control algorithm using the unique Motion Control Engine (MCETM) for permanent magnet motors. The MCETM consists of a collection of control elements, motion peripherals, a dedicated motion control sequencer and dual port RAM to map internal signal nodes. IRMCF311 also employs a unique single shunt current reconstruction circuit to eliminate additional analog/digital circuitry and enables a direct shunt resistor interface to the IC. Motion control programming is achieved using a dedicated graphical compiler integrated into the MATLAB/SimulinkTM development environment. Sequencing, user interface, host communication, and upper layer control tasks can be implemented in the 8051 high-speed 8-bit microcontroller. The 8051 microcontroller is equipped with a JTAG port to facilitate emulation and debugging tools. Figure 1 shows a typical application schematics using IRMCF311. IRMCF311 is intended for development purpose and contains 48K bytes of RAM, which can be loaded from external EEPROM for 8051 program execution. For high volume production, IRMCK311 contains OTP ROM in place of program RAM to reduce the cost. Both IRMCF311 and IRMCK311 come in the same 64-pin QFP package with identical pin configuration to facilitate PC board layout and transition to mass production RS232C Serial Comm Field Communication Service to indoor unit IGBT inverter Galvanic Isolation Galvanic Isolation DC bus Motor PWM + PFC+GF Compressor Motor IPM AC input Passive (100EMI 230V) Filter IRMCF311 7 Fault IRS2630D User Parameter Storage User Program Storage Analog input 2 EEPROM EEPROM 1 2 6 3 15V 3.3V 1.8V Multple Power supply Fault Temp sense Motor PWM 60-100W Fan Motor SPM Temperature feedback Analog actuators Relay, Valves, Switches Analog output Digital I/O IRS2631D FREDFET inveter Figure 1. Typical Application Block Diagram Using IRMCF311 4 IRMCF311 2 IRMCF311 Block Diagram and Main Functions IRMCF311 block diagram is shown in Figure 2. 8bit uP Address/Data bus Figure 2. IRMCF311 Internal Block Diagram IRMCF311 contains the following functions for sensorless AC motor control applications: • Motion Control Engine (MCETM) o Proportional plus Integral block o Low pass filter o Differentiator and lag (high pass filter) o Ramp o Limit o Angle estimate (sensorless control) o Inverse Clark transformation o Vector rotator o Bit latch 5 Motion Control Bus IRMCF311 o o o o o o o o o o o o o o o o • Peak detect Transition Multiply-divide (signed and unsigned) Divide (signed and unsigned) Adder Subtractor Comparator Counter Accumulator Switch Shift ATAN (arc tangent) Function block (any curve fitting, nonlinear function) 16-bit wide Logic operations (AND, OR, XOR, NOT, NEGATE) MCETM program and data memory (6K byte). Note 1 MCETM control sequencer 8051 microcontroller o Three 16-bit timer o 16-bit periodic timer o 16-bit analog watchdog timer o 16-bit capture timer o Up to 14 discrete I/Os o Six-channel 12-bit A/D Four buffered channels (0 – 1.2V input) Two unbuffered channels (0 – 1.2V input) o JTAG port (4 pins) o Up to two channels of analog output (8-bit PWM) o Two UART o I2C/SPI port o 48K byte program RAM loaded from external EEPROM o 2K byte data RAM. Note 1 Note 1: Total size of RAM is 8K byte including MCE program, MCE data, and 8051 data. Different sizes can be allocated depending on applications. 6 IRMCF311 3 Pinout P5.0/PFCGKILL P3.6/RXD1 SCL/SO-SI P3.7/TXD1 P3.2/INT0 P5.2/TDO P5.1/TMS 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 XTAL0 XTAL1 P1.1/RXD P1.2/TXD P1.3/SYNC/SCK P1.4/CAP VDD2 VSS VDD1 FGATEKILL FPWMWL FPWMWH FPWMVL FPWMVH FPWMUL FPWMUH 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 P3.0/INT2/CS1 CPWMUH CPWMUL CPWMVH CPWMVL CPWMWH CPWMWL CGATEKILL VDD1 VSS IPFCIPFC+ IPFCO VACO VACVAC+ (Top View) P2.7/AOPWM1 P2.6/AOPWM0 VDD2 IFBF- AIN0 IFBFO AVDD IFBF+ AIN1 PFCPWM IFBC+ SDA/CS0 TSTMOD PLLVDD PLLVSS RESET TCK P5.3/TDI VSS CMEXT Figure 3. IRMCF311 Pin Configuration IFBCO AREF AVSS IFBC- VSS 7 IRMCF311 4 Input/Output of IRMCF311 All I/O signals of IRMCF311 are shown in Figure 4. All I/O pins are 3.3V logic interface except A/D interface pins. Figure 4. Input/Output of IRMCF311 4.1 8051 Peripheral Interface Group Input, Receive data to IRMCF311 Output, Transmit data from IRMCF311 Input, 2nd channel Receive data to IRMCF311 Output, 2nd channel Transmit data from IRMCF311 UART Interface P1.1/RXD P1.2/TXD P3.6/RXD1 P3.7/TXD1 8 IRMCF311 Discrete I/O Interface P1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock, needs to be pulled up to VDD1 in order to boot from I2C EEPROM P1.4/CAP Input/output port 1.4, can be configured as Capture Timer input P3.0/INT2/CS1 Input/output port 3.0, can be configured as external interrupt 2 or SPI chip select 1 P3.2/INT0 Input/output port 3.2, can be configured as external interrupt 0 Analog output Interface P2.6/AOPWM0 Output, PWM output 0, 8-bit resolution, configurable carrier frequency P2.7/AOPWM1 Output, PWM output 1, 8-bit resolution, configurable carrier frequency Crystal Interface XTAL0 XTAL1 Input, connected to crystal Output, connected to crystal Reset Interface RESET Inout, system reset, needs to be pulled up to VDD1 but doesn’t require external RC time constant I2C/SPI Interface SCL/SO-SI SDA/CS0 P3.0/INT2/CS1 P1.3/SYNC/SCK Output, I2C clock output or SPI data Input/output, I2C data line or SPI chip select 0 Input/output, INT2 or SPI chip select 1 Input/output, SYNC output or SPI clock, needs to be pulled up to VDD1 in order boot from I2C EEPROM 4.2 Motion Peripheral Interface Group Output, motor 1 PWM phase U high side gate signal Output, motor 1 PWM phase U low side gate signal Output, motor 1 PWM phase V high side gate signal Output, motor 1 PWM phase V low side gate signal Output, motor 1 PWM phase W high side gate signal Output, motor 1 PWM phase W low side gate signal Output, motor 2 PWM phase U high side gate signal Output, motor 2 PWM phase U low side gate signal Output, motor 2 PWM phase V high side gate signal PWM CPWMUH CPWMUL CPWMVH CPWMVL CPWMWH CPWMWL FPWMUH FPWMUL FPWMVH 9 IRMCF311 FPWMVL FPWMWH FPWMWL PFCPWM Fault CGATEKILL Output, motor 2 PWM phase V low side gate signal Output, motor 2 PWM phase W high side gate signal Output, motor 2 PWM phase W low side gate signal Output, PFC PWM Input, upon assertion, this negates all six PWM signals for motor 1, programmable logic sense P5.0/PFCGKILL Input, upon assertion, this negates PFCPWM signal, programmable logic sense, can be configured as discrete I/O in which case CGATEKILL negates PFCPWM FGATEKILL Input, upon assertion, this negates all six PWM signals for motor 2, programmable logic sense 4.3 Analog Interface Group Analog power (1.8V) Analog power return Buffered 0.6V output Unbuffered 0.6V, input to the AREF buffer, capacitor needs to be connected. Input, Operational amplifier positive input for shunt resistor current sensing of motor 1 Input, Operational amplifier negative input for shunt resistor current sensing of motor 1 Output, Operational amplifier output for shunt resistor current sensing of motor 1 Input, Operational amplifier positive input for shunt resistor current sensing of motor 2 Input, Operational amplifier negative input for shunt resistor current sensing of motor 2 Output, Operational amplifier output for shunt resistor current sensing of motor 2 Input, Operational amplifier positive input for PFC current sensing Input, Operational amplifier negative input for PFC current sensing Output, Operational amplifier output for PFC current sensing Input, Operational amplifier positive input for PFC AC voltage sensing Input, Operational amplifier negative input for PFC AC voltage sensing Output, Operational amplifier output for PFC AC voltage sensing Input, Analog input channel 0 (0 - 1.2V), typically configured for DC bus voltage input Input, Analog input channel 1 (0 - 1.2V), needs to be pulled down to AVSS if unused AVDD AVSS AREF CMEXT IFBC+ IFBCIFBCO IFBF+ IFBFIFBFO IPFC+ IPFCIPFO VAC+ VACVACO AIN0 AIN1 10 IRMCF311 4.4 Power Interface Group Digital power for I/O (3.3V) Digital power for core logic (1.8V) Digital common PLL power (1.8V) PLL ground return VDD1 VDD2 VSS PLLVDD PLLVSS 4.5 Test Interface Group Must be tied to VSS, used only for factory testing. Input, JTAG test data input, or programmable discrete I/O Input, JTAG test mode select, or programmable discrete I/O Input, JTAG test clock Output, JTAG test data output, or programmable discrete I/O TSTMOD P5.3/TDI P5.1/TMS TCK P5.2/TDO 11 IRMCF311 5 Application Connections Typical application connection is shown Figure 5. All components necessary to implement a complete sensorless drive control algorithm are shown connected to IRMCF311. System Clock 4 MHz Crystal XTAL0 XTAL1 PLLVDD(1.8V) PLLVSS PLL Logic System clock To indoor unit Microcontroller (UART) To other Host (UART) Other communication (I2C) P1.2/TXD P1.1/RXD P3.7/TXD1 P3.6/RXD1 SDA/CS0 SCL/SO-SI UART0 UART1 I2 C Motion Control Modules Dual Port Memory (512B) & MCE Memory (5.5KB) Low Loss Space Vector PWM Low Loss Space Vector PWM CPWMUH CPWMUL CPWMVH CPWMVL CPWMWH CPWMWL CGATEKILL FPWMUH FPWMUL FPWMVH FPWMVL FPWMWH FPWMWL FGATEKILL P1.3/SYNC/SCK P1.4/CAP Digital I/O Control P3.0/INT2/CS1 PORT1 Motion Control Sequencer S/H PFC PWM PFCPWM PFCGKILL 0.6V IFBC+ IFBCIFBCO IFBF+ 0.6V FAN motor DC bus shunt resistor 0.6V PFC DC bus shunt resistor Compressor DC bus shunt resistor PORT3 S/H Timer RESET IFBFIFBFO IPFC+ RESET System Reset Test Mode TSTMOD Test Mode Circuit Watchdog Timer Local RAM (2KB) S/H IPFCIPFCO VAC+ P2.6/AOPWM0 PWM0 12bit A/D & MUX VACVACO DC bus voltage AC line voltage AIN0 Analog Output P2.7/AOPWM1 PWM1 Program RAM (48KB) AIN1 AREF CMEXT Other analog input (0-1.2V) Optional External Voltage Reference (0.6V) TCK JTAG Control P5.3/TDI P5.1/TMS P5.2/TDO JTAG Interface 8051 CPU AVDD(1.8V) AVSS VDD1(3.3V) VDD2(1.8V) VSS Figure 5. Application Connection of IRMCF311 12 IRMCF311 6 DC Characteristics 6.1 Absolute Maximum Ratings Parameter Min Typ Max Supply Voltage -0.3 V 3.6 V Supply Voltage -0.3 V 1.98 V Analog Input Voltage -0.3 V 1.98 V Digital Input Voltage -0.3 V 3.65 V Ambient Temperature -40 ˚C 85 ˚C Storage Temperature -65 ˚C 150 ˚C Table 1. Absolute Maximum Ratings Condition Respect to VSS Respect to VSS Respect to AVSS Respect to VSS Symbol VDD1 VDD2 VIA VID TA TS Caution: Stresses beyond those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and function of the device at these or any other conditions beyond those indicated in the operational sections of the specifications are not implied. 6.2 System Clock Frequency and Power Consumption Parameter Min Typ Max System Clock 32 128 Table 2. System Clock Frequency Unit MHz Symbol SYSCLK 240 200 160 Power (mW) 120 80 VDD2 (1.8V) 40 0 0 50 100 Clock Frequency (MHz) 150 VDD1 (3.3V) Total Figure 6. Clock Frequency vs. Power Consumption 13 IRMCF311 6.3 VDD1 VDD2 VIL VIH CIN IL IOL1(2) IOH1 IOL2 (2) Digital I/O DC Characteristics Parameter Min Typ Max Supply Voltage 3.0 V 3.3 V 3.6 V Supply Voltage 1.62 V 1.8 V 1.98 V Input Low Voltage -0.3 V 0.8 V Input High Voltage 2.0 V 3.6 V Input capacitance 3.6 pF Input leakage current ±10 nA ±1 μA Low level output 8.9 mA 13.2 mA 15.2 mA current High level output 12.4 mA 24.8 mA 38 mA current Low level output 17.9 mA 26.3 mA 33.4 mA current High level output 24.6 mA 49.5 mA 81 mA current Table 3. Digital I/O DC Characteristics Condition Recommended Recommended Recommended Recommended (1) Symbol VO = 3.3 V or 0 V VOL = 0.4 V (1) (1) (1) (1) VOH = 2.4 V VOL = 0.4 V VOH = 2.4 V (3) IOH2(3) Note: (1) Data guaranteed by design. (2) Applied to SCL/SO-SI, SDA/CS0 pins. (3) Applied to P1.1/RXD, P1.2/TXD, P1.3/SYNC/SCK, P1.4/CAP, P2.6/AOPWM0, P2.7/AOPWM1, P3.0/INT2/CS1, P3.2/INT0, P3.6/RXD1, P3.7/TXD1, P5.0/PFCGKILL, P5.1/TMS, P5.2/TDO, P5.3/TDI, CGATEKILL, FGATEKILL, CPWMUL, CPWMUH, CPWMVL, CPWMVH, CPWMWL, CPWMWH, FPWMUL, FPWMUH, FPWMVL, FPWMVH, FPWMWL, FPWMWH, and PFCPWM pins. 14 IRMCF311 6.4 PLL and Oscillator DC Characteristics Parameter Supply Voltage Oscillator Input Low Voltage Oscillator Input High Voltage Table 4. Min 1.62 V VPLLVSS 0.8* Typ 1.8 V Max 1.92 V 0.2* VPLLVDD VPLLVDD Condition Recommended VPLLVDD = 1.8 V (1) (1) Symbol VPLLVDD VIL OSC VIH OSC VPLLVDD = 1.8 V VPLLVDD PLL DC Characteristics Note: (1) Data guaranteed by design. 6.5 Analog I/O DC Characteristics - OP amps for current sensing (IFBC+, IFBC-, IFBCO, IFBF+, IFBF-, IFBFO, IPFC+, IPFC-, IPFCO) CAREF = 1nF, CMEXT= 100nF. Unless specified, Ta = 25˚C. Symbol Parameter Min Typ VAVDD Supply Voltage 1.71 V 1.8 V VOFFSET Input Offset Voltage VI Input Voltage Range 0V VOUTSW OP amp output 50 mV (1) operating range CIN Input capacitance 3.6 pF RFDBK OP amp feedback 5 kΩ resistor OP GAINCL CMRR ISRC ISNK Max 1.89 V 26 mV 1.2 V 1.2 V 20 kΩ Condition Recommended VAVDD = 1.8 V Recommended VAVDD = 1.8 V (1) Operating Close loop 80 db Gain Common Mode 80 db Rejection Ratio Op amp output source 1 mA current Op amp output sink 100 μA current Table 5. Analog I/O DC Characteristics (1) (1) Requested between op amp output and negative input VOUT = 0.6 V (1) (1) VOUT = 0.6 V Note: (1) Data guaranteed by design. 15 IRMCF311 6.6 Analog I/O DC Characteristics - OP amp for voltage sensing (VAC+,VAC-,VACO) CAREF = 1nF, CMEXT= 100nF. Unless specified, Ta = 25˚C. Symbol Parameter Min Typ Max VAVDD Supply Voltage 1.71 V 1.8 V 1.89 V VOFFSET Input Offset Voltage 26 mV VI Input Voltage Range 0V 1.2 V 1.2 V VOUTSW OP amp output 50 mV (1) operating range CIN Input capacitance 3.6 pF OP GAINCL Operating Close loop 80 db Gain CMRR Common Mode 80 db Rejection Ratio ISRC Op amp output source 5 mA current ISNK Op amp output sink 500 μA current Table 6. Analog I/O DC Characteristics Note: (1) Data guaranteed by design. Condition VAVDD = 1.8 V VAVDD = 1.8 V (1) (1) (1) VOUT = 0.6 V (1) (1) VOUT = 0.6 V 16 IRMCF311 6.7 Under Voltage Lockout DC Characteristics - Based on AVDD (1.8V) Unless specified, Ta = 25˚C. Symbol Parameter Min Typ Max UVCC+ UVcc positive going 1.53 V 1.66 V 1.71 V Threshold UVCCUVcc negative going 1.52 V 1.62 V 1.71 V Threshold UVCCH UVcc Hysteresys 40 mV Table 7. UVcc DC Characteristics Condition VDD1 = 3.3 V VDD1 = 3.3 V 6.8 CMEXT and AREF Characteristics CAREF = 1nF, CMEXT= 100nF. Unless specified, Ta = 25˚C. Condition Symbol Parameter Min Typ Max VCM CMEXT voltage 495 mV 600 mV 700 mV VAVDD = 1.8 V VAREF Buffer Output Voltage 495 mV 600 mV 700 mV VAVDD = 1.8 V (1) 1 mV Load regulation (VDCΔVo 0.6) (1) PSRR Power Supply Rejection 75 db Ratio Table 8. CMEXT and AREF DC Characteristics Note: (1) Data guaranteed by design. 17 IRMCF311 7 AC Characteristics 7.1 FCLKIN FPLL FLWPW JS D TLOCK PLL AC Characteristics Parameter Min Typ Max Condition (1) Crystal input 3.2 MHz 4 MHz 60 MHz frequency (see figure below) Internal clock 32 MHz 50 MHz 128 MHz (1) frequency (1) Sleep mode output FCLKIN ÷ 256 frequency (1) Short time jitter 200 psec (1) Duty cycle 50 % PLL lock time 500 μsec (1) Table 9. PLL AC Characteristics Symbol Note: (1) Data guaranteed by design. R1=1M R2=10 Xtal C1=30PF C2=30PF 18 IRMCF311 7.2 Analog to Digital Converter AC Characteristics Min Typ Max 2.05 μsec 10 μsec Condition (1) Unless specified, Ta = 25˚C. Symbol Parameter TCONV Conversion time THOLD Sample/Hold maximum hold time Voltage droop ≤ 15 LSB (see figure below) Table 10. A/D Converter AC Characteristics Note: (1) Data guaranteed by design. Input Voltage Voltage droop S/H Voltage tSAMPLE THOLD 19 IRMCF311 7.3 Op amp AC Characteristics - OP amps for current sensing (IFBC+, IFBC-, IFBCO, IFBF+, IFBF-, IFBFO, IPFC+, IPFC-, IPFCO) Unless specified, Ta = 25˚C. Symbol Parameter OPSR OP amp slew rate OPIMP TSET OP input impedance Settling time Min - Typ 10 V/μsec 108 Ω 400 ns Max - (1) Condition VAVDD = 1.8 V, CL = 33 pF (1) VAVDD = 1.8 V, CL = 33 pF (1) Table 11. Current Sensing OP Amp AC Characteristics Note: (1) Data guaranteed by design. 7.4 Op Amp AC Characteristics - OP amp for voltage sensing (VAC+,VAC-,VACO) Unless specified, Ta = 25˚C. Symbol Parameter OPSR OP amp slew rate OPIMP TSET OP input impedance Settling time Min Typ 2.5 V/μsec 108 Ω 650 ns Max - Condition VAVDD = 1.8 V, CL = 33 pF (1) (1) - VAVDD = 1.8 V, CL = 33 pF (1) Table 12. Voltage sensing OP Amp AC Characteristics Note: (1) Data guaranteed by design. 20 IRMCF311 7.5 SYNC to SVPWM and A/D Conversion AC Timing twSYNC SYNC tdSYNC1 IU,IV,IW tdSYNC2 AINx tdSYNC3 PWMUx,PWMVx,PWMWx Unless specified, Ta = 25˚C. Symbol Parameter Min Typ Max twSYNC SYNC pulse width 32 tdSYNC1 SYNC to current 100 feedback conversion time tdSYNC2 SYNC to AIN0-6 200 analog input conversion time tdSYNC3 SYNC to PWM output 2 delay time Table 13. SYNC AC Characteristics Note: (1) AIN1 through AIN6 channels are converted once every 6 SYNC events Unit SYSCLK SYSCLK SYSCLK (1) SYSCLK 21 IRMCF311 7.6 GATEKILL to SVPWM AC Timing Unless specified, Ta = 25˚C. Symbol Parameter Min Typ Max twGK GATEKILL pulse 32 width tdGK GATEKILL to PWM 100 output delay Table 14. GATEKILL to SVPWM AC Timing Unit SYSCLK SYSCLK 7.7 Interrupt AC Timing Unless specified, Ta = 25˚C. Symbol Parameter Min Typ Max twINT INT0, INT1 Interrupt 4 Assertion Time tdINT INT0, INT1 latency 4 Table 15. Interrupt AC Timing Unit SYSCLK SYSCLK 22 IRMCF311 7.8 I2C AC Timing TI2CLK TI2CLK SCL tI2WSETUP tI2WHOLD tI2RSETUP tI2RHOLD tI2EN2 tI2ST1 tI2ST2 tI2EN1 SDA Unless specified, Ta = 25˚C. Symbol Parameter TI2CLK I2C clock period tI2ST1 I2C SDA start time tI2ST2 I2C SCL start time tI2WSETUP I2C write setup time tI2WHOLD I2C write hold time tI2RSETUP I2C read setup time tI2RHOLD I2C read hold time Min Typ 10 0.25 0.25 0.25 0.25 2 (1) I C filter time 1 Table 16. I2C AC Timing Max 8192 - Unit SYSCLK TI2CLK TI2CLK TI2CLK TI2CLK SYSCLK SYSCLK Note: (1) I2C read setup time is determined by the programmable filter time applied to I2C communication. 23 IRMCF311 7.9 SPI AC Timing 7.9.1 SPI Write AC timing Unless specified, Ta = 25˚C. Symbol Parameter Min Typ Max TSPICLK SPI clock period 4 tSPICLKHT SPI clock high time 1/2 tSPICLKLT SPI clock low time 1/2 tCSDELAY CS to data delay time 10 tWRDELAY CLK falling edge to data 10 delay time tCSHIGH CS high time between two 1 consecutive byte transfer tCSHOLD CS hold time 1 Table 17. SPI Write AC Timing Unit SYSCLK TSPICLK TSPICLK nsec nsec TSPICLK TSPICLK 24 IRMCF311 7.9.2 SPI Read AC Timing Unless specified, Ta = 25˚C. Symbol Parameter Min Typ Max TSPICLK SPI clock period 4 tSPICLKHT SPI clock high time 1/2 tSPICLKLT SPI clock low time 1/2 tCSRD CS to data delay time 10 tRDSU SPI read data setup time 10 tRDHOLD SPI read data hold time 10 tCSHIGH CS high time between two 1 consecutive byte transfer tCSHOLD CS hold time 1 Table 18. SPI Read AC Timing Unit SYSCLK TSPICLK TSPICLK nsec nsec nsec TSPICLK TSPICLK 25 IRMCF311 7.10 UART AC Timing TBAUD TXD Start Bit RXD Data and Parity Bit Stop Bit TUARTFIL Unless specified, Ta = 25˚C. Symbol Parameter Min Typ TBAUD Baud Rate Period 57600 1/16 TUARTFIL UART sampling filter period (1) Table 19. UART AC Timing Max - Unit bit/sec TBAUD Note: (1) Each bit including start and stop bit is sampled three times at center of a bit at an interval of 1/16 TBAUD. If three sampled values do not agree, then UART noise error is generated. 26 IRMCF311 7.11 CAPTURE Input AC Timing Unless specified, Ta = 25˚C. Symbol Parameter Min Typ Max TCAPCLK CAPTURE input 8 period tCAPHIGH CAPTURE input high 4 time tCAPLOW CAPTURE input low 4 time tCRDELAY CAPTURE falling edge 4 to capture register latch time tCLDELAY CAPTURE rising edge 4 to capture register latch time tINTDELAY CAPTURE input 4 interrupt latency time Table 20. CAPTURE AC Timing Unit SYSCLK SYSCLK SYSCLK SYSCLK SYSCLK SYSCLK 27 IRMCF311 7.12 JTAG AC Timing TJCLK TCK tJHIGH tJLOW tCO TDO tJSETUP tJHOLD TDI/TMS Unless specified, Ta = 25˚C. Symbol Parameter Min Typ TJCLK TCK Period tJHIGH TCK High Period 10 tJLOW TCK Low Period 10 tCO TCK to TDO propagation 0 delay time tJSETUP TDI/TMS setup time 4 tJHOLD TDI/TMS hold time 0 Table 21. JTAG AC Timing Max 50 5 - Unit MHz nsec nsec nsec nsec nsec 28 IRMCF311 8 Pin List Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Pin Name XTAL0 XTAL1 P1.1/RXD P1.2/TXD P1.3/SYNC/ SCK P1.4/CAP VDD2 VSS VDD1 FGATEKILL FPWMWL FPWMWH FPWMVL FPWMVH FPWMUL FPWMUH P2.6/ AOPWM0 P2.7/ AOPWM1 VDD2 VSS IFBFIFBF+ IFBFO AIN0 AVDD 70 kΩ Pull up 70 kΩ Pull up 70 kΩ Pull up 70 kΩ Pull up 70 kΩ Pull up 70 kΩ Pull up Internal IC Pull-up /Pull-down Pin Type I O I/O I/O I/O I/O P P P I O O O O O O I/O Description Crystal input Crystal output Discrete programmable I/O or UART receive input Discrete programmable I/O or UART transmit output Discrete programmable I/O or SYNC output or SPI clock, needs to be pulled up to VDD1 in order to boot from I2C EEPROM Discrete programmable I/O or Capture Timer input 1.8V digital power Digital common 3.3V digital power Fan PWM shutdown input, 2-μsec digital filter, configurable either high or low true. Fan PWM gate drive for phase W low side, configurable either high or low true Fan PWM gate drive for phase W high side, configurable either high or low true Fan PWM gate drive for phase V low side, configurable either high or low true Fan PWM gate drive for phase V high side, configurable either high or low true Fan PWM gate drive for phase U low side, configurable either high or low true Fan PWM gate drive for phase U high side, configurable either high or low true Discrete programmable I/O or analog output 0 (PWM) Discrete programmable I/O or analog output 1 (PWM) 1.8V digital power Digital common Fan single shunt current sensing OP amp input (-) Fan single shunt current sensing OP amp input (+) Fan single shunt current sensing OP amp output Analog input channel 0, 0-1.2V range, needs to be pulled down to AVSS if unused 1.8V analog power P P I I O I P 29 IRMCF311 Pin Number 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 Pin Name AVSS AIN1 AREF CMEXT IFBCIFBC+ IFBCO VACVAC+ VACO IPFCO IPFC+ IPFCVSS VDD1 CGATEKILL CPWMWL CPWMWH CPWMVL CPWMVH CPWMUL CPWMUH P3.0/INT2 P5.0/ PFCGKILL PFCPWM P3.2/INT0 70 kΩ Pull up 70 kΩ Pull up 70 kΩ Pull up 70 kΩ Pull up 70 kΩ Pull up 70 kΩ Pull up 70 kΩ Pull up Internal IC Pull-up /Pull-down Pin Type P I O O I I O I I O O I I P P I O O O O O O I/O I O I/O Description Analog common Analog input channel 1, 0-1.2V range, needs to be pulled down to AVSS if unused Analog reference voltage output (0.6V) Unbuffered analog reference voltage output (0.6V) Compressor single shunt current sensing OP amp input (-) Compressor single shunt current sensing OP amp input (+) Compressor single shunt current sensing OP amp output AC input voltage sensing OP amp input (-) AC input voltage sensing OP amp input (+) AC input voltage sensing OP amp output PFC shunt current sensing OP amp output PFC shunt current sensing OP amp input (+) PFC shunt current sensing OP amp input (-) Digital common 3.3V digital power Compressor PWM shutdown input, 2-μsec digital filter, configurable either high or low true. Compressor PWM gate drive for phase W low side, configurable either high or low true Compressor PWM gate drive for phase W high side, configurable either high or low true Compressor PWM gate drive for phase V low side, configurable either high or low true Compressor PWM gate drive for phase V high side, configurable either high or low true Compressor PWM gate drive for phase U low side, configurable either high or low true Compressor PWM gate drive for phase U high side, configurable either high or low true Discrete programmable I/O or INT2 digital input Discrete programmable I/O or PFC PWM shutdown input, 2-μsec digital filter, configurable either high or low true. PFC PWM gate drive, configurable either high or low true Discrete programmable I/O or INT0 input 30 IRMCF311 Pin Number 52 53 54 55 56 57 58 59 60 61 62 63 64 Pin Name P3.6/RXD1 P3.7/TXD1 VSS SCL/SO-SI SDA/CS0 P5.1/TMS P5.2/TDO P5.3/TDI TCK TSTMOD RESET PLLVDD PLLVSS Internal IC Pull-up /Pull-down Pin Type I/O I/O P I/O I/O I/O I/O I/O I I Description Discrete programmable I/O or 2nd UART receive input Discrete programmable I/O or 2nd UART transmit output Digital common 2 I C clock output or SPI data I2C data or SPI chip select 0 Discrete programmable I/O or JTAG test mode select Discrete programmable I/O or JTAG port test data output Discrete programmable I/O or JTAG test data input JTAG test clock Test mode. Must be tied to VSS. Factory use only 58 kΩ pull down I/O Reset , low true, Schmitt trigger input P 1.8 V PLL power P PLL ground Table 22. Pin List 31 IRMCF311 9 Package Dimensions This document is the property of International Rectifier and may not be copied or distributed without expressed consent. IRMCF311 10 Part Marking Information Part Number IRMCF311 YWWP XXXXXX IR Logo Date Code Production Lot Pin 1 Indentifier Order Information Lead-Free Part in 64-lead QFP Moisture sensitivity rating – MSL3 Part number IRMCF311TR IRMCF311TY Order quantities 1500 parts on tape and reel in dry pack 1600 parts on trays (160 parts per tray) in dry pack The LQFP-64 is MSL3 qualified This product has been designed and qualified for the industrial level Qualification standards can be found at www.irf.com IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105 Data and specifications subject to change without notice. 12/05/2006 www.irf.com 33