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IRS2103SPBF

IRS2103SPBF

  • 厂商:

    IRF

  • 封装:

  • 描述:

    IRS2103SPBF - HALF-BRIDGE DRIVER - International Rectifier

  • 数据手册
  • 价格&库存
IRS2103SPBF 数据手册
Data Sheet No. PD60263 IRS2103(S)PbF HALF-BRIDGE DRIVER Features • Floating channel designed for bootstrap operation • Fully operational to +600 V • Tolerant to negative transient voltage, dV/dt • • • • • • • • immune Gate drive supply range from 10 V to 20 V Undervoltage lockout 3.3 V, 5 V, and 15 V logic compatible Cross-conduction prevention logic Matched propagation delay for both channels Internal set deadtime High side output in phase with HIN input Low side output out of phase with LIN input Product Summary VOFFSET IO+/VOUT ton/off (typ.) Deadtime (typ.) 600 V max. 130 mA/270 mA 10 V - 20 V 680 ns/150 ns 520 ns Packages Description The IRS2103 is a high voltage, high speed power MOSFET and IGBT drivers with dependent high and low side referenced output channels. Proprietary HVIC 8-Lead SOIC 8-Lead PDIP and latch immune CMOS technologies enable ruggeIRS2103S IRS2103 dized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver crossconduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 V. Typical Connection up to 600 V VCC VCC HIN LIN VB HO VS LO TO LOAD HIN LIN COM (Refer to Lead Assignments for correct configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IRS2103(S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol VB VS VHO VCC VLO VIN dVs/dt PD RthJA TJ TS TL Definition High side floating absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage (HIN & LIN ) Allowable offset supply voltage transient Package power dissipation @ TA ≤ +25 °C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (8 Lead PDIP) (8 Lead SOIC) (8 Lead PDIP) (8 Lead SOIC) Min. -0.3 V B - 25 VS - 0.3 -0.3 -0.3 -0.3 — — — — — — -55 — Max. 625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 50 1.0 0.625 125 200 150 150 300 Units V V/ns W °C/W °C Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at a 15 V differential. Symbol VB VS VHO VCC VLO VIN TA Definition High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage (HIN & LIN ) Ambient temperature Min. VS + 10 Note 1 VS 10 0 0 -40 Max. VS + 20 600 VB 20 VCC VCC 125 Units V °C Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip DT97-3 for more details). www.irf.com 2 IRS2103(S)PbF Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25 °C unless otherwise specified. Symbol ton toff tr tf DT MT Definition Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time Deadtime, LS turn-off to HS turn-on & HS turn-on to LS turn-off Delay matching, HS & LS turn-on/off Min. Typ. Max. Units Test Conditions — — — — 400 — 680 150 70 35 520 — 820 220 170 90 650 60 ns VS = 0 V VS = 600 V Static Electrical Characteristics VBIAS (VCC, VBS) = 15 V and TA = 25 °C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol VIH VIL VOH VOL ILK IQBS IQCC IIN+ IINVCCUV+ VCCUVIO+ IO- Definition Logic “1” (HIN) & Logic “0” ( LIN ) input voltage Logic “0” (HIN) & Logic “1” ( LIN ) input voltage High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic “1” input bias current Logic “0” input bias current VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold Output high short circuit pulsed current Output low short circuit pulsed current Min. Typ. Max. Units Test Conditions 2.5 — — — — — — — — 8 7.4 130 270 — — 0.05 0.02 — 30 150 3 — 8.9 8.2 290 600 — 0.8 0.2 0.1 50 55 270 10 1 9.8 V 9 — mA — VO = 0 V, VIN = VIH PW ≤ 10 µs VO = 15 V, VIN = VIL PW ≤ 10 µs µA VIN = 0 V or 5 V HIN = 5 V, LIN = 0 V HIN = 0 V, LIN = 5 V V IO = 2 mA VB = VS = 600 V VCC = 10 V to 20 V www.irf.com 3 IRS2103(S)PbF Functional Block Diagram VB HV LEVEL SHIFT PULSE FILTER Q R S VS HO IHN PULSE GEN DEAD TIME & SHOOT-THROUGH PREVENTION VCC UV DETECT VCC LIN LO COM Lead Definitions Symbol Description HIN LIN VB HO VS VCC LO COM Logic input for high side gate driver output (HO), in phase Logic input for low side gate driver output (LO), out of phase High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return Lead Assignments 1 2 3 4 VCC HIN LIN COM VB HO VS LO 8 7 6 5 1 2 3 4 VCC HIN LIN COM VB HO VS LO 8 7 6 5 8 Lead PDIP 8 Lead SOIC IRS2103PbF www.irf.com IRS2103SPbF 4 IRS2103(S)PbF HIN LIN 50% 50% LIN ton tr 90% toff 90% tf HO LO LO 10% 10% Figure 1. Input/Output Timing Diagram 50% 50% HIN ton tr 90% toff 90% tf HO HIN LIN 50% 50% 10% 10% Figure 2. Switching Time Waveform Definitions 90% HO DT 10% DT LO 90% 10% Figure 3. Deadtime Waveform Definitions www.irf.com 5 IRS2103(S)PbF 1400 Turn-On Delay Time (ns) Turn-On Delay Time (ns) 1400 1200 1000 800 600 400 200 0 Typ. Max. 1200 1000 Max. 800 600 400 200 0 -50 Typ. -25 0 25 50 75 Temperature (oC) 100 125 10 12 14 16 18 20 VBIAS Supply Voltage (V) Figure 4A. Turn-On Time vs. Temperature Figure 4B. Turn-On Time vs. Supply Voltage 1000 500 Turn-On Delay Time (ns) Max . 800 600 Typ. 400 200 0 0 2 4 6 8 10 12 14 16 18 20 Turn-Off Delay Time (ns) 400 300 200 100 Typ. 0 -50 Max. -25 0 25 50 75 100 125 Temperature (oC) Input Voltage (V) Figure 4C. Turn-On Time vs. Input Voltage Figure 5A. Turn-Off Time vs. Temperature 500 Turn-Off Delay Time (ns) Turn-Off Delay Time(ns) 1000 800 600 M. ax Turn-Off Delay Time (ns) 400 300 200 100 0 10 12 14 16 18 20 Typ. Max. 400 200 0 0 2 4 6 8 10 12 14 16 18 Typ. VBIAS Supply Voltage (V) Input Voltage(V) Figure 5B. Turn-Off Time vs. Supply Voltage www.irf.com Figure 5C. Turn-Off Time vs. Input Voltage 6 IRS2103(S)PbF 500 Turn-On Rise Time (ns) 500 Turn-On Rise Time (ns) 400 300 200 100 0 -50 Typ. 400 300 Max. Max. 200 100 Max. Typ. Typ. 0 10 10 12 12 14 14 16 16 18 18 20 20 -25 0 25 50 o 75 100 125 Temperature ( C) VBIAS Supply Voltage (V) Figure 6A. Turn-On Rise Time vs. Temperature 200 Turn-Off Fall Time (ns) Figure 6B. Turn-On Rise Time vs. Voltage 200 Turn-Off Fall Time (ns) 150 100 Max. 150 Max. 100 50 Typ. 50 Typ. 0 -50 -25 0 25 50 o 75 100 125 0 10 12 14 16 18 20 Input Voltage (V) Temperature ( C) Figure 7A. Turn-Off Fall Time vs. Temperature 1400 1200 Figure 7B. Turn-Off Fall Time vs. Voltage 1400 1200 Deadtime (ns) Deadtime (ns) 1000 800 600 Ty p. 400 200 Min. Max. 1000 800 600 400 Max. Typ. Min. 200 0 0 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) VBIAS Supply Voltage (V) Figure 8A. Deadtime vs. Temperature Figure 8B. Deadtime vs. Voltage www.irf.com 7 IRS2103(S)PbF 5 IInput Vloltag(e ) V) nput Vo tage V ( 5 4 3 2 1 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) Input Voltage (V) 4 3 Mi n. Mi n. 2 1 -50 VBAIS Supply Voltage (V) Figure 9A. Logic "1" Input Voltage vs. Temperature 4 3.2 2.4 1.6 Max. 0.8 0 -50 Figure 9B. Logic "1" Input Voltage vs. Supply Voltage 4 3.2 2.4 1.6 Max. 0.8 0 Input Voltage (V) -25 0 25 50 75 100 125 Input Voltage (V) 10 12 Temperature (oC) 14 16 Vcc Supply Voltage (V) 18 20 Figure 10A. Logic "0"(HIN) & Logic "1" (LIN ) Input Voltage vs. Temperature 0.5 Figure 10B. Logic "0"(HIN) & Logic "1" ( LIN ) Input Voltage vs. Voltage 0.5 0.4 0.3 0.2 0.1 0.0 10 12 14 16 18 20 VBIAS Supply Voltage (V) Typ. High Level Output Voltage (V) 0.4 0.3 High Level Output Voltage (V) Max. 0.2 Max. 0.1 Typ. 0.0 -50 -25 0 25 50 75 100 125 Temperature ( oC) Figure 11A. High Level Output Voltage vs. Temperature www.irf.com Figure 11B. High Level Output Voltage vs. Supply Voltage 8 PDF created with pdfFactory trial version www.pdffactory.com IRS2103(S)PbF 0.5 Low Level Output Voltage (V) Low Level Output Voltage (V) 0.5 0.4 0.3 0.2 Max. 0.4 0.3 0.2 0.1 0.0 -50 -25 0 25 50 o Max. Typ. 0.1 Typ. 0 75 100 125 10 12 14 16 18 20 Temperature ( C) V BIAS Supply Voltage (V) Figure 12A. Low Level Output Voltage vs. Temperature Offset Supply Leakge Current (µA) 500 400 300 200 100 Figure 12B. Low Level Output Voltage vs. Supply Voltage Offset Supply Leakge Current (µA) 500 400 300 200 100 0 0 200 400 600 800 VB Boost Voltage (V) Max. Max. 0 -50 -25 0 25 50 75 100 125 Temperature (oC) Figure 13A. Offset Supply Current vs. Temperature 150 Figure 13B. Offset Supply Current vs. Voltage 150 VBS Supply Current (µA) 120 90 60 Max. 30 Typ. 0 -50 VBS Supply Current (µA) 120 90 60 30 Ty p. 0 Max. -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) VBS Floating Supply Voltage (V) Figure 14A. VBS Supply Current vs. Temperature www.irf.com Figure 14B. VBS Supply Current vs. Voltage 9 IRS2103(S)PbF 700 VCC Supply Current (µA) 700 600 500 400 300 200 100 Typ. VCC Supply Current (µA) 600 500 400 300 200 100 0 Typ. Max. Max. 0 -50 -25 0 25 50 Temperature (oC) 75 100 125 10 12 14 16 18 20 Vcc Supply Voltage (V) Figure 15A. Vcc Supply Current vs. Temperature 30 Figure 15B. Vcc Supply Current vs. Voltage 30 Logic “1” Input Current (µA) Logic “1” Input Current (µA) 25 20 15 Max. 10 Max 25 20 15 Max. 10 5 0 Typ. 5 Typ. 0 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) Vcc Supply Voltage (V) Figure 16A. Logic "1" Input Current vs. Temperature 5 Logic “0” Input Current (µA) Figure 16B. Logic "1" Input Current vs. Voltage 5 4 3 2 Max. 1 0 4 3 2 Max. 1 0 -50 -25 0 25 50 75 100 125 Logic “0” Input Current (µA) 10 12 Temperature (oC) 14 16 Vcc Supply Voltage (V) 18 20 Figure 17A. Logic "0" Input Current vs. Temperature www.irf.com Figure 17B. Logic "0" Input Current vs. Voltage 10 IRS2103(S)PbF 11 VCC UVLO Threshold +(V) 11 VCC UVLO Threshold -(V) Max. 10 Typ. Typ. 9 Min. 8 7 6 -50 10 Max. 9 Typ. Typ. 8 7 Min. 6 -50 -25 0 25 50 75 100 125 -25 0 25 50 75 100 125 Temperature (oC) Temperature (oC) Figure 18A. Vcc Undervoltage Threshold(+) vs. Temperature 500 Output Source Current (mA) Figure 18B. Vcc UndervoltageThreshold (-) vs. Temperature 500 Output Source Current (mA) 400 300 200 100 0 -50 -25 0 25 50 o 400 300 200 Typ. Typ. Min. 100 Min. 0 75 100 125 10 12 14 16 18 20 Temperature ( C) V BIAS Supply Voltage (V) Figure 19A. Output Source Current vs. Temperature 1000 Output Sink Current (mA) Output Sink Current (mA) Figure 19B. Output Source Current vs. Supply Voltage 1000 800 600 400 200 0 Typ. 800 600 400 Typ. Min. 200 Min. 0 -50 -25 0 25 50 o 75 100 125 10 12 14 16 18 20 Temperature ( C) VBIAS Supply Voltage (V) Figure 20A. Output Sink Current vs. Temperature www.irf.com Figure 20B. Output Sink Current vs. Supply Voltage 11 IRS2103(S)PbF Case Outlines 8-Lead PDIP 01-6014 01-3003 01 (MS-001AB) D A 5 B FOOTPRINT 8X 0.72 [.028] DIM A b c D INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574 MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 A1 .0040 6 E 8 7 6 5 H 0.25 [.010] A E 6.46 [.255] 1 2 3 4 e e1 H K L 8X 1.78 [.070] .050 BASIC .025 BASIC .2284 .0099 .016 0° .2440 .0196 .050 8° 1.27 BASIC 0.635 BASIC 5.80 0.25 0.40 0° 6.20 0.50 1.27 8° 6X e e1 3X 1.27 [.050] y A C 0.10 [.004] y K x 45° 8X b 0.25 [.010] NOTES: A1 CAB 8X L 7 8X c 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA. 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE. 8-Lead SOIC www.irf.com 01-6027 01-0021 11 (MS-012AA) 12 IRS2103(S)PbF Tape & Reel 8-lead SOIC LOAD ED TA PE FEED DIRECTION B A H D F C N OT E : CO NTROLLING D IM ENSION IN MM E G C A R R I E R T A P E D IM E N S I O N F O R 8 S O I C N M etr ic Im p er i al Co d e M in M ax M in M ax A 7 .9 0 8.1 0 0. 31 1 0 .3 18 B 3 .9 0 4.1 0 0. 15 3 0 .1 61 C 11 .7 0 1 2. 30 0 .4 6 0 .4 84 D 5 .4 5 5.5 5 0. 21 4 0 .2 18 E 6 .3 0 6.5 0 0. 24 8 0 .2 55 F 5 .1 0 5.3 0 0. 20 0 0 .2 08 G 1 .5 0 n/ a 0. 05 9 n/ a H 1 .5 0 1.6 0 0. 05 9 0 .0 62 F D C E B A G H R E E L D IM E N S I O N S F O R 8 S O IC N M etr ic Im p er i al Co d e M in M ax M in M ax A 32 9. 60 3 30 .2 5 1 2 .9 76 13 .0 0 1 B 20 .9 5 2 1. 45 0. 82 4 0 .8 44 C 12 .8 0 1 3. 20 0. 50 3 0 .5 19 D 1 .9 5 2.4 5 0. 76 7 0 .0 96 E 98 .0 0 1 02 .0 0 3. 85 8 4 .0 15 F n /a 1 8. 40 n /a 0 .7 24 G 14 .5 0 1 7. 10 0. 57 0 0 .6 73 H 12 .4 0 1 4. 40 0. 48 8 0 .5 66 www.irf.com 13 IRS2103(S)PbF LEADFREE PART MARKING INFORMATION Part number S IRxxxxxx Date code YWW? ?XXXX IR logo Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 200-002 ORDER INFORMATION 8-Lead PDIP IRS2103PbF 8-Lead SOIC IRS2103SPbF 8-Lead SOIC Tape & Reel IRS2103STRPbF The SOIC-8 is MSL2 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at www.irf.com IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 6/14/2006 www.irf.com 14
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