IRS2106STRPBF

PRELIMINARY Data Sheet No. PD60246 revB IRS2106/IRS21064(S)PbF HIGH AND LOW SIDE DRIVER Features Packages • Floating channel designed for bootstrap operation • Fully operational to +600 V 8-Lead SOIC • Tolerant to negative transient voltage, dV/dt immune • Gate drive supply range from 10 V to 20 V • Undervoltage lockout for both channels • 3.3 V, 5 V, and 15 V input logic compatible • Matched propagation delay for both channels • Logic and power ground +/- 5 V offset. • Lower di/dt gate driver for better noise immunity • Outputs in phase with inputs (IRS2106) 14-Lead SOIC 14-Lead PDIP 8-Lead PDIP Description The IRS2106/IRS21064 are high Crossvoltage, high speed power MOSFET Input conduction Dead-Time Ground Pins Ton/Toff Part and IGBT drivers with independent prevention logic logic high and low side referenced output 2106/2301 COM 220/200 HIN/LIN no none channels. Proprietary HVIC and 21064 VSS/COM latch immune CMOS technologies 2108 Internal 540ns COM HIN/LIN yes 220/200 Programmable 0.54~5 µs 21084 VSS/COM enable ruggedized monolithic con2109/2302 Internal 540ns COM struction. The logic input is IN/SD yes 750/200 Programmable 0.54~5 µs 21094 VSS/COM compatible with standard CMOS or yes 160/140 Internal 100ns HIN/LIN COM 2304 LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 V. Feature Comparison Typical Connection VCC up to 600 V V CC HIN LIN VB HO VS LO TO LOAD HIN LIN COM IRS2106 HO V CC HIN up to 600 V V CC HIN LIN VB VS TO LOAD (Refer to Lead Assignments for correct pin configuration). These diagrams show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. LIN IRS21064 COM LO V SS V SS www.irf.com 1 IRS2106/IRS21064(S)PbF PRELIMINARY Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol VB VS VHO VCC VLO VIN VSS dVS/dt Definition High side floating absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage Logic ground (IRS21064 only) Allowable offset supply voltage transient (8 lead PDIP) Min. -0.3 V B - 25 VS - 0.3 -0.3 -0.3 VSS - 0.3 VCC - 25 — — — — — — — — — — -50 — Max. 625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 VCC + 0.3 50 1.0 0.625 1.6 1.0 125 200 75 120 150 150 300 Units V V/ns PD Package power dissipation @ TA ≤ +25 °C (8 lead SOIC) (14 lead PDIP) (14 lead SOIC) (8 lead PDIP) (8 lead SOIC) (14 lead PDIP) (14 lead SOIC) W RthJA Thermal resistance, junction to ambient °C/W TJ TS TL Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) °C www.irf.com 2 IRS2106/IRS21064(S)PbF PRELIMINARY Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at a 15 V differential. Symbol VB VS VHO VCC VLO VIN VSS TA Definition High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage Logic ground (IRS21064 only) Ambient temperature Min. VS + 10 Note 1 VS 10 0 VSS -5 -40 Max. VS + 20 600 VB 20 VCC VCC 5 125 Units V °C Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip DT97-3 for more details). Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15 V, VSS = COM, CL = 1000 pF, TA = 25 °C. Symbol ton toff MT tr tf Definition Turn-on propagation delay Turn-off propagation delay Delay matching, HS & LS turn-on/off Turn-on rise time Turn-off fall time Min. — — — — — Typ. 220 200 0 100 35 Max. Units Test Conditions 300 280 30 220 80 ns VS = 0 V VS = 0 V VS = 0 V or 600 V www.irf.com 3 IRS2106/IRS21064(S)PbF PRELIMINARY Static Electrical Characteristics VBIAS (VCC, VBS) = 15 V, VSS = COM and TA = 25 °C unless otherwise specified. The VIL, VIH, and IIN parameters are referenced to VSS/COM and are applicable to the respective input leads. The VO, IO, and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol VIH VIL VOH VOL ILK IQBS IQCC IIN+ IINVCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH IO+ IO- Definition Logic “1” input voltage Logic “0” input voltage High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic “1” input bias current VIN = 5 V Logic “0” input bias current VIN = 0 V VCC and VBS supply undervoltage positive going threshold VCC and VBS supply undervoltage negative going threshold Hysteresis Output high short circuit pulsed current Output low short circuit pulsed current Min. Typ. Max. Units Test Conditions 2.5 — — — — 20 60 — — 8.0 7.4 0.3 130 270 — — 0.05 0.02 — 75 120 5 — 8.9 8.2 0.7 290 600 — 0.8 0.2 0.1 50 130 180 20 2 9.8 9.0 — — mA — VO = 0 V, PW ≤ 10 µs VO = 15 V, PW ≤ 10 µs V µA V IO = 2 mA VB = VS = 600 V VIN = 0 V or 5 V VCC = 10 V to 20 V www.irf.com 4 IRS2106/IRS21064(S)PbF PRELIMINARY Functional Block Diagrams VB IRS2106 HV LEVEL SHIFTER PULSE GENERATOR UV DETECT R PULSE FILTER R S Q HO HIN VSS/COM LEVEL SHIFT VS VCC UV DETECT LO LIN VSS/COM LEVEL SHIFT DELAY COM VB IRS21064 HV LEVEL SHIFTER PULSE GENERATOR UV DETECT R PULSE FILTER R S Q HO HIN VSS/COM LEVEL SHIFT VS VCC UV DETECT LO LIN VSS/COM LEVEL SHIFT DELAY COM VSS www.irf.com 5 IRS2106/IRS21064(S)PbF PRELIMINARY Lead Definitions Symbol Description HIN LIN VSS VB HO VS VCC LO COM Logic input for high side gate driver output (HO), in phase Logic input for low side gate driver output (LO), in phase Logic ground (IRS21064 only) High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return Lead Assignments 1 2 3 4 VCC HIN LIN COM VB HO VS LO 8 7 6 5 1 2 3 4 VCC HIN LIN COM VB HO VS LO 8 7 6 5 8 Lead PDIP 8 Lead SOIC IRS2106PbF IRS2106SPbF 1 2 3 4 5 6 7 VCC HIN LIN VB HO VS VSS COM LO 14 13 12 11 10 9 8 1 2 3 4 5 6 7 VCC HIN LIN VB HO VS VSS COM LO 14 13 12 11 10 9 8 14 Lead PDIP 14 Lead SOIC IRS21064PbF www.irf.com IRS21064SPbF 6 IRS2106/IRS21064(S)PbF PRELIMINARY HIN LIN HO LO Figure 1. Input/Output Timing Diagram HIN LIN ton 50% 50% tr 90% toff 90% tf HO LO 10% 10% Figure 2. Switching Time Waveform Definitions HIN LIN 50% 50% LO HO 10% MT 90% MT LO HO Figure 3. Delay Matching Waveform Definitions www.irf.com 7 IRS2106/IRS21064(S)PbF PRELIMINARY 500 500 Turn- O n Propagation Delay (ns) 400 Turn-On Propagation Delay (ns) 400 M ax. 300 300 M ax 200 Typ. 100 Typ. 200 100 0 -50 -25 0 25 50 75 100 125 0 10 12 14 16 18 20 Temperature ( oC) Figure 4A. Turn-On Propagation Delay vs. Temperature V BIAS Supply Voltage (V) Figure 4B. Turn-On Propagation Delay vs. Supply Voltage 500 500 Turn-Off Propagation Delay (ns) 400 Turn-Off Propagation Delay (ns) 400 M ax. 300 Typ. 200 300 M ax. 200 Typ. 100 100 0 -50 -25 0 25 50 75 100 125 0 10 12 14 16 18 20 Temperature (oC) Figure 5A. Turn-Off Propagation Delay vs. Temperature V BIAS Supply Voltage (V) Figure 5B. Turn-Off Propagation Delay vs. Supply Voltage www.irf.com 8 IRS2106/IRS21064(S)PbF PRELIMINARY 500 T ur n- O n R is e T im e ( n s ) 400 300 200 Max. 500 T ur n - O n R is e T im e ( n s ) 400 300 Max. 200 100 0 100 Typ. Typ. 0 -50 -25 0 25 50 ( oC) 75 100 125 10 12 14 16 18 20 Temperature V BIAS Supply Voltage (V) Figure 6B. Turn-On Rise Time vs. Supply Voltage Figure 6A. Turn-On Rise Time vs. Temperature 200 T ur n- O ff F all T im e 150 100 Max. 200 T ur n- O ff F all T im e 150 100 Max. 50 T yp. 50 Typ. 0 -50 0 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) Figure 7A. Turn-Off Fall Time vs. Temperature Input Voltage (V) Figure 7B. Turn-Off Fall Time vs. Supply Voltage www.irf.com 9 PDF created with pdfFactory trial version www.pdffactory.com IRS2106/IRS21064(S)PbF PRELIMINARY 8 7 In p u t V o lt a g e ( V ) I n p u t Vo lta g e ( V ) 6 5 4 3 2 1 0 -50 -25 0 25 50 (oC) 75 100 125 Mi n. 8 7 6 5 4 3 2 1 0 10 12 14 16 18 20 Temperature Mi n. VBAIS Supply Voltage (V) Figure 8B. Logic “1” Input Voltage vs. Supply Voltage Figure 8A. Logic “1” Input Voltage vs. Temperature 4.0 4.0 3.2 3.2 Input Voltage (V ) 2.4 Input Voltage (V ) 2.4 1.6 M in. 0.8 1.6 M in. 0.8 0.0 -50 -25 0 25 50 75 100 125 0.0 10 12 14 16 18 20 Temperature (oC) Figure 9A. Logic "0"“0” Input Voltage Input Voltage Figure 9A. Logic vs. Temperature VCC Supply Voltage (V) Figure 9B. Logic “0” Input Voltage vs. Supply Voltage www.irf.com 10 PDF created with pdfFactory trial version www.pdffactory.com IRS2106/IRS21064(S)PbF PRELIMINARY High Level Output Voltage (V) High Level O utput Voltage (V) High Level Output Voltage (V) High Level O utput Voltage (V) 0.5 0.4 0.3 0.2 0.1 Typ. 0.5 0.4 0.3 0.2 0.1 Typ. Max. Max. 0.0 -50 0.0 10 12 14 16 18 20 V BAIS Supply Voltage (V) Figure 10B. High Level Output Voltage vs. Supply Voltage -25 0 25 50 75 100 125 Temperature (oC) Figure 10A. High Level Output Voltage vs. Temperature Low Level Output Voltage (V) Low Level O utput Voltage (V) Low Level Output Low Level O utput Voltage (V) (V) 0.5 0.4 0.3 0.2 0.1 Max. Typ. 0.5 0.4 0.3 0.2 Max. 0.1 Typ. 0.0 -50 0 10 12 14 16 18 20 V BIAS Supply Voltage (V) Figure 11B. Low Level Output Voltage vs. Supply Voltage -25 0 25 50 75 100 125 Temperature (oC) Figure 11A. Low Level Output Voltage vs. Temperature www.irf.com 11 IRS2106/IRS21064(S)PbF PRELIMINARY 400 Offset Supply Leakage Current (µA) Offset Supply Leakage Current (µA) 500 500 400 300 300 200 200 100 M ax. 0 50 25 0 25 50 75 100 125 100 M ax. 0 0 100 200 300 400 500 600 Temperature ( oC) Figure 12A. Offset Supply Leakage Current vs. Temperature V B Boost Voltage (V) Figure 12B. Offset Supply Leakage Current vs. Supply Voltage 400 400 V BS Supply Current (µA) V BS Supply Current (µA) 0 25 50 o 300 300 200 200 M ax. 100 Typ. Mi n. 0 50 25 75 100 125 M ax. 100 Typ. Mi n. 0 10 12 14 16 18 20 Temperature ( C) Figure 13A. VBS Supply Current vs. Temperature V BS Supply Voltage (V) Figure 13B. VBS Supply Current vs. Supply Voltage www.irf.com 12 IRS2106/IRS21064(S)PbF PRELIMINARY 400 400 V c c S u p p ly C urrent ( µ A ) 300 V CC Supply Current (µA) 300 M ax. 200 Typ. 200 M ax. Typ. 100 Mi n. 100 Mi n. 0 -0 5 25 0 25 50 75 100 125 0 10 12 14 16 18 20 Te m p e ra t u re ( o C ) Figure 14A. Quiescent V CC Supply Current vs. Temperature V CC Supply Voltage (V) Figure 14B. Quiescent VCC Supply Current vs. VCC Supply Voltage 60 60 Logic "1" Input Current ( µ A) 50 Logic "1" Input Current ( µ A) 50 40 40 30 30 M ax. 20 20 M ax. Typ. 0 50 25 0 25 50 75 100 125 10 10 Typ. 0 10 12 14 16 18 20 Temperature (oC) Figure 15A. Logic “1” Input Current vs. Temperature V CC Supply Voltage (V) Figure 15B. Logic “1” Bias Current vs. Supply Voltage www.irf.com 13 IRS2106/IRS21064(S)PbF PRELIMINARY 5 5 Logic "0" Input Current ( µ A ) Logic "0" Input Current ( µ A ) 4 4 3 M ax. 2 3 M ax. 2 1 1 0 50 25 0 25 50 75 100 125 0 10 12 14 16 18 20 Temperature ( oC) Figure 16A. Logic “0” Input Current vs. Temperature V CC Supply Voltage (V) Figure 16B. Logic “0” Input Currentt vs. Supply Voltage 12 11 V CC UVLO Threshold (+) (V) 11 V CC UVLO Threshold (-) (V) 10 M ax. 9 Typ. 8 Mi n. 7 10 M ax. 9 Typ. Mi n. 8 7 50 25 0 25 50 75 100 125 6 50 25 0 25 50 o 75 100 125 Temperature ( oC) Figure 17. VCC Undervoltage Threshold (+) vs. Temperature Temperature ( C) Figure 18. VCC Undervoltage Threshold (-) vs. Temperature www.irf.com 14 IRS2106/IRS21064(S)PbF PRELIMINARY 12 11 V BS UVLO Threshold (+) (V) V BS UVLO Threshold (-) (V) 11 10 10 M ax. 9 M ax. Typ. 9 Mi n. 8 Typ. 8 Mi n. 7 7 50 25 0 25 50 o 6 75 100 125 50 25 0 25 50 75 100 125 Temperature ( C) Figure 19. VBS Undervoltage Threshold (+) vs. Temperature Temperature ( oC) Figure 20. VBS Undervoltage Threshold (-) vs. Temperature Output Source Current (mA) 400 Typ. Output Source Current(mA) 500 500 400 300 200 Typ. 300 200 100 0 -50 -25 0 25 50 75 100 125 Te m p e ra t u re ( o C) Figure 21A. Output Source Current vs. Temperature Max. 100 Max. 0 10 12 14 16 18 20 V BIAS S u p p l y V o l t a g e ( V ) Figure 21B. Output Source Current vs. Supply Voltage www.irf.com 15 IRS2106/IRS21064(S)PbF PRELIMINARY 1000 Output Sink Current (mA) 800 Typ. 1000 Output Sink Current (mA) 800 600 400 Typ. 600 400 Max. 200 0 -50 -25 0 25 50 75 100 125 Te m p e ra t u re ( o C) Figure 22A. Output Sink Current vs. Temperature 200 Max. 0 10 12 14 16 18 20 V BIASS u p p l y V o l t a g e ( V ) Figure 22B. Output Sink Currentt vs. Supply Voltage 0 140 120 Temprature (oC) Typ. V S Offset Supply Voltage (V) 2 100 80 60 40 20 140V 70V 0V 4 6 8 10 10 12 14 16 18 20 1 10 100 1000 V BS Floating Supply Voltage (V) Figure 23. Maximum VS Negative Offset vs. Supply Voltage Frequency (kHz) Figure 24. IRS2106 vs. Frequency (IRFBC20), Rgate=33 Ω, VCC=15 V www.irf.com 16 IRS2106/IRS21064(S)PbF PRELIMINARY 1 40 140 120 Temperature (oC) 100 140V 1 20 Temperature (oC) 1 00 140V 80 70V 80 60 40 70V 0V 60 0V 40 20 20 1 1 0 1 00 1 000 1 Frequency (kHz) 10 100 1000 Frequency (kHz) Figure 26. IRS2106 vs. Frequency (IRFBC40), Rgate=15 Ω , V CC=15 V Figure 25. IRS2106 vs. Frequency (IRFBC30), Rgate=22 Ω , V CC=15 V 140 120 Temperature (oC) 100 80 60 40 20 1 10 100 140V 70V 140 0V 120 Temperature (oC) 100 80 60 40 0V 140V 70V 20 1000 1 10 100 1000 Frequency (kHz) Frequency (kHz) Figure 28. IRS21064 vs. Frequency (IRFBC20), Rgate=33 Ω , V CC=15 V Figure 27. IRS2106 vs. Frequency (IRFPE50), Rgate=10 Ω , V CC=15 V www.irf.com 17 IRS2106/IRS21064(S)PbF PRELIMINARY 140 120 Temperature (oC) Temperature (oC) 100 80 140V 140 120 100 140V 80 60 40 20 70V 0V 60 40 20 1 10 100 70V 0V 1000 1 10 100 1000 Frequency (kHz) Figure 29. IRS21064 vs. Frequency (IRFBC30), Rgate=22 Ω , V CC=15 V Frequency (kHz) Figure 30. IRS21064 vs. Frequency (IRFBC40), Rgate=15 Ω , V CC=15 V 140 120 Temperature (oC) 140V 140 120 Temperature (oC) 100 80 60 40 20 140V 70V 100 80 60 40 20 1 10 100 0V 70V 0V 1000 1 10 100 1000 Frequency (kHz) Figure 31. IRS21064 vs. Frequency (IRFPE50), Rgate=10 Ω , V CC=15 V Frequency (kHz) Figure 32. IRS2106S vs. Frequency (IRFBC20), Rgate=33 Ω , V CC=15 V www.irf.com 18 IRS2106/IRS21064(S)PbF PRELIMINARY 140 120 140V 140 120 Temperature (oC) 140V 70V Temperature (oC) 0V 100 80 60 40 20 1 10 100 70V 0V 100 80 60 40 20 1000 1 10 100 1000 Frequency (kHz) Figure 33. IRS2106S vs. Frequency (IRFBC30), Rgate=22 Ω , V CC=15 V Frequency (kHz) Figure 34. IRS2106S vs. Frequency (IRFBC40), Rgate=15 Ω , V CC=15 V 140 120 Tempreture (oC) 100 80 60 40 20 1 10 140V 70V 0V 140 120 Temperature (oC) 100 80 60 40 140V 70V 0V 100 1000 20 1 10 100 1000 Frequency (kHz) Frequency (kHz) Figure 35. IRS2106S vs. Frequency (IRFPE50), Rgate=10 Ω , V CC=15 V Figure 36. IRS21064S vs. Frequency (IRFBC20), Rgate=33 Ω , V CC=15 V www.irf.com 19 IRS2106/IRS21064(S)PbF PRELIMINARY 1 40 140 120 Temperature (oC) 100 80 0V 140V 70V 1 20 Temperature (oC) 1 00 80 140V 70V 60 40 60 0V 40 20 20 1 1 0 1 00 1 000 1 Frequency (kHz) 10 100 1000 Frequency (kHz) Figure 38. IRS21064S vs. Frequency (IRFBC40), Rgate=15 Ω , V CC=15 V Figure 37. IRS21064S vs. Freque ncy (IRFBC30), Rg a t e =22 Ω , V CC=15 V 140 120 Temperature (oC) 100 80 60 40 20 1 10 100 140V 70V 0V 1000 Frequency (kHz) Figure 39. IRS21064S vs. Frequency (IRFPE50), Rgate=10 Ω , V CC=15 V www.irf.com 20 IRS2106/IRS21064(S)PbF PRELIMINARY Case Outlines 8 Lead PDIP D A 5 B FOOTPRINT 8X 0.72 [.028] 01-6014 01-3003 01 (MS-001AB) INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574 MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 DIM A b c D A1 .0040 6 E 8 7 6 5 H 0.25 [.010] A E 6.46 [.255] 1 2 3 4 e e1 H K L 8X 1.78 [.070] .050 BASIC .025 BASIC .2284 .0099 .016 0° .2440 .0196 .050 8° 1.27 BASIC 0.635 BASIC 5.80 0.25 0.40 0° 6.20 0.50 1.27 8° 6X e e1 3X 1.27 [.050] y A C 0.10 [.004] y K x 45° 8X b 0.25 [.010] NOTES: A1 CAB 8X L 7 8X c 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA. 5 DIMENSION DOES NOT INC LUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXC EED 0.15 [.006]. 6 DIMENSION DOES NOT INC LUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXC EED 0.25 [.010]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE. 8 Lead SOIC www.irf.com 01-6027 01-0021 11 (MS-012AA) 21 IRS2106/IRS21064(S)PbF PRELIMINARY 14 Lead PDIP 01-6010 01-3002 03 (MS-001AC) 14 Lead SOIC (narrow body) www.irf.com 01-6019 01-3063 00 (MS-012AB) 22 IRS2106/IRS21064(S)PbF PRELIMINARY Tape & Reel 8-lead SOIC LOAD ED TA PE FEED DIRECTION B A H D F C N OT E : CO NTROLLING D IM ENSION IN MM E G C A R R I E R T A P E D IM E N S I O N F O R 8 S O I C N M etr ic Im p er i al Co d e M in M ax M in M ax A 7 .9 0 8.1 0 0. 31 1 0 .3 18 B 3 .9 0 4.1 0 0. 15 3 0 .1 61 C 11 .7 0 1 2. 30 0 .4 6 0 .4 84 D 5 .4 5 5.5 5 0. 21 4 0 .2 18 E 6 .3 0 6.5 0 0. 24 8 0 .2 55 F 5 .1 0 5.3 0 0. 20 0 0 .2 08 G 1 .5 0 n/ a 0. 05 9 n/ a H 1 .5 0 1.6 0 0. 05 9 0 .0 62 F D C E B A G H R E E L D IM E N S I O N S F O R 8 S O IC N M etr ic Im p er i al Co d e M in M ax M in M ax A 32 9. 60 3 30 .2 5 1 2 .9 76 13 .0 0 1 B 20 .9 5 2 1. 45 0. 82 4 0 .8 44 C 12 .8 0 1 3. 20 0. 50 3 0 .5 19 D 1 .9 5 2.4 5 0. 76 7 0 .0 96 E 98 .0 0 1 02 .0 0 3. 85 8 4 .0 15 F n /a 1 8. 40 n /a 0 .7 24 G 14 .5 0 1 7. 10 0. 57 0 0 .6 73 H 12 .4 0 1 4. 40 0. 48 8 0 .5 66 www.irf.com 23 IRS2106/IRS21064(S)PbF PRELIMINARY Tape & Reel 14-lead SOIC LOAD ED TA PE FEED DIRECTION B A H D F C N OT E : CO NTROLLING D IM ENSION IN MM E G C A R R I E R T A P E D IM E N S I O N F O R 1 4 S O IC N M etr ic Im p er i al Co d e M in M ax M in M ax A 7 .9 0 8.1 0 0. 31 1 0 .3 18 B 3 .9 0 4.1 0 0. 15 3 0 .1 61 C 15 .7 0 1 6. 30 0. 61 8 0 .6 41 D 7 .4 0 7.6 0 0. 29 1 0 .2 99 E 6 .4 0 6.6 0 0. 25 2 0 .2 60 F 9 .4 0 9.6 0 0. 37 0 0 .3 78 G 1 .5 0 n/ a 0. 05 9 n/ a H 1 .5 0 1.6 0 0. 05 9 0 .0 62 F D C E B A G H R E E L D IM E N S I O N S F O R 1 4 SO IC N M etr ic Im p er i al Co d e M in M ax M in M ax A 32 9. 60 3 30 .2 5 1 2 .9 76 13 .0 0 1 B 20 .9 5 2 1. 45 0. 82 4 0 .8 44 C 12 .8 0 1 3. 20 0. 50 3 0 .5 19 D 1 .9 5 2.4 5 0. 76 7 0 .0 96 E 98 .0 0 1 02 .0 0 3. 85 8 4 .0 15 F n /a 2 2. 40 n /a 0 .8 81 G 18 .5 0 2 1. 10 0. 72 8 0 .8 30 H 16 .4 0 1 8. 40 0. 64 5 0 .7 24 www.irf.com 24 IRS2106/IRS21064(S)PbF PRELIMINARY LEADFREE PART MARKING INFORMATION Part number S IRxxxxxx Date code YWW? ?XXXX IR logo Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 200-002 ORDER INFORMATION 8-Lead PDIP IRS2106PbF 8-Lead SOIC IRS2106SPbF 8-Lead SOIC Tape & Reel IRS2106STRPbF 14-Lead PDIP IRS21064PbF 14-Lead SOIC IRS21064SPbF 14-Lead SOIC Tape & Reel IRS21064STRPbF IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 This product has been qualified per industrial level Data and specifications subject to change without notice. 5/11/2006 www.irf.com 25