IRS2112-1PBF

Data Sheet No. PD60251 IRS2112(-1,-2,S)PbF Features • • • • • • • • • • • • • HIGH AND LOW SIDE DRIVER Product Summary VOFFSET IO+/VOUT ton/off (typ.) Delay Matching 600 V max. 200 mA / 440 mA 10 V - 20 V 135 ns & 105 ns 30 ns Floating channel designed for bootstrap operation Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V to 20 V Undervoltage lockout for both channels 3.3 V logic compatible Separate logic supply range from 3.3 V to 20 V Logic and power ground +/- 5 V offset CMOS Schmitt-triggered inputs with pull-down Cycle by cycle edge-triggered shutdown logic Matched propagation delay for both channels Outputs in phase with inputs RoHS compliant Packages 14-Lead PDIP IRS2112 16-Lead PDIP (w/o leads 4 & 5) IRS2112-2 Description The IRS2112 is a high voltage, high speed power MOSFET and IGBT driver with independent high- and low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable rug14-Lead PD IP gedized monolithic construction. Logic inputs are com(w/o lead 4) patible with standard CMOS or LSTTL outputs, down IRS2112-1 to 3.3 V logic. The output drivers feature a high pulse 16- Lead SOIC current buffer stage designed for minimum driver IRS2112S cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. Typical Connection HO V DD HIN SD LIN V SS V CC VDD HIN SD LIN VSS VCC COM LO VB VS up to 600 V TO LOAD (Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IRS2112(-1,-2,S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figs. 28 through 35. Symbol VB VS VHO VCC VLO VDD VSS VIN dVs/dt PD RTHJA TJ TS TL Definition High-side floating supply voltage High-side floating supply offset voltage High-side floating output voltage Low-side fixed supply voltage Low- side output voltage Logic supply voltage Logic supply offset voltage Logic input voltage (HIN, LIN & SD) Allowable offset supply voltage transient (Fig. 2) Package power dissipation @ TA ≤ +25 °C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (14 Lead DIP) (16 Lead SOIC) (14 Lead DIP) (16 Lead SOIC) Min. - 0.3 VB - 25 VS - 0.3 - 0.3 - 0.3 -0.3 VCC - 25 VSS - 0.3 — — — — — — -55 — Max. 625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VSS + 25 VCC + 0.3 VDD + 0.3 50 1.6 1.25 75 100 150 150 300 Units V V/ns W °C/W °C Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15 V differential. Typical ratings at other bias conditions are shown in Figs. 36 and 37. Symbol VB VS VHO VCC VLO VDD VSS VIN TA Definition High-side floating supply absolute voltage High-side floating supply offset voltage High-side floating output voltage Low-side fixed supply voltage Low- side output voltage Logic supply voltage Logic supply offset voltage Logic input voltage (HIN, LIN & SD) Ambient temperature Min. VS + 10 Note 1 VS 10 0 VSS + 3 -5 (Note 2) VSS -40 Max. VS + 20 600 VB 20 VCC VSS + 20 5 VDD 125 Units V °C Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip DT97-3 for more details). Note 2: When VDD < 5 V, the minimum VSS offset is limited to -VDD. www.irf.com 2 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF Dynamic Electrical Characteristics VBIAS ( VCC , VBS, VDD ) = 15 V, CL = 1000 pF, TA = 25 °C and VSS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Fig. 3. Symbol ton toff tsd tr tf MT Definition Turn-on propagation delay Turn-off propagation delay Shutdown propagation delay Turn-on rise time Turn-off fall time Delay matching, HS & LS Turn-on/off Min. Typ. Max. Units Test Conditions — — — — — — 135 130 130 75 35 — 180 160 160 130 65 30 VS = 600 V VS = 0 V ns Static Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15 V, TA = 25 °C and VSS = COM unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN, and SD. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol VIH VIL VOH VOL ILK IQBS IQCC IQDD IIN+ IINVBSUV+ VBSUVVCCUV+ VCCUVIO+ IO- Definition Logic “1” input voltage Logic “0” input voltage High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Quiescent VDD supply current Logic “1” input bias current Logic “0” input bias current VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold Output high short circuit pulsed current Output low short circuit pulsed current Min. Typ. Max. Units Test Conditions 9.5 — — — — — — — — — 7.4 7.0 7.6 7.2 200 420 — — 0.05 0.02 — 25 80 2.0 20 — 8.5 8.1 8.6 8.2 290 600 — 6.0 0.2 0.1 50 100 180 30 40 1.0 9.6 9.2 V 9.6 9.2 — mA — VO = 0 V, VIN = VDD PW ≤ 10 µs VO = 15 V, VIN = 0 V PW ≤ 10 µs µA VIN = VDD VIN = 0 V VIN = 0 V or VDD V IO = 2 mA VB = VS = 600 V www.irf.com 3 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF Functional Block Diagram VB VDD RQ S HIN HV LEVEL SHIFT UV DETECT PULSE FILTER R R S Q HO VDD /VCC LEVEL SHIFT PULSE GEN VS SD UV DETECT VCC VDD /VCC LEVEL SHIFT LIN RQ VSS S LO DELAY COM Lead Definitions Symbol VDD HIN SD LIN VSS VB HO VS VCC LO COM Description Logic supply Logic input for high-side gate driver output (HO), in phase Logic input for shutdown Logic input for low-side gate driver output (LO), in phase Logic ground High-side floating supply High-side gate drive output High-side floating supply return Low-side supply Low-side gate drive output Low-side return www.irf.com 4 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF Lead Assignments 14 Lead PDIP 16 Lead SOIC (Wide Body) IRS2112 IRS2112S 14 Lead PDIP w/o lead 4 16 Lead PDIP w/o leads 4 & 5 IRS2112-1 Part Number IRS2112-2 www.irf.com 5 IRS2112(-1,-2,S)PbF VCC = 15 V HV = 10 V to 600 V 10 k F6 HIN LIN 10 µF 0.1 µF 9 10 3 6 5 7 11 1 12 0.1 µF 200 µH 10 k F6 100 µF SD HO 10 k F6 OUTPUT MONITOR dVs ct HO LO 13 2 IRF820 Figure 1. Input/Output Timing Diagram VCC = 15 V Figure 2. Floating Supply Voltage Transient Test Circuit HV = 10 V to 600 V 10 µF 0.1 µF 9 10 3 6 5 7 11 SD 12 1 CL 0.1 µF 10 µF + - VB 15 V VS (0 V to 600 V) HIN LIN ton 50% 50% HIN HO LO CL 10 µF tr 90% toff 90% tf LIN 13 2 HO LO 10% 10% Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition HIN LIN 50% 50% 50% SD tsd LO HO 10% HO LO 90% MT 90% MT LO Figure 5. Shutdown Waveform Definitions HO Figure 6. Delay Matching Waveform Definitions www.irf.com 6 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF T u rn- On Delay Tim e ( ns) . Tu r n- On Delay Tim e ( ns ) . 250 200 150 100 50 0 -50 M ax. 250 M ax 200 150 100 50 0 T yp. Typ. -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature(oC) V CC / V BS Supply V oltage (V ) Figure 7A. Turn-On Propagation Delay Time vs. Temperature T ur n-O n Del ay T im e ( ns ) . 400 M ax. Figure 7B. Turn-On Propagation Delay Time vs. VCC/VBS Supply Voltage 250 Tu r n- O ff Tim e ( ns ) 200 150 100 Typ . 300 200 Typ. M ax. 100 50 0 - 50 0 0 2 4 6 8 10 12 14 16 18 20 -25 0 25 50 75 100 125 V DD Supply V oltage (V ) Temperature(oC) Figure 7C. Turn-On Propagation Delay Time vs. VDD S upply Voltage 250 Tu r n- O ff T im e ( ns ) 200 150 Typ. M ax. Figure 8A. Turn-Off Propagation Delay Time vs. Temperature 400 Tur n-O ff Delay Tim e ( ns ) M ax . 300 200 T yp. 100 50 0 10 12 14 16 18 20 100 0 0 2 4 6 8 10 12 14 16 18 20 V CC/V B S Supply V oltage (V ) V DD Supply V oltage (V ) Figure 8B. Turn-Off Propagation Delay Time vs. VCC/VBS Supply Voltage Figure 8C. Turn-Off Propagation Delay Time vs. VDD Supply Voltage www.irf.com 7 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF 250 Sh utd ow n D ela y T im e (n s ) Sh utd ow n D ela y T ime ( n s ) 200 150 100 Typ . 250 200 150 Typ. M ax. M ax. 100 50 0 50 0 - 50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature(oC) V C C /V BS Supply V oltage (V ) Figure 9A. Shutdown Delay Time vs. Temperature 400 Shu tdo wn De lay T i me ( ns ) M ax . Figure 9B. Shutdown Delay Time vs. VCC/VBS Supply Voltage 250 Tur n- O n Ris e T ime ( n s ) . 200 150 M ax. 300 200 T yp. 100 50 0 100 T yp. 0 0 2 4 6 8 10 12 14 16 18 20 -5 0 -25 0 25 50 o 75 100 125 V DD Supply V oltage (V ) Temperature ( C) Figure 9C. Shutdown Time vs. VDD Supply Voltage 250 T ur n- O n Ris e T ime ( n s ) . Figure 10A. Turn-On Rise Time vs. Temperature 125 Tur n- O ff Fal l T im e ( ns ) 100 75 M ax. 200 M ax 150 100 Typ 50 25 Typ. 50 0 10 12 14 16 18 20 0 -50 -25 0 25 50 o 75 100 125 V BIAS Supply V oltage (V ) Temper ature ( C) Figure 10B. Turn-On Rise Time vs. Voltage Figure 11A. Turn-Off Fall Time vs. Temperature www.irf.com 8 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF 125 15 L o g ic " 1 " I n p u t T h r e s h o ld ( V ) 12 Min. 9 6 3 0 -50 -25 0 25 50 75 100 125 Tur n- O ff Fal l Tim e ( ns) 100 M ax 75 50 25 0 10 12 14 16 18 20 Typ V BIAS S upply Voltage (V ) Temperature (°C) Figure 12A. Logic “I” Input Threshold vs. Temperature 15 Logic "0" Input Threshold (V) 12 9 Figure 11B. Turn-Off Fall Time vs. Supply Voltage Logic " 1 " Input Treshold (V) 9 12 15 Min. 6 Max. 6 3 0 0 2.5 3 5 7.5 10 12.5 15 17.5 20 -5 0 -2 5 0 25 50 75 100 125 V DD Logic Supply Voltage (V) Temperature (°C) Figure 12B. Logic “I” Input Threshold vs. Voltage 15 Logic " 0 " Input Tres hold (V) Hig h L ev el O ut put Vo ltag e ( V) 1.0 0.8 0.6 0.4 Figure 13A. Logic “0” Input Threshold vs. Temperature 6 9 12 Max. 3 M ax. 0.2 0.0 -50 0 2.5 5 7.5 10 12.5 15 17.5 20 - 25 0 25 50 75 100 125 V DD Logic Supply Voltage (V) Temperature ( oC) Figure 13B. Logic “0” Input Threshold vs. Voltage Figure 14A. High Level Output Voltage vs. Temperature (Io = 2 mA) www.irf.com 9 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF Hig h L ev e l O utp ut Vol tag e ( V ) Low L ev el O utput Vo ltage ( V) 1.0 0.8 0.6 0.4 0.2 0.0 10 12 14 16 18 20 M ax 1.0 0.8 0.6 0.4 0.2 0.0 -50 M ax -25 0 25 50 o 75 100 125 V BAIS Supply V oltage (V ) Temperature ( C) Figure 14B. High Level Output Voltage vs. Supply Voltage (Io = 2 mA) Low Le v el Output Volt age ( V) 1.0 0.8 0.6 0.4 0.2 0.0 10 12 14 16 18 20 V BAIS Supply Volt age (V) VBS Supply Current (µA) Figure 15A. Low Level Output Voltage vs. Temperature (Io = 2 mA) 200 150 100 M ax. 50 Typ. M ax 0 -50 -25 0 25 50 o 75 100 125 Temperature ( C) Figure 15B. Low Level Output Voltage vs. Supply Voltage (Io = 2 mA) 200 VBS Supply Current (µA) Figure 16A. VBS Supply Current vs. Temperatur e 100 VBS Supply Current (µA) 150 100 M ax. 80 60 Max. 40 20 50 Typ. 0 10 12 14 16 18 20 V BS Supply Voltage (V) Typ. 0 -50 -25 0 25 50 75 100 125 Tem perature (°C ) Figure 16B. V BS Supply Current vs. Voltage Figure 17A. VBS Supply Current vs. Temperature www.irf.com 10 IRS2112(-1,-2,S)PbF 100 VBS Supply Current (µA) VCC Supply Current (µA) 80 M ax. 60 40 20 0 10 12 14 16 18 20 Ty p. 300 250 200 150 100 50 0 -5 0 -2 5 0 25 50 75 100 125 M ax. Typ. V B S F loating S upply Voltage (V ) Temperature (°C) Figure 17B. VBS Supply Current vs. Voltage 300 Vcc Supply Current (µA) Figure 18A. VCC Supply Current vs. Temperature 12 VDD Supply Current (µA) 250 200 150 100 50 0 10 12 14 16 18 20 10 8 6 4 2 0 -50 -25 0 25 50 M ax. M ax. Typ. Typ. 75 100 125 V cc Fixed Supply Voltage (V) Temperature (°C) Figure 18B. VCC Supply Current vs. Voltage 12 V DD S u p p ly C u rre n t (µA) Figure 19A. VDD Supply Current vs. Temperature Logic "1 " Input Bias Current (µA) 100 80 60 10 8 6 4 2 0 0 2 4 6 8 10 12 14 16 18 20 VDD Logic Supply Voltage (V) Max. Max. 40 20 Typ. Typ. 0 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 19B. VDD Supply Current vs. VDD Voltage Figure 20A. Logic “I” Input Current vs. Temperature www.irf.com 11 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF Logic "1" Input Bias Current (uA) Lo gic "0" Input Bia s Cur rent ( µA) 100 80 60 40 20 6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 Temperature (°C) Max Max. Typ. 0 0 2 4 6 8 10 12 14 16 18 VDD Logic Supply Voltage (V) 20 Figure 20B. Logic “1” Input Current vs. V DD Voltage Logic "0" Input Bias C urr ent (µA) 6 5 4 3 2 1 0 10 12 14 16 18 20 Supply Voltage (V) Max Figure 21A. Logic "0" Input Bias Current vs. Temperature VBS Undervoltage Lockout +(V) 11 10 9 Max. Typ. 8 Min. 7 6 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 21B. Logic "0" Input Bias Current vs. Voltage 11 VBS Undervoltage Lockout -(V) 10 Figure 22. VBS Undervoltage (+) vs. Temperature 11 VCC Undervoltage Lockout +(V) 10 9 8 7 6 -50 -25 0 25 50 75 100 125 Temperature (oC ) Max. 9 Max. Typ. Min. Typ. 8 Min. 7 6 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 23. VBS Undervoltage (-) vs. Temperature Figure 24. VCC Undervoltage (-) vs. Temperature www.irf.com 12 IRS2112(-1,-2,S)PbF VCC Undervoltage Lockout - (V) Ou tpu t S our c e Cu r r e nt ( mA ) 11 10 500 400 T yp. Max. 9 300 200 100 0 - 50 - 25 0 25 50 o Typ. 8 M in. Min. 7 6 -50 -25 0 25 50 75 100 125 75 100 125 Temperature (°C) Temperature ( C) Figure 25. VCC Undervoltage (-) vs. Temperature O u tp u t So u r c e C u r r e n t ( m A ) Figure 26A. Output Source Current vs. Temperature 750 Ou tpu t S ink Cu rre nt ( mA ) 600 M in. T yp. 500 400 300 200 100 M in. Typ . 450 300 150 0 0 10 12 14 16 18 20 - 50 - 25 0 25 50 75 100 12 5 V BIA S S upply Voltage ( V) Temperatu re ( oC) Figure 26B. Output Source Current vs. Supply Voltage 750 Ou tpu t Sink Cur ren t (m A ) 600 450 300 M in. Figure 27A. Output Sink Current vs. Temperature Typ. 150 0 10 12 14 16 18 20 V BIA S Supply V oltage (V ) Figure 27B. Output Sink Current vs. Supply Voltage www.irf.com 13 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF 150 150 320 V Junction Temperature (°C) 125 Junction Temperature (°C) 320 V 125 100 100 140 V 75 75 140 V 50 10 V 50 10 V 25 25 0 1E+2 1E+3 1E+4 1E+5 1E+6 0 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Frequency (Hz) Figure 28. IRS2112 TJ vs. Frequency (IRFBC20) RGATE = 33 Ω , VCC = 15 V 150 Figure 29. IRS2112 TJ vs. Frequency (IRFBC30) RGATE = 22 Ω , VCC = 15 V 150 320 V 320 V 140 V 10 V Junction Temperature (°C) 125 Junction Temperature (°C) 125 140 V 100 10 V 100 75 75 50 50 25 25 0 1E+2 1E+3 1E+4 1E+5 1E+6 0 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Frequency (Hz) Figure 30. IRS2112 TJ vs. Frequency (IRFBC40) RGATE = 15 Ω , VCC = 15 V 150 Figure 31. IRS2112 TJ vs. Frequency (IRFPE50) RGATE = 10 Ω , VCC = 15 V 320 V 150 320 V 140 V Junction Temperature (°C) 125 Junction Temperature (°C) 125 100 100 140 V 75 10 V 75 10 V 50 50 25 25 0 1E+2 1E+3 1E+4 1E+5 1E+6 0 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Frequency (Hz) Figure 32. IRS2112S TJ vs. Frequency (IRFBC20) RGATE = 33 Ω , VCC = 15 V Figure 33. IRS2112S TJ vs. Frequency (IRFBC30) RGATE = 22 Ω , VCC = 15 V www.irf.com 14 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF 150 320 V 140 V 150 320 V 140 V 10 V Junction Temperature (°C) 125 10 V Junction Temperature (°C) 125 100 100 75 75 50 50 25 25 0 1E+2 1E+3 1E+4 1E+5 1E+6 0 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Frequency (Hz) Figure 34. IRS2112S TJ vs. Frequency (IRFBC40) RGATE = 15 Ω , VCC = 15 V Figure 35. IRS2112S TJ vs. Frequency (IRFPE50) RGATE = 10 Ω , VCC = 15 V 0.0 20.0 VS Offset Supply Voltage (V) -3.0 Typ. VSS Logic Supply Offset Voltage (V) 12 14 16 18 20 16.0 -6.0 12.0 -9.0 8.0 Typ. -12.0 4.0 -15.0 10 0.0 10 12 14 16 18 20 VBS Floating Supply Voltage (V) VCC Fixed Supply Voltage (V) Figure 36. Maximum VS Negative Offset vs. VBS Supply Voltage Figure 37. Maximum VSS Positive Offset vs. VCC Supply Voltage www.irf.com 15 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF Case outline 14-Lead PDIP 01-6010 01-3002 03 (MS-001AC) 14-Lead PDIP w/o Lead 4 www.irf.com 01-6010 01-3008 02 (MS-001AC) 16 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF 16 Lead PDIP w/o Leads 4 & 5 01-6015 01-3010 02 16-Lead SOIC (wide body) www.irf.com 01 6015 01-3014 03 (MS-013AA) 17 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF Tape & Reel 16-Lead SOIC LOAD ED TA PE FEED DIRECTION B A H D F C N OT E : CO NTROLLING D IMENSION IN MM E G C A R R I E R T A P E D IM E N S I O N F O R 1 6 S O IC W M etr ic Im p eria l Code M in M ax M in M ax A 1 1 .9 0 1 2. 1 0 0. 4 6 8 0 .4 76 B 3 .9 0 4.1 0 0. 1 5 3 0 .1 61 C 1 5 .7 0 1 6. 3 0 0. 6 1 8 0 .6 41 D 7 .4 0 7.6 0 0. 2 9 1 0 .2 99 E 1 0 .8 0 1 1. 0 0 0. 4 2 5 0 .4 33 F 1 0 .6 0 1 0. 8 0 0. 4 1 7 0 .4 25 G 1 .5 0 n/ a 0. 0 5 9 n/ a H 1 .5 0 1.6 0 0. 0 5 9 0 .0 62 F D C E B A G H R E E L D IM E N S I O N S F O R 1 6 SO IC W M etr ic Im p eria l Code M in M ax M in M ax A 32 9. 60 3 30 .2 5 1 2 .9 76 1 3 .0 0 1 B 2 0 .9 5 2 1. 4 5 0. 8 2 4 0 .8 44 C 1 2 .8 0 1 3. 2 0 0. 5 0 3 0 .5 19 D 1 .9 5 2.4 5 0. 7 6 7 0 .0 96 E 9 8 .0 0 1 02 .0 0 3. 8 5 8 4 .0 15 F n /a 2 2. 4 0 n /a 0 .8 81 G 1 8 .5 0 2 1. 1 0 0. 7 2 8 0 .8 30 H 1 6 .4 0 1 8. 4 0 0. 6 4 5 0 .7 24 www.irf.com 18 PDF created with pdfFactory trial version www.pdffactory.com IRS2112(-1,-2,S)PbF LEADFREE PART MARKING INFORMATION Part number IRSxxxx YWW? ?XXXX Lot Code (Prod mode - 4 digit SPN code) IR logo Date code Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released Assembly site code Per SCOP 200-002 ORDER INFORMATION 14-Lead PDIP IRS2112PbF 14-Lead PDIP IRS2112-1PbF 16-Lead PDIP IRS2112-2PbF 16-Lead SOIC IRS2112SPbF 16-Lead SOIC Tape & Reel IRS2112STRPbF The SOIC-16 is MSL3 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at www.irf.com IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 11/27/2006 www.irf.com 19 PDF created with pdfFactory trial version www.pdffactory.com