IRS2113PBF

PRELIMINARY Data Sheet No. PD60249 revB IRS2110(-1,-2,S)PbF IRS2113(-1,-2,S)PbF Features HIGH AND LOW SIDE DRIVER • Floating channel designed for bootstrap operation Product Summary • Fully operational to +500 V or +600 V VOFFSET (IRS2110) 500 V max. • Tolerant to negative transient voltage, dV/dt immune (IRS2113) 600 V max. • Gate drive supply range from 10 V to 20 V IO+/2 A/2 A • Undervoltage lockout for both channels • 3.3 V logic compatible VOUT 10 V - 20 V • Separate logic supply range from 3.3 V to 20 V ton/off (typ.) 130 ns & 120 ns • Logic and power ground ±5V offset • CMOS Schmitt-triggered inputs with pull-down Delay Matching (IRS2110) 10 ns max. • Cycle by cycle edge-triggered shutdown logic (IRS2113) 20 ns max. • Matched propagation delay for both channels Packages • Outputs in phase with inputs Description The IRS2110/IRS2113 are high voltage, high speed power MOSFET and IGBT drivers with independent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 500 V or 600 V. 14-Lead PDIP IRS2110 and IRS2113 16-Lead PDIP (w/o leads 4 & 5) IRS2110-2 and IRS2113-2 14-Lead PDIP (w/o lead 4) IRS2110-1 and IRS2113-1 16-Lead SOIC IRS2110S and IRS2113S Typical Connection HO VDD HIN SD LIN VSS VCC VDD HIN SD LIN VSS VCC COM LO VB VS up to 500 V or 600 V TO LOAD (Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figs. 28 through 35. Symbol VB VS VHO VCC VLO VDD VSS VIN dVs/dt PD RTHJA TJ TS TL Definition High side floating supply voltage High side floating supply offset voltage High side floating output voltage Low side fixed supply voltage Low side output voltage Logic supply voltage Logic supply offset voltage Logic input voltage (HIN, LIN, & SD) Allowable offset supply voltage transient (Fig. 2) Package power dissipation @ TA ≤ +25 °C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (14 lead DIP) (16 lead SOIC) (14 lead DIP) (16 lead SOIC) (IRS2110) (IRS2113) Min. -0.3 -0.3 V B - 20 VS - 0.3 -0.3 -0.3 -0.3 VCC - 20 VSS - 0.3 — — — — — — -55 — Max. 520 (Note 1) 620 (Note 1) VB + 0.3 VB + 0.3 20 (Note 1) VCC + 0.3 VSS+20 (Note 1) VCC + 0.3 VDD + 0.3 50 1.6 1.25 75 100 150 150 300 Units V V/ns W °C/W °C Note 1: All supplies are fully tested at 25 V, and an internal 20 V clamp exists for each supply. Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation, the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at a 15 V differential. Typical ratings at other bias conditions are shown in Figs. 36 and 37. Symbol VB VS VHO VCC VLO VDD VSS VIN TA Definition High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side fixed supply voltage Low side output voltage Logic supply voltage Logic supply offset voltage Logic input voltage (HIN, LIN & SD) Ambient temperature (IRS2110) (IRS2113) Min. V S + 10 Note 2 Note 2 VS 10 0 VSS + 3 -5 (Note 3) VSS -40 Max. V S + 20 500 600 VB 20 VCC VSS + 20 5 VDD 125 Units V °C Note 2: Logic operational for VS of -4 V to +500 V. Logic state held for VS of -4 V to -VBS. (Refer to the Design Tip DT97-3) Note 3: When VDD < 5 V, the minimum VSS offset is limited to -VDD. www.irf.com 2 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Dynamic Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15 V, CL = 1000 pF, TA = 25 °C and VSS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Fig. 3. Symbol ton toff tsd tr tf MT Definition Turn-on propagation delay Turn-off propagation delay Shutdown propagation delay Turn-on rise time Turn-off fall time Delay matching, HS & LS turn-on/off (IRS2110) (IRS2113) Figure Min. Typ. Max. Units Test Conditions 7 8 9 10 11 — — — — — — — — — 130 120 130 25 17 — — 160 150 160 35 25 10 20 VS = 0 V VS = 500 V/600 V ns Static Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15 V, TA = 25 °C and VSS = COM unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN, and SD. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol VIH VIL VOH VOL ILK IQBS IQCC IQDD IIN+ IINVBSUV+ VBSUVVCCUV+ VCCUVIO+ IO- Definition Logic “1” input voltage Logic “0” input voltage High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Quiescent VDD supply current Logic “1” input bias current Logic “0” input bias current VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold Output high short circuit pulsed current Output low short circuit pulsed current Figure Min. Typ. Max. Units Test Conditions 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 9.5 — — — — — — — — — 7.5 7.0 7.4 7.0 2.0 2.0 — — — — — 125 180 15 20 — 8.6 8.2 8.5 8.2 2.5 2.5 — 6.0 1.2 0.15 50 230 340 30 40 1.0 9.7 9.4 V 9.6 9.4 — A — VO = 0 V, VIN = VDD PW ≤ 10 µs VO = 15 V, VIN = 0V PW ≤ 10 µs VIN = VDD VIN = 0 V µA VIN = 0 V or VDD V IO = 0 A IO = 20 mA VB=VS = 500 V/600 V www.irf.com 3 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Functional Block Diagram VB VDD RQ S HIN HV LEVEL SHIFT UV DETECT PULSE FILTER R R S Q HO VDD /VCC LEVEL SHIFT PULSE GEN VS SD UV DETECT VCC VDD /VCC LEVEL SHIFT LIN RQ VSS S LO DELAY COM Lead Definitions Symbol Description VDD HIN SD LIN VSS VB HO VS VCC LO COM Logic supply Logic input for high side gate driver output (HO), in phase Logic input for shutdown Logic input for low side gate driver output (LO), in phase Logic ground High side floating supply High side gate drive output High side floating supply return Low side supply Low side gate drive output Low side return www.irf.com 4 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Lead Assignments 14 Lead PDIP 16 Lead SOIC (Wide Body) IRS2110/IRS2113 IRS2110S/IRS2113S 14 Lead PDIP w/o lead 4 16 Lead PDIP w/o leads 4 & 5 IRS2110-1/IRS2113-1 Part Number IRS2110-2/IRS2113-2 www.irf.com 5 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Vcc =15V 10KF6 10 µF 0.1 µF 9 10 11 12 2 IRF820 3 6 5 7 1 OUTPUT MONITOR 10KF6 0.1 µF 200 µH + 10KF6 100µF HV = 10 to 500V/600V HO dVS >50 V/ns dt 13 Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit Vcc =15V VB + 10 15V µF VS (0 to 500V/600V) 10 µF 10 µF 0.1 µF 9 3 6 5 7 1 CL 13 2 CL 10 11 12 0.1 µF HO LO HIN LIN ton 50% 50% tr 90% toff 90% tf HIN SD LIN HO LO 10% 10% Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition HIN LIN 50% 50% 50% SD tsd LO HO 10% HO LO 90% MT 90% MT LO Figure 5. Shutdown Waveform Definitions HO Figure 6. Delay Matching Waveform Definitions www.irf.com 6 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 250 250 Turn-on Delay Time (ns Turn-On Delay Time (ns) ) 200 150 100 50 0 10 12 14 16 18 20 V B IAS Supply V oltage (V ) Max. Turn-On Delay Time (ns) Turn-on Delay Time (ns 200 150 Max. 100 Typ. Typ. 50 0 -50 -25 0 25 50 o 75 100 125 Temperature( C) Figure 7A. Turn-On Time vs. Temperature Figure 7B. Turn-On Time vs. Supply Voltage 250 M ax. 250 Turn-Off Time Turn-Off Time (ns)(ns) 200 150 Max. Turn-On Delay Time (ns) 200 Typ. 150 100 50 0 0 2 4 6 8 10 12 14 16 18 20 V DD Supply Voltage (V) Figure 7C. Turn-On Time vs. V DD S upply Voltage 250 100 Typ. 50 0 -50 -25 0 25 50 o 75 100 125 Temperature( C) Figure 8A. Turn-Off Time vs. Temperature 250 Turn-OffDelay Time (ns) (ns) Turn-Off Delay Time M ax. Turn-Off Turn-Off Time (ns) (ns) 200 Max. 200 150 Typ. 150 Typ. 100 50 0 10 12 14 16 18 20 V BIAS Supply Voltage (V) 100 50 0 Figure 8B. Turn-Off Time vs. Supply Voltage 6 8 10 12 14 16 18 20 VDD Supply Voltage (V) V S l V lt (V) Figure 8C. Turn-Off Time vs. VDD Supply Voltage 0 2 4 www.irf.com 7 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 250 SD Propagation Delay (ns) SD Propagation Delay (ns SD Propagation Delay (ns) SD Propagation delay (ns 250 200 150 Typ. Max. 200 150 100 50 0 -50 Max. 100 50 0 10 12 14 16 18 20 V BIAS Supply Voltage (V) Figure 9B. Shutdown Time vs. Supply Voltage 100 Typ. -25 0 25 50 75 100 125 Temperature (oC) Figure 9A. Shutdown Time vs. Temperature 250 M ax. Shutdown Delay Time (ns) Turn-On Rise Time (ns) 200 150 Typ. 80 60 100 50 0 0 2 4 8 10 12 14 16 18 20 V DD Supply Voltage (V) 6 40 M ax. Typ. 20 0 -50 -25 0 25 50 75 100 125 Temperature (o C ) Figure 10A. Turn-On Rise Time vs. Temperature 50 Figure 9C. Shutdown Time vs. V DD S upply Voltage 100 Turn-On Rise Time (ns) Turn-On Rise Time (ns) 80 Turn-Off Fall Time (ns) 12 14 16 18 20 40 60 Max. Turn-Off Fall Time (ns) 30 Max. 40 Typ. 20 Typ. 20 10 0 10 VBIAS Supply Voltage (V) 0 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 10B. Turn-On Rise Time vs. Voltage Figure 11A. Turn-Off Fall Time vs. Temperature www.irf.com 8 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 50 15.0 Turn-Off FallFall Time (ns) Turn-Off Time (ns) 40 Logic “1” Input Threshold (V) Logic "1" Input Threshold (V) 12 14 16 18 20 12.0 Max Min. 30 9.0 20 Max. 6.0 10 Typ. 3.0 0 10 VBIAS Supply Voltage (V) 0.0 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 11B. Turn-Off Fall Time vs. Voltage 15 12 Max. 9 6 3 0 0 2 4 6 8 10 12 14 16 18 20 VDD Logic Supply Voltage (V) Figure 12A. Logic “1” Input Threshold vs. Temperature LogicLogic "0" Input Threshold (V) “0” Input Threshold (V) 15.0 Logic Logic "Input Threshold (V) (V) “1” 1" Input Threshold 12.0 9.0 6.0 Max. Min. 3.0 0.0 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 12B. Logic “1” Input Threshold vs. Voltage 15 Logic Input Threshold Logic “0”"0" Input Threshold (V) (V) Figure 13A. Logic “0” Input Threshold vs. Temperature High Level Output Voltage (V) High Level Output Voltage (V) 5.00 12 9 Min. 6 3 0 0 2 4 6 8 10 12 14 16 18 20 VDD Logic Supply Voltage (V) 4.00 3.00 2.00 Max. 1.00 0.00 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 13B. Logic “0” Input Threshold vs. Voltage Figure 14A. High Level Output vs. Temperature www.irf.com 9 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 5.00 0.20 Low Level Outout Voltage (V) High Level Ouput Voltage (V) 4.00 0.16 Max. 3.00 0.12 0.08 0.04 0.00 -50 2.00 Max. 1.00 0.00 10 12 14 16 18 20 -25 VBIAS Supply Voltage (V) 0 25 50 75 Temperature (oC) 100 125 Figure 14B. High Level Output vs. Voltage Low Level Outout Voltage (V) 0.20 0.16 0.12 0.08 0.04 0.00 10 12 14 16 18 20 Figure 15A. Low Level Output vs. Temperature Offset Supply Leakage Current (µA) 500 Max. 400 300 200 100 Max. 0 -50 -25 0 25 50 75 100 125 VCC Supply Voltage (V) Temperature (oC) Figure 15B. Low Level Output vs. Supply Voltage Offset Supply Leakage Current (µA) 500 Figure 16A. Offset Supply Current vs. Temperature 500 VBS Supply Current (µA) 100 200 300 400 500 600 400 400 300 300 Max. 200 200 Typ. 100 Max. 100 0 0 0 -50 -25 0 25 50 75 100 125 VB Boost Voltage (V) Temperature (oC) Figure 16B. Offset Supply Current vs. Voltage Figure 17A. VBS Supply Current vs. Temperature www.irf.com 10 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 500 625 VBS Supply Current (µA) VBS Supply Current (µA) 400 VCC Supply Current ((µA) VCC Supply Current µA) 500 300 375 Max. 200 Max. 250 Typ. 100 Typ. 125 0 10 12 14 16 18 20 0 -50 -25 0 25 50 75 100 125 VBS Floating Supply Voltage (V) Figure 17B. VBS Supply Current vs. Voltage 625 Temperature (oC) Figure 18A. VCC Supply Current vs. Temperature 100 VCC Supply Current ((µA) VCC Supply Current µA) 500 VDD Supply Current (µA) 12 14 16 18 20 80 375 60 250 Max. 40 Max. 125 Typ. 20 Typ. 0 10 0 -50 -25 0 25 50 75 100 125 VCC Fixed Supply Voltage (V) Figure 18B. VCC Supply Current vs. Voltage Temperature (oC) Figure 19A. VDD Supply Current vs. Temperature Logic “1” Input Bias Current (µA) 100 VDD Supply Current VDD Supply Current (µA) (µA) 60 50 40 30 20 10 0 0 2 4 6 8 10 12 14 16 18 20 VDD Logic Supply Voltage (V) 80 60 40 Max. 20 Typ. 0 -50 -25 0 25 50 75 100 125 Figure 19B. VDD Supply Current vs. V DD Voltage Temperature (oC) Figure 20A. Logic “1” Input Current vs. Temperature www.irf.com 11 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Logic “1”Logic “u”tInBuaBias CurrrretnµA)µ A) Inp 1 p it s C u en (t ( 50 40 30 20 10 0 0 2 4 6 8 10 12 14 16 18 20 Logic “0” Input Bias Current (µ A) 60 5.00 4.00 3.00 2.00 1.00 Max. 0.00 -50 -25 0 25 50 75 100 125 VDD Logic Supply Voltage (V) Figure 20B. Logic “1” Input Current vs. V DD Voltage VBS U ndervoltage Lockout + ( V) Temperature (oC) Figure 21A. Logic “0” Input Current vs. Temperature 11.0 Logic “0ogiIn0”utput Bas CCurrteµAt) (µ A) L ” c “ p In Bi ias urren ( n 5 4 3 2 1 0 0 2 4 6 8 10 12 14 16 18 20 VDD Logic Supply Voltage (V) Figure 21B. Logic “0” Input Current vs. V DD Voltage 10.0 Max. 9.0 Typ. 8.0 Min. 7.0 6.0 -50 -25 0 25 50 75 100 125 Temperature (oC) Figure 22. VBS Undervoltage (+) vs. Temperature VBS U ndervoltage Loc kout - ( V) VCC U nder voltage Loc kout + ( V) 11.0 11.0 10.0 Max. 10.0 Max. 9.0 9.0 Typ. Typ. 8.0 8.0 Min. 7.0 Min. 7.0 6.0 -50 -25 0 25 50 75 100 125 6.0 -50 -25 0 25 50 75 100 125 Temperature (oC) Figure 23. VBS Undervoltage (-) vs. Temperature Temperature (oC) Figure 24. VCC Undervoltage (+) vs. Temperature www.irf.com 12 PDF created with pdfFactory trial version www.pdffactory.com IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 11.0 5.00 VCC U nder voltage Lockout - (V) 10.0 Max. Output Ouout rcurceCurrrre(n)t ( A) Stp u So e Cu ent A 4.00 9.0 3.00 Typ. Min. 8.0 Typ. 2.00 7.0 Min. 1.00 6.0 -50 -25 0 25 50 75 100 125 Temperature (°C) Temperature (oC) 0.00 -50 -25 0 25 50 75 100 125 Temperature o Temperature (°C) ( C) Figure 25. VCC Undervoltage (-) vs. Temperature 5.00 5.00 Figure 26A. Output Source Current vs. Temperature OutpOutpuSSnk Curreur(rAent (A) u t t iin k C nt ) Output Outout rcurceCurrrre(n)t ( A) S p u So e C u ent A 4.00 4.00 3.00 3.00 Typ. Min. 2.00 Typ. 2.00 1.00 Min. 1.00 0.00 10 12 14 16 18 20 0.00 -50 -25 0 25 50 75 100 125 VBIAS Supply Voltage (V) Figure 26B. Output Source Current vs. Voltage 5.00 150 Temperature (oC) Figure 27A. Output Sink Current vs. Temperature 320V Junction Temperature (oC ) Outputt uSiink uCutr(rent (A) Ou p t S nk C rren A) 4.00 125 140V 100 3.00 75 10V 2.00 Typ. 50 1.00 Min. 25 0.00 10 12 14 16 18 20 0 1E+2 1E+3 1E+4 1E+5 1E+6 VBIAS Supply Voltage (V) Figure 27B. Output Sink Current vs. Voltage Frequency (kHz) Figure 28. IRS2110/IRS2113 TJ vs. Frequency (IRFBC20) RGATE = 33 Ω , VCC = 15 V www.irf.com 13 PDF created with pdfFactory trial version www.pdffactory.com IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 150 320V 150 320V 140V Junction Temperature) (oC) p ( Junction Temperature (oC) 125 140V 125 100 100 10V 75 10V 75 50 50 25 25 0 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (kHz) Figure 29. IRS2110/IRS2113 TJ vs. Frequency (IRFBC30) RGATE = 22 Ω, VCC = 15 V 150 320V 140V 0 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (kHz) Figure 30. IRS2110/IRS2113 TJ vs. Frequency (IRFBC40) RGATE = 15 Ω, VCC = 15 V 150 320V 140V Junction Temperature (oC) 125 10V Junction Temperature (oC) 125 100 100 10V 75 75 50 50 25 25 0 1E+2 1E+3 1E+4 1E+5 1E+6 0 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (kHz) Figure 31. IRS2110/IRS2113 TJ vs. Frequency (IRFPE50) RGATE = 10 Ω, VCC = 15 V 150 320V 140V Frequency (kHz) Figure 32. IRS2110S/IRS2113S TJ vs. Frequency (IRFBC20) RGATE = 33 Ω, VCC = 15 V 150 320V 140V Junction Temperature (oC) 125 Junction Temperature (oC) 125 10V 100 10V 100 75 75 50 50 25 25 0 1E+2 1E+3 1E+4 1E+5 1E+6 0 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (kHz) Figure 33. IRS2110S/IRS2113S TJ vs. Frequency (IRFBC30) RGATE = 22 Ω, VCC = 15 V Frequency (kHz) Figure 34. IRS2110S/IRS2113S TJ vs. Frequency (IRFBC40) RGATE = 15 Ω, VCC = 15 V www.irf.com 14 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 150 320V 140V 10V 0.0 125 VS Offset Supply Voltage (V) Junction Temperature (oC) p () -2.0 Typ. 100 -4.0 75 -6.0 50 25 -8.0 0 1E+2 -10.0 1E+3 1E+4 1E+5 1E+6 10 12 14 16 18 20 Frequency (kHz) Figure 35. IRS2110S/IRS2113S TJ vs. Frequency (IRFPE50) RGATE = 10 Ω, VCC = 15 V VBS Floating Supply Voltage (V) Figure 36. Maximum VS Negative Offset vs. VBS Supply Voltage VSS Logic Supply Offset Voltage (V) 20.0 16.0 12.0 8.0 Typ. 4.0 0.0 10 12 14 16 18 20 VCC Fixed Supply Voltage (V) Figure 37. Maximum VSS Positive Offset vs. VCC Supply Voltage www.irf.com 15 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Case Outlines 14-Lead PDIP 01-6010 01-3002 03 (MS-001AC) 14-Lead PDIP w/o Lead 4 www.irf.com 01-6010 01-3008 02 (MS-001AC) 16 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 16 Lead PDIP w/o Leads 4 & 5 01-6015 01-3010 02 16-Lead SOIC (wide body) www.irf.com 01 6015 01-3014 03 (MS-013AA) 17 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Tape & Reel 16-Lead SOIC LOAD ED TA PE FEED DIRECTION B A H D F C N OT E : CO NTROLLING D IM ENSION IN MM E G C A R R I E R T A P E D IM E N S I O N F O R 1 6 S O IC W M e tr ic Im p e ri al Co d e M in M ax M in M ax A 1 1 .9 0 1 2. 10 0. 46 8 0 .4 7 6 B 3 .9 0 4 .1 0 0. 15 3 0 .1 6 1 C 1 5 .7 0 1 6. 30 0. 61 8 0 .6 4 1 D 7 .4 0 7 .6 0 0. 29 1 0 .2 9 9 E 1 0 .8 0 1 1. 00 0. 42 5 0 .4 3 3 F 1 0 .6 0 1 0. 80 0. 41 7 0 .4 2 5 G 1 .5 0 n/ a 0. 05 9 n/ a H 1 .5 0 1 .6 0 0. 05 9 0 .0 6 2 F D C E B A G H R E E L D IM E N S I O N S F O R 1 6 S O IC W M e tr ic Im p e ri al Co d e M in M ax M in M ax A 32 9. 60 3 3 0 .2 5 1 2 .9 7 6 1 3 .0 0 1 B 2 0 .9 5 2 1. 45 0. 82 4 0 .8 4 4 C 1 2 .8 0 1 3. 20 0. 50 3 0 .5 1 9 D 1 .9 5 2 .4 5 0. 76 7 0 .0 9 6 E 9 8 .0 0 1 0 2 .0 0 3. 85 8 4 .0 1 5 F n /a 2 2. 40 n /a 0 .8 8 1 G 1 8 .5 0 2 1. 10 0. 72 8 0 .8 3 0 H 1 6 .4 0 1 8. 40 0. 64 5 0 .7 2 4 www.irf.com 18 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY LEADFREE PART MARKING INFORMATION Part number S IRxxxxxx Date code YWW? ?XXXX IR logo Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 200-002 ORDER INFORMATION 14-Lead PDIP IRS2110PbF 14-Lead PDIP IRS2110-1PbF 14-Lead PDIP IRS2113PbF 14-Lead PDIP IRS2113-1PbF 16-Lead PDIP IRS2110-2PbF 16-Lead PDIP IRS2113-2PbF 16-Lead SOIC IRS2110SPbF 16-Lead SOIC IRS2113SPbF 16-Lead SOIC Tape & Reel IRS2110STRPbF 16-Lead SOIC Tape & Reel IRS2113STRPbF IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 This product has been qualified per industrial level Data and specifications subject to change without notice 5/11/2006 www.irf.com 19